CN105047788A - Thin-film structure light-emitting diode (LED) chip based on silver-based metal bonding and preparation method of thin-film structure LED chip - Google Patents

Abstract

The invention discloses a thin film structure LED chip based on silver-based metal bonding and a preparation method thereof. The present invention adopts AgCuIn alloy as the bonding metal layer, and the bonding temperature and holding time are reduced; AgCuIn bonding can be completed at a lower bonding temperature and bonding pressure, and the bonding time is shortened, which is beneficial to reduce the impact on the bonding process. Damage to the photoelectric performance of the LED epitaxial layer; the bonding metal layer of AgCuIn alloy eliminates the void phenomenon in the bonding process, which is conducive to the stress release of the LED epitaxial layer; AgCuIn bonding has high mechanical properties, good electrical conductivity and The thermal conductivity is beneficial to improve the lifespan of the LED chip; moreover, the use of AgCuIn as the bonding metal greatly reduces the manufacturing cost of the vertical structure LED chip, which is conducive to the market development of the vertical structure LED chip.

Description

A thin-film structure LED chip based on silver-based metal bonding and its preparation method

technical field

The invention relates to a thin-film structure LED chip, in particular to a thin-film structure LED chip based on silver-based metal bonding and a preparation method thereof.

Background technique

The GaN-based power thin-film structure light-emitting diode LED based on laser lift-off and bonding technology has a very broad application prospect in the field of high-power lighting. The key step of this scheme is to bond the GaN epitaxial layer grown on sapphire to a conductive and thermally conductive transfer substrate such as Si or Cu after preparing the p-electrode and other p-plane structures, and then use laser lift-off technology to remove it as the growth substrate. sapphire, and roughen the surface of the exposed N-polar GaN surface, and then prepare the n-electrode. The bonding technology needs to achieve high bond strength to ensure the yield, and it needs to have good electrical and thermal conductivity to reduce the resistance and improve the life of the die; finally, the bonding technology generally needs to achieve a certain stress release. In the bonding process, the choice of bonding medium directly affects the above properties and further affects the performance of thin film structure LEDs.

AuSn bonding is a common bonding method in the manufacturing process of power-type thin-film structure LEDs. AuSn bonding technology generally uses eutectic gold-tin brazing alloy preformed sheet as the dielectric layer, and the epitaxial layer and the transfer substrate are bonded together in the range of 300-500 °C. AuSn bonding has the advantages of high mechanical strength, good wettability, and good thermal and electrical conduction. On the other hand, since AuSn bonding is based on liquid-solid phase transition, there are two stable phases, δ phase and ζ phase, in the solid state, and the randomness of diffusion during the liquid-solid phase transition leads to disordered and uncontrollable phase distribution (Mat .Sci.Eng.B,175,213,(2010)) Stress accumulation affects the bonding strength, thermal conductivity and electrical conductivity of the bonding metal layer, and the molten AuSn under pressure will overflow to the surroundings, which is not conducive to the subsequent process.

Au-Au bonding is also a common technical means in the preparation of power-type thin-film structure LEDs. Unlike AuSn bonding, Au-Au bonding does not require a similar gold-tin brazing alloy as a preform, but vapor-deposits 1-3 μm of Au on the surface of the epitaxial layer and the transfer substrate, and the bonding temperature is about 300 ° C, which is slightly lower It is bonded to AuSn, but the bonding pressure is three orders of magnitude higher than AuSn bonding (about 6000-8000kgf/wafer), and the thermal diffusion of Au atoms or crystal grains is used to obtain a tight bond. The method has a relatively simple process and is suitable for large-scale industrial production. Its disadvantage is that it needs to be kept at high temperature and high pressure for a long time to ensure that the interdiffusion of the metal interface is fully complete, resulting in a decrease in the performance of optoelectronic devices (IEEETransactionsonElectronicsPackagingManufacturing, 31(2):159(2008)). Finally, due to the high price of Au, Au-Au bonding increases the manufacturing cost of power-type thin-film structure LEDs.

Silver-based solder is the most widely used type of hard solder. It has a moderate melting point, can wet many metals, and has good strength, plasticity, electrical conductivity and thermal conductivity. Compared with Ag conductive colloid, SnAgCu and SnAg have better thermal conductivity and electrical conductivity, and are a type of solder used more in power LED packaging. But it is rarely used for bonding of epitaxial layers. Professor Waag of the Braunschweig University of Technology in Germany also used the method of sintering nanometer and micron Ag particles to package power LEDs (IEEETRANSACTIONSONCOMPONENTS, PACKAGINGANDMANUFACTURINGTECHNOLOGY, 2(2): 199(2012)). Due to the LED packaging process, the melting point of Ag-based metals is generally lower than 300°C. It is difficult to carry out the nitrogen-surface contact process for the vertical thin-film structure LED after the substrate is peeled off. At the same time, the lower melting point of the alloy will also bring work reliability. Decline. Although the bonding of micro-nano Ag particles may solve the above problems, it has only been reported on chip bonding, but not on epitaxial layer bonding.

Contents of the invention

In order to solve the problems of bonding cost and reliability, the invention provides a silver-based metal bonded thin-film structure LED chip and a preparation method thereof, which are used in the preparation of a power-type thin-film structure LED chip.

An object of the present invention is to provide a thin-film structure LED chip based on silver-based metal bonding.

The thin-film structure LED chip of the present invention is a vertical structure LED chip based on bonding and laser lift-off, or a flip-chip structure LED chip.

For vertical structure LED chips, the thin film structure LED chip unit based on silver-based metal bonding of the present invention includes: transfer substrate, bonding metal layer, transition layer, reflective layer, p-electrode, LED epitaxial layer, n-electrode, n-side A light cone and a passivation layer; wherein, from bottom to top on the transfer substrate, there are bonding metal layer, transition layer, reflective layer, p-electrode and LED epitaxial layer; an n-electrode is formed on a small part of the LED epitaxial layer; On the surface of the LED epitaxial layer except for the n-electrode, an n-plane light-emitting cone is formed; the reflective layer and the n-plane light-emitting cone form a light-emitting structure; the laser scribing between the chip units and the sidewall of the etched aisle form a passivation layer; The bonding metal layer adopts AgCuIn alloy.

AgCuIn is a ternary alloy containing copper and indium, which has good welding performance and low vapor pressure. There are AgCuln30-5, AgCuIn24-15, AgCuln85-5, AgCuIn20-31 and AgCuln27-10 and other models. Their melting temperatures are 770-800°C, 630-705°C, 900-950°C, 540-575°C and 685-730°C in sequence. Its melting point temperature is higher than the process temperature of n-surface contact, and it can be used for vacuum bonding metals of power-type thin-film structure LEDs in conjunction with low-temperature, high-pressure bonding processes.

The vertical structure LED chip of the present invention emits light from the nitrogen surface, and the LED epitaxial layer sequentially includes an n-type contact layer, an n-type layer, a multi-quantum well, a p-type layer and a p-type contact layer from top to bottom; An n-electrode is formed on a small part; the surface of the roughened n-type contact layer except the n-electrode forms an n-surface light-emitting cone. The thickness of the LED epitaxial layer is between 2 and 100 μm. Further, a current spreading layer is added between the n-type contact layer and the n-type layer, the thickness of the current spreading layer is determined by the thickness of the entire LED epitaxial layer, and is between 10-80 μm.

Further, the light extraction structure also includes metal nanostructures, and the periodically arranged metal nanostructures are embedded in the p-type layer and the p-type contact layer of the epitaxial layer of the LED. The metal nanostructure includes nanoholes, metal nanoparticles and medium cladding; wherein, the nanoholes are formed in the p-type layer and the p-type contact layer; the metal nanoparticles wrapped around the medium cladding are located in the nanoholes.

The n electrode adopts the metal structure of palladium Pd, indium In, nickel Ni and gold Au, and utilizes the lower metal work function and high temperature stability of the PdIn alloy to prevent the diffusion of Ga atoms and significantly improve the performance of the ohmic contact on the nitrogen surface. The n-electrode with such a shape can effectively improve the current spreading characteristics of the chip, and improve the light efficiency and reliability of the device. The p-electrode uses transparent indium tin oxide ITO.

For flip-chip structure LED chips, the silver-based metal-bonded thin-film structure LED chip unit of the present invention includes: LED epitaxial layer, n-electrode, p-electrode, reflective layer, bonding metal layer, passivation layer and transfer substrate; Among them, the LED epitaxial layer includes an n-type contact layer, a multi-quantum well region, and a p-type contact layer in sequence from small to top; a part of the n-type contact layer is exposed by etching, and an n-electrode is prepared on the exposed n-type contact layer; The p-electrode is prepared on the p-type contact layer, and the reflective layer is prepared on the p-electrode; the passivation layer is wrapped around the side wall of the LED epitaxial layer and the n-electrode to prevent leakage; a bonding metal layer is deposited on the reflective layer; the bonding metal layer will The LED epitaxial layer and the transfer substrate are bonded together.

In the AgCuIn alloy used for the bonding metal layer, the composition of Ag is between 40-50%, the composition of Cu is between 40-50%, and the composition of In is between 10-20%.

Another object of the present invention is to provide a method for preparing a thin-film structure LED chip based on silver-based metal bonding.

For the vertical structure LED chip, the preparation method of the thin film structure LED chip unit based on silver-based metal bonding of the present invention comprises the following steps:

1) Provide a growth substrate suitable for the laser lift-off process, grow a non-doped GaN layer on the growth substrate, and grow an n-type contact layer, n-type layer, multiple quantum wells, p-type layer and p-type layer on the non-doped GaN layer in sequence The contact layer forms the LED epitaxial layer;

2) Use laser scribing on the LED epitaxial layer to divide the separated LED chip units, go deep into the growth substrate, form a laser scribing line, clean the laser scribing line, and remove the side wall damage area and the residue in the laser scribing line;

3) A mask layer is grown on the LED epitaxial layer, and the LED chip unit is etched on the mask layer until the n-type layer is etched to form an etching walkway, and the mask layer is removed to expose the p-type contact layer, and the etching is further removed. etch damage, and then remove the mask layer;

4) Re-grow the passivation layer material on the LED epitaxial layer, prepare the pattern by photolithography and perform wet etching, remove the passivation layer material on the surface of the p-type contact layer, and retain the laser scribing and etching the sidewall of the aisle The passivation layer material forms a passivation layer; 5) vapor-deposits a p-electrode on the surface of the p-type contact layer, and then vapor-deposits a reflection layer and a transition layer on the surface of the p-electrode;

6) Evaporating the bonding metal on the surface of the transition layer and the transfer substrate by means of electron beam evaporation. The material of the bonding metal is AgCuIn alloy, and then performing thermal annealing on the bonding metal;

7) Buckle the transfer substrate on which the bonding metal has been evaporated to the LED epitaxial layer formed on the growth substrate, and bond the transfer substrate and the LED epitaxial layer together under high temperature and pressure, and the bond on the transition layer The bonding metal and the bonding metal on the transfer substrate are fused into a bonding metal layer;

8) using a laser lift-off method to remove the growth substrate, and expose the non-doped GaN layer, and clean the surface of the stripped LED epitaxial layer;

9) Perform wet and dry etching to remove the non-doped GaN layer, expose the n-type contact layer, and expand the laser scribing track to release part of the residual stress;

10) Evaporate the metal of the n-electrode, remove part of the metal by stripping, expose most of the n-type contact layer, form the n-electrode, and anneal to obtain a stable ohmic contact;

11) Passivating the electrodes and sidewalls, roughening the surface of the n-type contact layer, forming periodic or non-periodic n-surface light-emitting cones, thereby forming a light-exiting structure including a reflective layer and an n-surface light-emitting cone;

12) Cutting the epitaxial layer of the LED by machine or laser, testing and sorting to obtain LED chip units.

Wherein, in step 1), the thickness of the LED epitaxial layer is between 2-100 μm. The GaN carrier concentration of the n-type contact layer reaches 10 ¹⁹ cm ^-3 , and the thickness is between 1 and 2 μm. A current spreading layer can also be added between the n-type contact layer and the n-type layer, the thickness of which is determined by the thickness of the entire LED epitaxial layer, and is between 10-80 μm. The carrier concentration of the current spreading layer is in the range of 10 ¹⁷ cm ^-3 to 10 ¹⁸ cm ^-3 , and the selection of parameters takes into account both lateral current spreading and vertical series resistance. To optimize the multiple quantum wells, the period and well width of the multiple quantum wells depend on the size, shape and position of the metal nanoparticles, so as to ensure that the surface plasmon excites the multiple quantum wells to obtain enhanced luminescence. The p-type contact layer generally uses 1-5nm non-doped or n-type InGaN to form a tunnel junction with the p-GaN layer.

In step 2), laser scribing is used to divide the separated LED chip units on the LED epitaxial layer. The depth of the laser scribing exceeds the thickness of the LED epitaxial layer and goes deep into the growth substrate, and then wet etching is used to remove the damage of the side wall. And achieve the purpose of coarsening. Scribing adopts plasma-enhanced chemical vapor deposition method PECVD to grow SiO ₂ as a protective layer, and spin-coats the protective solution for laser scribing to reduce the damage caused by laser scribing to the LED epitaxial layer; on the other hand, the following high-temperature acid cleaning During the process, it plays the role of protecting the LED epitaxial layer. The inclination angle between the side wall of the laser scribing line and the growth substrate is between 70 and 85°, and the width of the laser scribing line is between 10 and 50 μm; the wet etching condition used is a mixed acid of phosphoric acid and sulfuric acid, and the etching temperature is 200 Between ~250°C, the etching time is related to the thickness of the LED epitaxial layer, and the residue generated by laser scribing is removed. The size of the sidewall corrosion cone is between 100nm and 10μm. The invention adopts laser scribing and mixed acid etching to divide the chip unit, and effectively reduces the warpage in the epitaxial layer. At the same time, the corrosion of the side wall results in roughening of the side wall, which is beneficial to the emission of side light.

In step 3), a photoresist mask is obtained by exposing on the mask layer. Inductively coupled plasma ICP fluorine-based reactive gas is used to etch the middle mask layer, and chlorine-based reactive gas is used to further etch to form an etching walkway, and at the same time, the damaged layer on the side wall of the laser scribing is further removed. The etching depth of the etched corridor is between 0.5 μm and 5 μm. Remove the remaining masking layer.

In step 4), the thickness of the passivation layer material is between 300 and 500nm. After the passivation layer material on the surface of the p-type contact layer is removed by photolithography, there is still a layer within 10 μm from the edge of the p-type contact layer. A part of the material of the passivation layer remains to form a passivation layer, so as to better realize side wall protection.

In step 5), the p-electrode is a transparent conductive electrode, using indium tin oxide ITO, with a thickness between 100-400nm, and the light-emitting wavelength, the thickness of ITO and the thickness of the p-type layer are jointly optimized to form an anti-reflection effect. The reflective layer adopts an Al-based reflective electrode or an Ag-based reflective electrode. The Al-based reflective electrode is TiAl or NiAl, wherein titanium Ti and nickel Ni are sticky metals with a thickness between 1 and 2 nm, and the thickness of Al is between 20 and 50 nm. The use of Al-based reflective electrodes will be beneficial to the stability at higher process temperatures, such as bonding at high temperature and high pressure. Ag-based reflective electrodes for increased reflectivity and stability. The metal of the transition layer is nickel, platinum or palladium, etc., and the thickness is between 20nm and 50nm.

In step 6), the bonding metal is AgCuIn alloy. In order to ensure the uniformity of AgCuIn alloy components, the following steps are adopted: a) Evaporate a layer with a thickness of 400-500nm at a constant speed of 0.4-0.5nm/s b) evaporate a layer of AgCuIn alloy with a thickness between 500-1000nm at a constant speed of 8-12nm/s; c) repeat step b) after an interval of 1-5min. After the vapor deposition of the AgCuIn alloy is completed, annealing is carried out under a nitrogen atmosphere at 200-300° C. for 20-30 minutes to ensure that the composition of the alloy is uniform. The thickness of the AgCuIn alloy is between 1.5-2 μm, which can ensure that the bonding metal layer can withstand the chip process temperature above 500°C.

In step 7), a semiconductor wafer or metal is used as the transfer substrate. The transfer substrate includes a semiconductor substrate and a p-electrode solder layer on which bonding metal is deposited. The bonding process is generally carried out step by step, and the specific steps include: a) boosting the pressure to 800-1000kgf/wafer, raising the temperature to 80-120°C, and keeping the time between 1-3min; b) boosting the pressure to 4000 ～5000kgf/wafer, the temperature rises to 200～300℃, and the holding time is between 1～3min; c) Keep the pressure constant, the temperature rises to 300～500℃, and the holding time is between 10～30min d) Keep the pressure constant, the temperature drops to 200-300°C, and the hold time is between 1-3min; e) Keep the pressure constant, the temperature drops to 80-120°C, and the hold time is 1-3min 3min; f) the temperature drops to room temperature, and the pressure is completely unloaded.

In step 8), laser lift-off is performed on the bonded LED epitaxial layer to remove the growth substrate. The bonded transfer substrate adopts a metal structure, which will greatly reduce the damage caused by the residual stress in the LED epitaxial layer. The surface of the non-GaN-doped layer exposed after the stripping is cleaned with dilute hydrochloric acid to remove Ga droplets on the surface.

In step 9), wet etching or ICP etching+wet etching is used for the non-doped GaN layer (about 1-2 μm) on the nitrogen surface. Wet etching uses hot phosphoric acid at 100-160°C to expand the width of the laser scribing line to more than 20 μm to obtain a relatively flat nitrogen surface. Control the conditions of ICP etching and phosphoric acid etching to effectively release the residual stress in the chip.

In step 10), the metal of the n-electrode is evaporated, using a metal structure of palladium Pd, indium In, nickel Ni and gold Au, a structure of Pd/In/Ni/Au or a structure of Cr/Pt/Au.

In step 11), the light-emitting surface is roughened with hot phosphoric acid, or nano-imprint and etching methods are used to obtain n-surface light-emitting cones with micronano surfaces. The surface is roughened with hot phosphoric acid, which can get more dodecahedral cone structures on the light-emitting surface, and the inclination angle of the corroded side can be adjusted according to the temperature and concentration of the solution.

In step 12), if the semiconductor Si or GaAs substrate is used as the transfer substrate, ordinary laser scribing can meet the requirements. For the scribing of the Cu-based transfer substrate, a picosecond laser is required for scribing and segmentation.

For the flip-chip structure LED chip, the preparation method of the thin film structure LED chip based on silver-based metal bonding of the present invention is as follows:

1) Provide a growth substrate suitable for the laser lift-off process, and grow an LED epitaxial layer on the growth substrate, from the growth substrate upwards, including an n-type contact layer, a multiple quantum well and a p-type contact layer in sequence;

2) Laser scribing is used to separate the LED epitaxial layer into independent dies;

3) using an inductively coupled plasma ICP etching method to etch a part of the p-type contact layer on the surface of each die to expose the n-type contact layer, and simultaneously form an etching walkway around each die;

4) preparing an n-electrode on the exposed n-type contact layer;

5) preparing a p-electrode on the p-type contact layer;

6) further preparing a reflective layer on the p-electrode;

7) Deposit to form a passivation layer, the passivation layer wraps the etching channel, and isolates the n-electrode and p-electrode to prevent leakage;

8) Evaporating the bonding metal on the surface of the reflective layer and the surface of the transfer substrate respectively, the material of the bonding metal adopts AgCuIn alloy, and then thermally annealing the bonding metal;

9) Buckle the transfer substrate on which the bonding metal has been evaporated to the LED epitaxial layer formed on the growth substrate, and bond the transfer substrate and the LED epitaxial layer together under high temperature and pressure, and the bond on the transition layer The bonding metal and the bonding metal on the transfer substrate are fused into a bonding metal layer;

10) using a laser lift-off method to remove the growth substrate, and cleaning the surface of the stripped LED epitaxial layer;

11) Roughening the surface of the LED epitaxial layer after laser lift-off to form an n-plane light-emitting cone;

12) Cutting the epitaxial layer of the LED by machine or laser, testing and sorting to obtain LED chip units.

Wherein, in step 8), the bonding metal is an AgCuIn alloy. In order to ensure the uniformity of the AgCuIn alloy composition, the following steps are adopted: a) Evaporate a layer with a thickness of 400-400 nm/s at a constant speed of 0.4-0.5 nm/s. AgCuIn alloy between 500nm and 500nm; b) evaporate a layer of AgCuIn alloy with thickness between 500nm and 1000nm at a constant speed of 8-12nm/s; c) repeat step b) after 1-5min interval. After the vapor deposition of the AgCuIn alloy is completed, annealing is carried out under a nitrogen atmosphere at 200-300° C. for 20-30 minutes to ensure that the composition of the alloy is uniform. The thickness of AgCuIn is 1.5-2 μm, which can ensure that the bonding metal layer can endure the chip process temperature above 500°C.

In step 9), a semiconductor wafer or metal is used as the transfer substrate. The transfer substrate includes a semiconductor substrate and a p-electrode solder layer on which bonding metal is deposited. The bonding process is generally carried out step by step, and the specific steps include: a) boosting the pressure to 800-1000kgf/wafer, raising the temperature to 80-120°C, and keeping the time between 1-3min; b) boosting the pressure to 4000 ～5000kgf/wafer, the temperature rises to 200～300℃, and the holding time is between 1～3min; c) Keep the pressure constant, the temperature rises to 300～500℃, and the holding time is between 10～30min d) Keep the pressure constant, the temperature drops to 200-300°C, and the hold time is between 1-3min; e) Keep the pressure constant, the temperature drops to 80-120°C, and the hold time is 1-3min 3min; f) the temperature drops to room temperature, and the pressure is completely unloaded.

The present invention uses AgCuIn alloy as the bonding metal layer to complete the bonding process in the preparation of vertical structure LEDs, and realizes stable mechanical strength. The bonding temperature and holding time are lower than those of Au-Au bonding, and the bonded phase with AuSn Compared with that, the void phenomenon of the bonding metal layer is eliminated, which is beneficial to the stress release in the LED epitaxial layer; and, the use of AgCuIn as the bonding metal greatly reduces the manufacturing cost of the vertical structure LED chip, which is beneficial to the vertical structure LED chip. market development.

Advantages of the present invention:

1) AgCuIn bonding can be completed at a lower bonding temperature and bonding pressure, and the bonding time is shortened, which is beneficial to reduce the damage to the photoelectric performance of the LED epitaxial layer during the bonding process;

2) The bonding metal layer of AgCuIn alloy eliminates the void phenomenon in the bonding process, which is beneficial to the stress release of the LED epitaxial layer;

3) AgCuIn bonding has high mechanical properties, good electrical and thermal conductivity, and is conducive to improving the life of LED chips;

4) AgCuIn alloy is cheap, compared with Au-Au bonding, it greatly reduces the manufacturing cost of vertical structure LED chips, which is conducive to the market development of vertical structure LED chips.

Description of drawings

Fig. 1 is the structural representation of an embodiment of the film structure LED chip based on silver-based metal bonding of the present invention, wherein, (a) is a sectional view, (b) is a top view;

Fig. 2 is the schematic diagram of the LED epitaxial layer of an embodiment of the film structure LED chip based on silver-based metal bonding of the present invention;

3 is a schematic diagram of laser scribing division and photoetching LED chip unit effects according to an embodiment of the present invention, wherein (a) is a sectional view, and (b) is a top view;

Fig. 4 is the side wall passivation effect diagram of an embodiment of the thin film structure LED chip based on silver-based metal bonding of the present invention, wherein, (a) is the effect diagram of forming passivation layer material, (b) is the effect diagram of forming passivation layer Effect picture after layering;

5 is a cross-sectional view of an embodiment of an LED chip with a silver-based metal bonded thin-film structure on the surface of the p-electrode with a reflective layer and a transition layer evaporated;

Fig. 6 is the AgCuIn bonding process schematic diagram of an embodiment of the thin film structure LED chip based on silver-based metal bonding of the present invention;

FIG. 7 is a schematic diagram of laser lift-off of an embodiment of an LED chip with a thin-film structure based on silver-based metal bonding according to the present invention.

Detailed ways

In the following, the present invention will be further described by taking a vertically structured LED chip as an example in conjunction with the accompanying drawings.

As shown in Figure 1, the thin-film structure LED chip unit of the vertical structure of this embodiment includes: transfer substrate 0, bonding metal layer 1, transition layer 2, reflective layer 3, p-electrode 4, LED epitaxial layer 5, n-electrode 6. The n-surface light exit cone 7 and the passivation layer 8; wherein, on the transfer substrate 0, from bottom to top, there are bonding metal layer 1, transition layer 2, reflective layer 3, p-electrode 4 and LED epitaxial layer 5; An n-electrode 6 is formed on a small part of the LED epitaxial layer; an n-surface light-emitting cone 7 is formed on the surface of the LED epitaxial layer except for the n-electrode; the reflective layer 3 and the n-surface light-emitting cone form a light-emitting structure; in the LED chip unit The sidewalls of the laser scribed and etched paths between are filled with a passivation layer material to form a passivation layer 8 . In this embodiment, the material of the insulating layer is SiO ₂ . In the bonding metal layer 1, the composition of Ag is 40%, the composition of Cu is 50%, and the composition of In is 10%.

As shown in Figure 1 (b), the pattern of n-electrode 6 includes: a circle, two strips and two circles; wherein, two strips intersect at the center of the circle, and at one end of the two strips A circle is respectively provided as an n-electrode contact point.

As for the transfer substrate 0, the transfer substrate includes a semiconductor substrate and a p-electrode soldering layer, and the semiconductor substrate adopts a WCu structure, or Si may be used instead. The transfer substrate is bonded to the LED epitaxial layer through the AgCuIn bonding metal layer.

The size of the above planar structure is 1.1mm, which is a typical value for large-sized LED chips. For chips of any size, the size can be changed within the range of 0.2-5mm, and the size of the chip components can also be changed within an appropriate range in proportion.

The preparation method of the present embodiment specifically comprises the following steps:

1) Provide a sapphire substrate 01 with a thickness of about 400 μm as a growth substrate, first grow a non-doped GaN layer 02 with a thickness of about 2 μm, and then grow an LED epitaxial layer with a total thickness of 30 μm, including: heavily doped n-type contact layer 51, the doping concentration is about 10 ¹⁹ cm ^-3 to facilitate the formation of n-plane GaN ohmic contacts, and its thickness is about 2 μm; a thicker current spreading layer is conducive to improving the crystal quality of quantum wells in a quasi-epitaxy way; n-type layer 52 , the concentration is generally 10 ¹⁸ cm ^-3 , the thickness is about 2 μm, the thickness of the multiple quantum well 53 is about tens of nanometers, the thickness of the p-type layer 54 is about 200 nm and the thickness of the p-type contact layer 55 is about 5 nm, and the p-type contact layer is made of InGaN. It is beneficial to form ohmic contact with ITO, as shown in Figure 2.

2) Use laser scribing on the LED epitaxial layer to divide the LED epitaxial layer into independent areas, use wet etching to remove the side wall damage caused by the laser, and form a laser scribing line 08, and the laser scribing penetrates the LED epitaxial layer to the sapphire lining Bottom 01.

3) Using PECVD to deposit a 300nm _SiO2 thin film as a mask layer, using a photolithography method, using photoresist as a mask, and using ICP etching to etch to the n-type layer 51 to form an etching path 03, and obtain LED chip unit, then remove the photoresist, remove SiO ₂ , as shown in Figure 3. The wet etching condition used is a mixed acid of phosphoric acid and sulfuric acid, the etching temperature is between 200 and 250 ° C, the etching time is about 15 minutes, and the side wall etching cone is about 2 μm.

4) PECVD grows a layer of _SiO2 passivation layer material with a thickness of about 300-500nm on the LED epitaxial layer, as shown in Figure 4(a), after removing the passivation layer material on the surface of the p-type contact layer by photolithography, At the edge of the p-type contact layer, a part of the material of the passivation layer remains within 10 μm from the edge to form a passivation layer 8 , as shown in FIG. 4( b ), so as to better realize sidewall protection.

5) Evaporate an ITO transparent conductive electrode on the epitaxial layer of the LED as the p-electrode 4 with a thickness of 230 nm, and then vapor-deposit the reflective layer 3 and the transition layer 2 on the surface of the p-electrode, as shown in FIG. 5 .

6) Simultaneously vapor-deposit AgCuIn alloy with a thickness of about 2 μm on the surface of the transfer substrate 0 and the LED epitaxial layer on which the p-electrode and reflective layer have been vapor-deposited. The metal evaporated by the electron beam is AgCuIn ternary alloy solder. The conditions were as follows: a) 500 nm thick AgCuIn alloy was evaporated at 0.5 nm/s; b) 750 nm thick AgCuIn alloy was evaporated at 10 nm/s; c) after a 3 minute interval, step b) was repeated . Then anneal for 30min under _N2 atmosphere at 300°C to ensure uniform alloy composition.

7) Bonding the transfer substrate and the LED epitaxial layer together, as shown in FIG. 6 . The steps used for bonding are: a) boost the pressure to 800kg, raise the temperature to 80°C, and hold for 3 minutes; b) raise the pressure to 4000kg, raise the temperature to 300°C, and hold for 3 minutes; c) keep the pressure, and raise the temperature to 380 ℃, keep for 30min; d) keep the pressure, cool down to 300℃, keep for 3min; e) keep the pressure, cool down to 80℃, keep for 3min; f) drop the temperature to room temperature, completely unload the pressure.

8) Perform laser lift-off, the laser is incident from the sapphire substrate 01, and the sapphire substrate 01 is lifted off, as shown in FIG. 7, and the non-doped GaN layer is exposed.

9) Use ICP to etch away the non-doped GaN layer, and expose the heavily doped n-type contact layer, and then use the etching method to clean the surface of the heavily doped n-type contact layer and expand the laser scribing line to a certain extent to achieve stress adjustment.

10) The n-electrode 6 is deposited.

11) Forming periodic or non-periodic n-plane light exit cones 7 on the surface of the n-type contact layer.

12) Cut the LED epitaxial layer mechanically or laser along the etching aisle, test and sort to obtain LED chip units, as shown in Fig. 1 .

Finally, it should be noted that the purpose of publishing the implementation is to help further understand the present invention, but those skilled in the art can understand that various replacements and modifications can be made without departing from the spirit and scope of the present invention and the appended claims. It is possible. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the protection scope of the present invention is subject to the scope defined in the claims.

Claims (10)

1. A thin-film structure LED chip based on silver-based metal bonding, characterized in that, for a vertical structure light-emitting diode LED chip, the LED chip unit includes: a transfer substrate, a bonding metal layer, a transition layer, a reflective layer, P-electrode, LED epitaxial layer, n-electrode, n-surface light-emitting cone and passivation layer; wherein, on the transfer substrate from bottom to top are bonding metal layer, transition layer, reflective layer, p-electrode and LED epitaxial layer ; form an n-electrode on a small part of the LED epitaxial layer; form an n-surface light-emitting cone on the surface of the LED epitaxial layer except for the n-electrode; the reflective layer and the n-surface light-emitting cone form a light-emitting structure; between chip units A passivation layer is formed on the side wall of the laser scribing and etching walkway; the bonding metal layer adopts AgCuIn alloy. 2. A thin-film structure LED chip based on silver-based metal bonding, characterized in that, for a flip-chip structure LED chip, the LED chip unit includes: LED epitaxial layer, n electrode, p electrode, reflective layer, bonding metal layer, passivation layer, and transfer substrate; wherein, the LED epitaxial layer includes an n-type contact layer, a multi-quantum well region, and a p-type contact layer in order from small to top; a part of the n-type contact layer is exposed by etching, and the exposed n-type The n-electrode is prepared on the p-type contact layer; the p-electrode is prepared on the p-type contact layer, and the reflective layer is prepared on the p-electrode; the passivation layer is wrapped around the side wall of the LED epitaxial layer and the n-electrode; the bonding metal is deposited on the reflective layer layer; the bonding metal layer bonds the LED epitaxial layer and the transfer substrate together. 3. The LED chip according to claim 1 or 2, characterized in that, in the AgCuIn alloy used for the bonding metal layer, the composition of Ag is between 40% and 50%, and the composition of Cu is between 40% and 50%. %, and the composition of In is between 10 and 20%. 4. A method for preparing a thin-film structure LED chip unit based on silver-based metal bonding, characterized in that, for a vertical structure LED chip, the method for preparing comprises the following steps: 1) Provide a growth substrate suitable for the laser lift-off process, grow a non-doped GaN layer on the growth substrate, and grow an n-type contact layer, n-type layer, multiple quantum wells, p-type layer and p-type layer on the non-doped GaN layer in sequence The contact layer forms the LED epitaxial layer; 2) Use laser scribing on the LED epitaxial layer to divide the separated LED chip units, go deep into the growth substrate, form a laser scribing line, clean the laser scribing line, and remove the side wall damage area and the residue in the laser scribing line; 3) A mask layer is grown on the LED epitaxial layer, and the LED chip unit is etched on the mask layer until the n-type layer is etched to form an etching aisle, and the mask layer is removed to expose the p-type contact layer, and the etching is further removed. etch damage, and then remove the mask layer; 4) Re-grow the passivation layer material on the LED epitaxial layer, prepare the pattern by photolithography and perform wet etching, remove the passivation layer material on the surface of the p-type contact layer, and retain the laser scribing and etching the sidewall of the aisle passivation layer material to form a passivation layer; 5) vapor-depositing a p-electrode on the surface of the p-type contact layer, and then vapor-depositing a reflection layer and a transition layer on the surface of the p-electrode; 6) Evaporating the bonding metal on the surface of the transition layer and the transfer substrate by means of electron beam evaporation. The material of the bonding metal is AgCuIn alloy, and then performing thermal annealing on the bonding metal; 7) Buckle the transfer substrate on which the bonding metal has been evaporated to the LED epitaxial layer formed on the growth substrate, and bond the transfer substrate and the LED epitaxial layer together under high temperature and pressure, and the bond on the transition layer The bonding metal and the bonding metal on the transfer substrate are fused into a bonding metal layer; 8) using a laser lift-off method to remove the growth substrate, and expose the non-doped GaN layer, and clean the surface of the stripped LED epitaxial layer; 9) Perform wet and dry etching to remove the non-doped GaN layer, expose the n-type contact layer, and expand the laser scribing track to release part of the residual stress; 10) Evaporate the metal of the n-electrode, remove part of the metal by stripping, expose most of the n-type contact layer, form the n-electrode, and anneal to obtain a stable ohmic contact; 11) Passivating the electrodes and sidewalls, roughening the surface of the n-type contact layer, forming periodic or non-periodic n-surface light-emitting cones, thereby forming a light-exiting structure including a reflective layer and an n-surface light-emitting cone; 12) Cutting the epitaxial layer of the LED by machine or laser, testing and sorting to obtain LED chip units. 5. The preparation method according to claim 4, characterized in that, in step 6), the bonding metal is an AgCuIn alloy, and the vapor deposition process comprises the following steps: a) vapor deposition at a constant speed of 0.4 to 0.5 nm/s A layer of AgCuIn alloy with a thickness between 400-500nm; b) Evaporate a layer of AgCuIn alloy with a thickness between 500-1000nm at a constant speed of 8-12nm/s; c) After an interval of 1-5min, repeat Step b). 6 . The preparation method according to claim 4 , wherein, in step 6), after the vapor deposition of the AgCuIn alloy is completed, annealing is carried out at 200-300° C. for 20-30 minutes under a nitrogen atmosphere. 6 . 7. The preparation method according to claim 4, characterized in that, in step 7), the bonding process includes: a) increasing the pressure to 800-1000kgf/wafer, and raising the temperature to 80-120°C, The holding time is between 1 and 3 minutes; b) the pressure is increased to 4000 to 5000kgf/wafer, the temperature is raised to between 200 and 300°C, and the holding time is between 1 and 3 minutes; c) the pressure is kept constant, and the temperature is raised to 300-500°C, the holding time is between 10-30min; d) keep the pressure constant, the temperature drops to 200-300°C, and the holding time is between 1-3min; e) keep the pressure constant, The temperature drops to 80-120°C, and the holding time is between 1-3 minutes; f) The temperature drops to room temperature, and the pressure is completely unloaded. 8. A method for preparing a thin-film structure LED chip unit based on silver-based metal bonding, characterized in that, for a flip-chip structure LED chip, the preparation method comprises the following steps: 1) Provide a growth substrate suitable for the laser lift-off process, and grow an LED epitaxial layer on the growth substrate, from the growth substrate upwards, including an n-type contact layer, a multiple quantum well and a p-type contact layer in sequence; 2) Laser scribing is used to separate the LED epitaxial layer into independent dies; 3) using an inductively coupled plasma ICP etching method to etch a part of the p-type contact layer on the surface of each die to expose the n-type contact layer, and simultaneously form an etching walkway around each die; 4) preparing an n-electrode on the exposed n-type contact layer; 5) preparing a p-electrode on the p-type contact layer; 6) further preparing a reflective layer on the p-electrode; 7) Deposit to form a passivation layer, the passivation layer wraps the etching channel, and isolates the n-electrode and the p-electrode; 8) Evaporating the bonding metal on the surface of the reflective layer and the surface of the transfer substrate respectively, the material of the bonding metal adopts AgCuIn alloy, and then thermally annealing the bonding metal; 9) Buckle the transfer substrate evaporated with the bonding metal onto the LED epitaxial layer formed on the growth substrate, and bond the transfer substrate and the LED epitaxial layer together under high temperature and high pressure, and the bond on the transition layer The bonding metal and the bonding metal on the transfer substrate are fused into a bonding metal layer; 10) using a laser lift-off method to remove the growth substrate, and cleaning the surface of the stripped LED epitaxial layer; 11) Roughening the surface of the LED epitaxial layer after laser lift-off to form an n-plane light-emitting cone; 12) Cutting the epitaxial layer of the LED by machine or laser, testing and sorting to obtain LED chip units. 9. The preparation method according to claim 8, characterized in that, in step 8), the bonding metal is an AgCuIn alloy, and the vapor deposition process comprises the following steps: a) vapor deposition at a constant speed of 0.4 to 0.5 nm/s A layer of AgCuIn alloy with a thickness between 400 and 500nm; b) Evaporate a layer of AgCuIn alloy with a thickness between 500 and 1000nm at a constant speed of 8 to 12nm/s; c) After an interval of 1 to 5min, repeat Step b). 10. The preparation method according to claim 8, characterized in that, in step 9), the bonding process includes: a) raising the pressure to 800-1000kgf/wafer, and raising the temperature to 80-120°C, The holding time is between 1 and 3 minutes; b) the pressure is increased to 4000 to 5000kgf/wafer, the temperature is raised to between 200 and 300°C, and the holding time is between 1 and 3 minutes; c) the pressure is kept constant, and the temperature is raised to 300-500°C, the holding time is between 10-30min; d) keep the pressure constant, the temperature drops to 200-300°C, and the holding time is between 1-3min; e) keep the pressure constant, The temperature drops to 80-120°C, and the holding time is between 1-3 minutes; f) The temperature drops to room temperature, and the pressure is completely unloaded.