CN105022589A - Electronic device and operation method thereof - Google Patents

Abstract

An electronic device comprises a microcontroller, a nonvolatile memory, a dynamic random access memory, an image processing unit, a cache and an interface switching unit. The non-volatile memory is used for storing instructions used by the microcontroller. The dynamic random access memory is used for storing image data and loading the instruction of the microcontroller after the electronic device is started. The image processing unit is coupled to the DRAM for accessing image data. The cache is coupled to the microcontroller. The interface switching unit is coupled to the cache, the nonvolatile memory and the dynamic random access memory. When the microcontroller fails to successfully read instructions from the cache, the interface switching unit dynamically switches to cause the microcontroller to read instructions from the non-volatile memory or to read instructions from the dynamic random access memory.

Description

Electronic device and method of operation thereof

technical field

The present invention relates to an electronic device, and in particular to an electronic device for image processing.

Background technique

With the development of technology and the rapid development of portable electronic products, image processing has become an indispensable technology in most electronic products. Whether it is in a tablet computer, a mobile phone or a projection device, image processing is required to Display the image. The image data is stored in the memory, and related image processing is performed by reading and writing the memory.

However, as the requirements for picture resolution increase, the frequency of reading and writing to the memory and the amount of data gradually increase. Taking a 720p image with a resolution of 60 as an example, there are 60 pictures per second, each picture has 1080x720 pixels, each pixel has three sub-pixels of red, green and blue, and the amount of access to the memory is equivalent huge. When accessing image data to the memory, if the microcontroller needs to read data from the memory at this time, it may cause the problem that the bandwidth of the memory is not enough to load, which will lead to data loss, and the user will watch the screen jitter or occur. The phenomenon of breaking the picture.

Therefore, how to solve the problem of image jitter and broken images when the bandwidth of the memory is insufficient is one of the topics that the industry is currently working on.

Contents of the invention

The invention relates to an electronic device and its operating method.

According to a first aspect of the present invention, an electronic device is provided, including a microcontroller, a non-volatile memory, a dynamic random access memory, an image processing unit, a cache, and an interface switching unit. Non-volatile memory is used to store instructions used by the microcontroller. The DRAM is used to store image data, and after the electronic device is started, the instructions of the microcontroller are loaded from the non-volatile memory. The image processing unit is coupled to the DRAM for accessing image data. A cache is coupled to the microcontroller. The interface switching unit is coupled to the cache, the non-volatile memory and the dynamic random access memory. When the microcontroller needs to read instructions, the microcontroller reads instructions from the cache first. When the microcontroller cannot successfully read instructions from the cache, the interface switching unit switches dynamically, so that the microcontroller is not easy to read. A volatile memory read instruction or a DRAM read instruction. The instructions read by the microcontroller from the DRAM are stored in the cache memory.

According to another aspect of the present invention, a method for operating an electronic device is proposed, including: storing instructions used by a microcontroller with a non-volatile memory; storing image data with a dynamic random access memory, and storing the image data after the electronic device is started Load the instruction of the microcontroller from the non-volatile memory; access the image data with the image unit; and when the microcontroller needs to read the instruction, the microcontroller preferentially reads the instruction from the cache, and when the microcontroller cannot succeed When reading instructions from the cache, use the interface switching unit to dynamically switch, so that the microcontroller reads instructions from the non-volatile memory or reads instructions from the dynamic random access memory; wherein, the microcontroller reads instructions from the dynamic random access memory Instructions that have been fetched from memory are stored in cache memory.

In order to have a better understanding of the above and other aspects of the present invention, preferred embodiments will be described in detail below together with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of an electronic device according to another embodiment of the present invention.

[Description of labels]

10, 12: Electronic device 100: Microcontroller

102: Non-volatile memory 104: Dynamic random access memory

106: Image processing unit 108: Cache

110: Interface switching unit 112: Memory control unit

114: bus

Detailed ways

In an image processing device, a dynamic random access memory (Dynamic Random Access Memory, DRAM) is used to store image data. For example, in a projection device, when image data is input, data is continuously written into the DRAM, and when image data is output, the DRAM needs to be continuously read.

However, the DRAM is also used to store instructions required by a microcontroller (microcontroller), so the microcontroller also needs to access the DRAM during the operation of the device. Due to the characteristics of image data, DRAM is accessed in the form of continuous addresses, and image reception and image playback often have real-time (real time) requirements. If the microcontroller needs to read instructions from the DRAM when the DRAM is performing continuous address access of a large amount of image data, that is, the insertion interrupts the original continuous address access, making it necessary to jump to a farther address in the DRAM, which may cause The bandwidth of DRAM is not enough for the load, and the access speed of DRAM cannot keep up with the demand of real-time playback, resulting in broken images.

To solve the above problems, a layer of memory, called cache memory, is added between the microcontroller and the DRAM. The instructions read by the microcontroller from the DRAM are stored in the cache, that is, the cache is used to temporarily store data frequently used by the microcontroller. When the microcontroller needs to read instructions later, it will read from the cache first. If it already exists in the cache, it can be successfully read (cache hit) without accessing the DRAM and will not interrupt the image. Data access.

However, considering the actual hardware, the cache space is limited, and there may be a situation where instructions cannot be successfully read from the cache (cache miss). At this time, instructions still need to be read from DRAM. Therefore, the present invention proposes a method of using a cache memory, a non-volatile memory, and an interface switching unit to reduce the system's demand on DRAM bandwidth while taking into account the performance of the microcontroller.

FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present invention. The electronic device 10 includes a microcontroller 100 , a non-volatile memory 102 , a DRAM 104 , an image processing unit 106 , a cache 108 and an interface switching unit 110 . The functions of each component are described in detail as follows.

The microcontroller 100 controls the operation of the electronic device 10 , and the non-volatile memory 102 is used to store a plurality of instructions used by the microcontroller 100 . Since the nonvolatile memory 102 can still store data even when there is no power supply, the nonvolatile memory 102 can stably store a plurality of instructions used by the microcontroller 100 regardless of the switching state of the electronic device 10. . The nonvolatile memory 102 is, for example, flash memory.

Compared with the non-volatile memory 102, the access speed of the DRAM 104 is faster. Therefore, when the electronic device 10 starts up, the DRAM 104 loads a plurality of instructions used by the microcontroller 100 from the non-volatile memory 102 , so that the microcontroller 100 can read instructions from the DRAM 104 . In addition, the DRAM 104 is also used to store image data used in image processing. The DRAM 104 is, for example, a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM).

The image processing unit 106 is coupled to the DRAM 104 for accessing image data, including writing and reading the DRAM 104 . The image processing unit 106 can be connected to a source of projected images (such as an external computer) to write image data into the DRAM 104 . The image processing unit 106 may also be a unit for playing images, and reads image data from the DRAM 104 .

The cache 108 is coupled to the microcontroller 100 . The instructions read by the microcontroller 100 from the DRAM 104 are stored in the cache 108 . When the microcontroller 100 needs to read instructions, the microcontroller 100 preferentially reads instructions from the cache memory 108 , so as to have better performance and avoid accessing the DRAM 104 .

The interface switching unit 110 is coupled to the cache memory 108 , the non-volatile memory 102 and the DRAM 104 . When the microcontroller 100 needs to read instructions, the microcontroller 100 preferentially reads the instructions from the cache 108, and when the microcontroller 100 cannot successfully read the instructions from the cache 108, the interface switching unit 110 dynamically switches to make Microcontroller 100 reads instructions from non-volatile memory 102 or from DRAM 104 .

In detail, when the microcontroller 100 cannot successfully read instructions from the cache memory 108, the interface switching unit 110 dynamically switches the source of the microcontroller 100 read instructions, which is switched between the non-volatile memory 102 and the DRAM. between access memory 104. Reading instructions from the DRAM 104 is faster, but may affect the ongoing image data access, thus resulting in the degradation of displayed image quality. In order to take image quality into consideration, the microcontroller 100 can read instructions from the non-volatile memory 102, but the reading speed is relatively slow.

The interface switching unit 110 can dynamically switch according to the current usage status of the DRAM 104 , for example, according to the usage rate of the DRAM 104 and the data transmission bandwidth. When the image processing unit 106 is accessing a large amount of image data to the dynamic random access memory 104, the data transmission bandwidth used is relatively large. Instructions avoid affecting the access of image data, that is, slightly reduce the performance of the microcontroller 100, but improve the stable quality of the image.

The interface switching unit 110 can also be dynamically switched according to the performance of the microcontroller 100 . For example, when it is found that the performance of the microcontroller 100 is insufficient and needs to be improved, it switches to read the DRAM 104 to increase the read speed.

The interface switching unit 110 can also be dynamically switched according to the status of the image processing unit 106 accessing image data from the DRAM 104 . For example, a frame has multiple rows of pixels. When the image data is scanned and played row by row, there will be idle time when scanning between rows, and the DRAM 104 is not read temporarily. Actions. When scanning to the last pixel of a row of images, since the image processing unit 106 does not access the DRAM 104 , the interface switching unit 110 switches the source of read commands from the microcontroller 100 to the DRAM 104 . And when scanning the next row of images, it can switch to read from the non-volatile memory 102 .

The interface switching unit 110 can also be dynamically switched through manual operation by the user. For example, when the user sees that the actual displayed image shakes or is broken on the screen, the user can manually control, for example, by controlling a physical switch or touching a button on the screen, so that the interface switching unit 110 switches to reading from non-volatile memory 102 to reduce the frequency of microcontroller 100 reading from DRAM 104 .

FIG. 2 is a schematic diagram of an electronic device according to another embodiment of the present invention. The difference between the electronic device 12 in this embodiment and the previous embodiment is that the electronic device 12 further includes a memory control unit 112, which is coupled between the interface switching unit 110 and the non-volatile memory 102, and the memory control unit 112 uses to control access to the non-volatile memory 102 . The non-volatile memory 102 is, for example, a serial interface flash memory using a serial interface, and the memory control unit 112 is, for example, a serial peripheral interface controller (Serial Peripheral Interface controller, SPI controller). Using a serial interface can reduce the number of connections and reduce the overall cost.

The electronic device 12 may further include a bus 114 , both the microcontroller 100 and the cache 108 are connected to the bus 114 , and messages are transmitted between the microcontroller 100 and the cache 108 through the bus 114 . The bus 114 is, for example, an Advanced Microcontroller Bus Architecture High-Performance Bus (AHB).

The electronic devices in the present invention are, for example, portable electronic devices, such as mobile devices such as mobile phones and tablet computers. In the mobile device, due to the consideration of power saving, there is no need to use DRAM with high operating frequency. In such a mobile device, when image processing is performed, the bandwidth of the memory is likely to be insufficient to load. Using the above-mentioned electronic device of the present invention can dynamically adjust the timing when the microcontroller reads the DRAM, so that when the DRAM is busy accessing image data, the microcontroller can read from the nonvolatile memory. memory read instruction. In addition, the electronic device in the present invention is, for example, an electronic device with a projection function, such as a miniature projector or a mobile phone with a projection function.

The present invention also proposes a method for operating an electronic device, including: storing instructions of a microcontroller with a non-volatile memory; storing image data with a dynamic random access memory, and loading from the non-volatile memory after the electronic device is started Instructions from the microcontroller; accessing image data in image units; and when the microcontroller needs to read instructions, the microcontroller preferentially reads instructions from the cache, and when the microcontroller cannot successfully read instructions from the cache , using the interface switching unit to dynamically switch, so that the microcontroller reads instructions from the non-volatile memory or reads instructions from the dynamic random access memory; wherein, the instructions that the microcontroller has read from the dynamic random access memory are stored in the cache.

In the above-mentioned electronic device and its operating method according to the embodiment of the present invention, since the source of the microcontroller read command is switched by the interface switching unit, the problem of the bandwidth of the dynamic random access memory being overwhelmed can be effectively avoided, and its specific effect can be reflected in the actual displayed image. Compared with the traditional way of accessing dynamic random access memory, when the bandwidth is overwhelmed, the display image will be broken. Using the above-mentioned electronic device, when the use of dynamic random access memory is caused by a large amount of image data When the rate is high, it can be switched so that the microcontroller reads instructions from the non-volatile memory, that is, the performance of the microcontroller is slightly reduced within the tolerable range, but the quality of the displayed image is improved, and the displayed image can be seen in the actual measurement There will be no broken pictures, but a better viewing experience for users.

In addition, the interface switching unit in the present invention is dynamically switched, that is, it can be adjusted according to actual use requirements, and has better flexibility in use. For example, when the performance of the microcontroller is insufficient, it switches to read the DRAM, and when the bandwidth of the DRAM is insufficient, it switches to read the non-volatile memory. For another example, it can be dynamically switched according to the state of the image data, or the timing of switching can be determined by the user. Therefore, a better corresponding adjustment method can be made according to the current situation of the electronic device, and can also be set according to the user's needs, not only maintaining good display image quality, but also more flexible and easy to operate in use.

To sum up, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims (18)

1. an electronic installation, comprising:

One microcontroller;

One nonvolatile memory, in order to store multiple instructions that this microcontroller uses;

One dynamic RAM, in order to store a view data, and after this electronic installation starts, loads the plurality of instruction of this microcontroller from this nonvolatile memory;

One graphics processing unit, is coupled to this dynamic RAM, in order to access this view data;

One high-speed cache, is coupled to this microcontroller; And

One interface switch unit, is coupled to this high-speed cache, this nonvolatile memory and this dynamic RAM;

Wherein, when this microcontroller need read the plurality of instruction at least one of them time, this microcontroller preferentially from this high-speed cache read the plurality of instruction at least one of them, when this microcontroller cannot successfully from this high-speed cache read the plurality of instruction at least one of them time, this interface switch unit dynamically switches, make this microcontroller from this nonvolatile memory read the plurality of instruction at least one of them or from this dynamic RAM read the plurality of instruction at least one of them;

Wherein, this microcontroller is be stored in this high-speed cache from the finger that this dynamic RAM read.

2. electronic installation according to claim 1, wherein this interface switch unit dynamically switches according to the utilization rate of this dynamic RAM and data transmitting bandwidth.

3. electronic installation according to claim 1, wherein this interface switch unit dynamically switches according to the usefulness of this microcontroller.

4. electronic installation according to claim 1, the state that wherein this interface switch unit accesses this view data according to this graphics processing unit from this dynamic RAM dynamically switches.

5. electronic installation according to claim 1, wherein this interface switch unit is dynamically switched by user's manual operation.

6. electronic installation according to claim 1, wherein this nonvolatile memory is a flash memory, and this dynamic RAM is a double data rate dynamic RAM.

7. electronic installation according to claim 1, also comprises a memory control unit, is coupled between this interface switch unit and this nonvolatile memory, in order to control this nonvolatile memory of access.

8. electronic installation according to claim 7, wherein this memory control unit is a sequence Peripheral Interface Controller.

9. electronic installation according to claim 1, wherein this microcontroller and this high-speed cache are all connected to a bus.

10. electronic installation according to claim 9, wherein this bus is an advanced Microcontroller Bus Architecture high-level efficiency bus.

11. electronic installations according to claim 1, wherein formula electronic installation to be held by this electronic installation.

12. electronic installations according to claim 1, wherein this electronic installation is the electronic installation with projecting function.

The method of operating of 13. 1 kinds of electronic installations, this electronic installation comprises a microcontroller, a nonvolatile memory, a dynamic RAM, a graphics processing unit is coupled to this dynamic RAM, a high-speed cache is coupled to this microcontroller and an interface switch unit is coupled to this high-speed cache, this nonvolatile memory and this dynamic RAM, and this method of operating comprises:

With multiple instructions that this microcontroller of this non-volatile memory storage uses;

Store a view data with this dynamic RAM, and load the plurality of instruction of this microcontroller from this nonvolatile memory after this electronic installation starts;

This view data is accessed with this elementary area; And

When this microcontroller need read the plurality of instruction at least one of them time, this microcontroller preferentially from this high-speed cache read the plurality of instruction at least one of them, when this microcontroller cannot successfully from this high-speed cache read the plurality of instruction at least one of them time, dynamically switch with this interface switch unit, make this microcontroller from this nonvolatile memory read the plurality of instruction at least one of them or from this dynamic RAM read the plurality of instruction at least one of them;

Wherein, this microcontroller is be stored in this high-speed cache from the instruction that this dynamic RAM read.

14. methods of operating according to claim 11, also comprise and control this nonvolatile memory of access with a memory control unit, this memory control unit is coupled between this interface switch unit and this nonvolatile memory.

15. methods of operating according to claim 11, wherein this interface switch unit dynamically switches according to the utilization rate of this dynamic RAM and data transmitting bandwidth.

16. methods of operating according to claim 11, wherein this interface switch unit dynamically switches according to the usefulness of this microcontroller.

17. methods of operating according to claim 11, the state that wherein this interface switch unit accesses this view data according to this graphics processing unit from this dynamic RAM dynamically switches.

18. methods of operating according to claim 11, wherein this interface switch unit is dynamically switched by user's manual operation.