CN105009267B - The manufacture method of power device - Google Patents

Abstract

An object of the present invention is to provide a method of manufacturing a power device capable of meeting strict requirements for wafer thinning and having excellent productivity, and further provide a method of manufacturing a power device capable of manufacturing a power device with less energy loss and excellent heat dissipation. The method for manufacturing a power device of the present invention is characterized in that it includes the following steps (1) to (7) in order: (1) a step of forming electrodes on at least the wafer surface; (2) a step of back grinding (BG) the wafer. process; (3) the process of forming an electrode, that is, back metal (BM) on the back of the wafer; (4) the process of pasting a glass substrate on the back of the wafer; (5) forming a UBM on the electrode on the surface of the wafer by electroless plating Steps; (6) a step of peeling off the glass substrate on the back of the wafer; (7) a step of attaching a dicing tape to the back of the wafer, performing dicing, and picking up from the dicing tape to form chips.

Description

Manufacturing method of power device

technical field

The present invention relates to a method of manufacturing a power device, and more particularly to a method of manufacturing a power device capable of thinning.

Background technique

IGBT (Insulated Gate Bipolar Transistor: Insulated Gate Bipolar Transistor), power MOSFET (MOS Field Effect Transistor (Metal Oxide Semiconductor Field Effect Transistor)), IPD (Intelligent Power Device (Intelligent Power Device)) and other power devices, from reducing energy From the standpoint of characteristics such as loss and heat dissipation, thinner chips are required, and the establishment of a manufacturing process for thinner wafers is strongly required. In addition, as a bonding technique, UBM (Underbump Metallurgy: Under Bump Metallurgy) is frequently formed on Al electrodes and Cu electrodes on the wafer surface for the purpose of securing high reliability for wire bonding and solder bonding.

As the formation method of UBM, it is often formed by the electroless plating method that can be expected to be low-cost. Usually, the Ni/Au film is formed by electroless nickel plating and displacement electroless gold plating. Electroless palladium plating is performed between the electrolytic gold plating as a barrier layer for Ni diffusion due to heat to form a Ni/Pd/Au film or a Ni/Pd film in which displacement type electroless gold plating is omitted.

As a general power device manufacturing method, in the previous process, after forming the structure inside the wafer and forming Al or Cu electrodes on the surface, Ni/Au, Ni/Pd or Ni/Pd/ Au film. Thereafter, backside grinding (BG) is performed to thin the wafer, and an electrode (back metal; back metal (BM: backmetal)) is formed on the back surface of the wafer. Thereafter, after inspection of electrical characteristics and the like, a dicing tape (dicing tape) is attached to the back surface, and dicing (dicing) is performed to form chips.

However, in the above-mentioned method, for the recent further thinning of the chip, heat is consumed in the above-mentioned back grinding and back metal formation (BG·BM) process, the Ni film of the UBM is crystallized, and the wafer is warped. There is a problem that there may be an obstacle to the subsequent process. Therefore, it is not possible to make the thickness of the wafer sufficiently thin, or to deal with it by making the film thickness of the Ni plating layer as thin as possible.

In addition, Patent Document 1 discloses a method of manufacturing a semiconductor device in order to reduce the need for ion implantation, heat treatment, and formation of rear electrodes on the back of the wafer in the process of thinning the wafer. In order to reduce the warpage of the semiconductor substrate when forming the surface electrode and reduce the crack rate of the semiconductor substrate, the thin semiconductor substrate after back grinding and etching is pasted on the support substrate (glass substrate), and then the back electrode is formed. However, in the semiconductor device described in Patent Document 1, there is no description on the formation of the UBM, and especially nothing is shown on the above-mentioned problems in the formation of the back electrode after the formation of the UBM.

In addition, in the semiconductor device, when the backside grinding and back metal forming process are performed after the plating treatment process as described above, if the film thickness of the plating layer is thick, the stress of the plating layer also becomes large, so the wafer warps, and the subsequent The process has adverse effects.

Regarding such a problem, a method of performing a back grinding and a back metal forming step before the plating treatment step has been studied as follows.

For example, each of the above steps is performed in the order of the following (1) to (4).

(1) Wafer back grinding and back metal forming process;

(2) Plating treatment process for forming under-bump metallurgy (UBM) on the wafer surface;

(3) Cutting process;

(4) Chip separation process.

However, in the above-mentioned manufacturing method, since the back grinding step is performed before the plating treatment step, problems such as adhesion to the back surface of the wafer to be plated and damage to the wafer arise. Therefore, as disclosed in each of Patent Documents 2 to 4, it is possible to prevent adhesion to the back surface of a wafer to be plated by using a jig for plating.

However, if a special jig for plating is used, especially in the case of a thin wafer, warping of the wafer tends to occur during attachment and detachment of the jig. In addition, a special jig for plating deteriorates wafer handling, and since a large space is required, there is a problem that it is difficult to plate many wafers at one time.

In order to solve this problem, a method of manufacturing a semiconductor device is disclosed in Patent Document 5. The manufacturing method includes: a back grinding step 1 on the back of the wafer; Step 2 of having an adhesive film of a re-peelable adhesive on the adhesive surface; then, for the wafer with the adhesive film attached on the back, perform electroless plating treatment step 3 for forming an under bump metal (UBM) on the wafer surface, Next, step 4 of peeling off the adhesive film is implemented.

According to this method, air bubbles may be generated at the wafer/tape interface due to the expansion and contraction of the tape in the plating process, which may lower the yield.

In addition, Patent Document 6 discloses a method in which, as a semiconductor device in which warping and damage of the wafer are suppressed when the wafer is plated, and the efficiency of the plating process of the wafer is good, the wafer is thinned and then the surface of the wafer is thinned. The back side is fixed in a ring frame with dicing tape, and the surface of the fixed wafer is plated.

Since the plating process is performed by fixing the back surface of the wafer in the ring frame, warping of the wafer during the plating process is suppressed. However, when it is fixed in the ring frame, it becomes correspondingly large, so the size of the tank of the plating production line also becomes large, and it may not be able to cope with existing equipment. In addition, due to the expansion and contraction of the tape in the plating process, air bubbles may be generated at the wafer/tape interface, which may lower the yield.

In addition, Patent Document 7 describes a method of manufacturing a semiconductor sensor. In this method, in order to improve the corrosion resistance to corrosive media, when a connection terminal is directly formed on an Al electrode in a pad portion, the Electroless plating is performed in a state where the back surface of the substrate is covered with an insulator such as a glass substrate. The above-mentioned Patent Document 7 is an invention related to a method of manufacturing a semiconductor sensor. A diaphragm (diaphragm) having a concave portion formed on the back surface of the substrate is provided on a semiconductor substrate. Cloth material and glass substrate are the constituent parts of the product.

prior art literature

patent documents

Patent Document 1: Japanese Patent No. 4525048

Patent Document 2: Japanese Patent Laid-Open No. 2002-339078

Patent Document 3: Japanese Patent Laid-Open No. 2002-339079

Patent Document 4: Japanese Patent Laid-Open No. 2002-343851

Patent Document 5: Japanese Patent Laid-Open No. 2011-216584

Patent Document 6: Japanese Patent Laid-Open No. 2010-283312

Patent Document 7: Japanese Patent No. 5056862

Contents of the invention

The purpose of the present invention is to provide a product that can suppress warpage in the manufacturing process accompanying the thinning of the wafer, prevent the occurrence of defects caused by the warping, and meet the stringent requirements of the thinning of the wafer in recent years. Excellent method of manufacturing power devices. Furthermore, an object thereof is to provide a method of manufacturing a power device capable of manufacturing a power device with less energy loss and excellent heat dissipation.

The inventors of the present invention have studied various factors that cause warpage in the manufacturing process as wafers in power devices become thinner, and the influence of each warpage. As a result, it was found that the most influential factor in the warping associated with thinning is that when the electroless plating Ni film forming process, the back grinding process, and the back metal forming process are sequentially performed, the back grinding or the back metal Warpage of the wafer caused by crystallization of the Ni film of the UBM due to the influence of heat in the forming (BG·BM) process.

As a result of intensive research by the inventors of the present invention, it has been found that changing the order of the steps and performing the UBM formation step of electroless plating after the back grinding and back metal (BM) formation steps is effective in suppressing warpage accompanying wafer thickness reduction. For problems such as adhesion to the back surface of the wafer to be plated and damage to the wafer when the UBM formation process of electroless plating is performed after the back grinding and back metal (BM) formation process, by attaching a glass substrate to the back surface of the wafer, The above-mentioned problems can be solved, and the present invention has been accomplished.

That is, the present invention is as follows.

[1] A method for manufacturing a power device, comprising the following steps (1) to (7) in sequence,

(1) A process of forming electrodes on at least the wafer surface;

(2) The process of carrying out back grinding (BG) of the wafer;

(3) The process of forming electrodes (back metal (BM)) on the back of the wafer;

(4) The process of pasting the glass substrate on the back of the wafer;

(5) the process of forming UBM by electroless plating on the electrodes on the above-mentioned wafer surface;

(6) the process of peeling off the glass substrate on the back of the wafer;

(7) A process of attaching a dicing tape to the back surface of the wafer, performing dicing, and picking up from the dicing tape to form chips.

[2] The method for manufacturing a power device according to [1] above, wherein the UBM formation by electroless plating in the step (5) above is to form a Ni/Au film, Ni /Pd film, or Ni/Pd/Au film.

[3] The method for manufacturing a power device according to the above [1] or [2], wherein in the step (7), before the dicing tape is attached to the back surface of the wafer, a protective tape or a glass substrate is attached to the wafer surface. , after affixing the dicing tape to the back of the wafer, the protective tape or the glass substrate is peeled off.

According to the method of manufacturing a power device of the present invention, the thickness of the wafer can be sufficiently reduced. Even if the wafer is thinned, there is almost no warpage of the wafer, which does not hinder subsequent processes, and is also excellent in productivity. Therefore, according to the manufacturing method of the power device of the present invention, it is possible to provide a power device with less energy loss and excellent heat dissipation.

detailed description

Power devices require thinner chips. However, if the wafer is made thinner, the wafer tends to warp, and the thinner the wafer is, the larger the warpage becomes.

In the manufacturing process of a power device, when the step of forming a back metal on the back surface of the wafer and/or the step of forming a UBM are performed after back grinding, the wafer tends to warp in these steps. In addition, when the back grinding and back metal formation (BG·BM) steps are performed after the UBM is formed, heat is consumed in these steps, the Ni film of the UBM is crystallized, and the wafer is warped. The warpage when the back grinding and back metal forming (BG·BM) process is performed after the UBM is formed is larger than the warpage in the process of forming the back metal and the process of forming the UBM after the back grinding. become a problem. Even after the UBM is formed, a glass substrate is attached to the surface to form a metal backing, the warpage is large, and problems such as peeling of the wafer from the glass substrate and cracking occur.

In the method for manufacturing a power device of the present invention, in order to avoid warpage when forming a back metal after the UBM is formed, the UBM is formed by electroless plating after the back metal (BM) is formed. In addition, in order to prevent warping and cracking of the wafer when UBM is formed by electroless plating, and to facilitate handling, after the back metal (BM) is formed, the glass substrate is attached to the back surface, and the glass substrate is peeled off after the UBM is formed.

That is, the manufacturing method of the power device of this invention has the following (1)-(7) process.

(1) A process of forming electrodes on at least the wafer surface;

(2) The process of carrying out back grinding (BG) of the wafer;

(3) The process of forming electrodes (back metal (BM)) on the back of the wafer;

(4) The process of pasting the glass substrate on the back of the wafer;

(5) the process of forming UBM by electroless plating on the electrodes on the above-mentioned wafer surface;

(6) the process of peeling off the glass substrate on the back of the wafer;

(7) A process of attaching a dicing tape to the back surface of the wafer, performing dicing, and picking up from the dicing tape to form chips.

In forming the above-mentioned UBM, it is preferable to form a Ni/Au film, a Ni/Pd film, or a Ni/Pd/Au film on the electrodes on the surface of the wafer by electroless plating.

Preferably, in the step (7) above, before sticking the dicing tape to the back of the wafer, stick the protective tape or the glass substrate to the wafer surface, and peel off the protective tape or the glass substrate after sticking the dicing tape to the back of the wafer.

(1) Regarding the process of forming electrodes on at least the wafer surface

The wafer is not limited, and is formed in a disc shape with a diameter of about 50 to 300 mm, and is formed using a compound semiconductor such as silicon or GaAs.

It is only necessary to form electrodes on the surface of the wafer, and the internal structure of the wafer may also be formed.

As the electrode, an Al electrode and a Cu electrode are preferable, and examples of the Al electrode and the Cu electrode include known Al electrodes and Cu electrodes used in power devices.

The process of forming the internal structure of the wafer and the process of forming electrodes on the surface of the wafer are known wafer processing steps necessary for the manufacture of power devices. For example, known methods such as photolithography, etching, ion implantation, sputtering, and CVD can be used. to proceed. In addition, known arbitrary devices can be used as the device used in this step.

(2) About the process of back grinding (BG) the wafer

Generally, a wafer surface protection tape (back grinding tape) or a glass substrate is pasted on the wafer surface before entering the back grinding process. The wafer surface protection tape or the glass substrate protects the wafer surface on which elements are to be formed during the back grinding process, and prevents contamination of the wafer surface caused by infiltration of grinding water, grinding debris, and the like. Also in the present invention, it is preferable to stick a wafer surface protection tape (back grinding tape) or a glass substrate on the wafer surface before proceeding to the back grinding step. As the wafer surface protection tape or the glass substrate, generally commercially available ones can be used.

In addition, the wafer surface protection tape or the glass substrate attached before entering the backside grinding process is preferably peeled off after the glass substrate is attached to the backside of the wafer thereafter and before the UBM is formed.

In the present invention, the back metal is formed after the back grinding step, but if the back metal is formed after the wafer is thinned by back grinding, warping of the wafer may occur. When warping occurs, it is preferable to use a glass substrate as described in Patent Document 1 in order to suppress the warping. That is, when the wafer is warped when forming the back metal, a glass substrate is attached to the wafer surface before entering the back grinding process, and the back metal is formed with the glass substrate attached. Next, after affixing the glass substrate on the back surface, it is preferable to peel off the glass substrate on the surface before forming the UBM.

After attaching the wafer surface protection tape or the glass substrate to the wafer, a back grinding process of the wafer is performed. Known arbitrary devices can be used for the device for backside grinding, for example, by a vacuum table (table) for fixing a wafer, a rotating grindstone for grinding a wafer, supplying a grinding fluid (usually water) on a wafer during grinding, ) of the grinding fluid supply unit and other components.

A wafer whose surface is protected with a wafer surface protection tape or a glass substrate is placed on a vacuum suction table of a back grinding apparatus with its back facing upward. Next, while the wafer is suction-fixed by the vacuum table, the grinding fluid is supplied onto the wafer from the grinding fluid supply unit, and the wafer is ground to a predetermined thickness by the rotating grindstone. In addition, if necessary, after grinding with a rotary grindstone, finish grinding is performed next, and the grinding surface of a wafer is finished smooth. Through the above process, the thickness of the wafer can be reduced to, for example, 50 to 400 μm, more preferably 50 to 150 μm.

(3) Regarding the process of forming electrodes (back metal (BM)) on the back of the wafer

The back metal forming step of (3) is performed after the back grinding of (2). The back metal forming step is also called a back electrode forming step, and is a step of forming a back electrode on the back surface of the ground semiconductor wafer. Various metals can be used for the back electrode, and in the present invention, the metals generally used for the back electrode may be used. For example, a nickel silicide layer and/or a titanium layer are formed on the back surface of a substrate subjected to back grinding, and a metal layer is formed thereon. The metal layer is preferably a nickel layer, a platinum layer, a silver layer, a gold layer, or the like. The thickness of the nickel silicide layer is preferably not less than 200 nm, the thickness of the titanium layer is preferably not less than 5 nm and not more than 500 nm, and the thickness of the metal layer is preferably not less than 50 nm and not more than 1000 nm. As an apparatus for forming the above-mentioned back metal, any known apparatus can be used.

In the manufacturing method of the power device of the present invention, the back metal (back electrode) is formed before the UBM is formed. Therefore, since the Ni film of the UBM does not exist, even if heat is consumed in forming the back metal, warpage of the wafer due to crystallization of the Ni film does not occur.

(4) Regarding the process of attaching a glass substrate to the back of the wafer

After the back metal is formed, a glass substrate is attached to the back of the wafer. Its purpose is: to prevent the formation of a plating layer on the back of the wafer during electroless plating in the subsequent process; to improve the handling of thin wafers; to prevent cracking of the wafer; to prevent warpage caused by electroless plating.

In addition, when the protective tape is pasted instead of the glass substrate, bubbles may be generated at the wafer/tape interface due to the expansion and contraction of the tape during the plating process, and the yield may decrease. However, by pasting the glass substrate on the back of the wafer , there is no expansion and contraction, and no air bubbles are generated, so the productivity is improved.

The glass used for the glass substrate may be any glass, and soda-lime glass, non-alkali glass, quartz glass, borosilicate glass, and the like can be used. The thickness of the glass substrate should just have the strength as a support substrate of a wafer, and it is preferable that it is about 0.5 mm - 5 mm. It is preferable to stick the wafer and the glass substrate with a double-sided tape because it is easy. Adhesives used in double-sided tapes can be acrylic, methacrylic, silicon, polyamide, polyester, polyurethane, and EVA (copolymer of ethylene and vinyl acetate) resins, etc. , but an acrylic adhesive that is cured by UV and/or heat, or that generates gas and is easily peeled off is preferable.

The bonding of the wafer and the glass substrate may be carried out using a commercially available device.

(5) Regarding the process of forming UBM on the electrodes on the surface of the wafer by electroless plating

Next, electroless plating for forming an under bump metal (UBM) on the wafer surface is performed on the wafer with the glass substrate bonded on the back surface. The method of the electroless plating treatment itself is known, and it can be implemented by any method known to those skilled in the art, and a preferred embodiment will be described below.

When electroless plating is performed, first, as a treatment of the surface to be plated of the wafer, a cleaning step is generally performed. As the cleaning process, either dry processing or wet processing may be used. In the case of dry treatment, ashing treatment, UV treatment, reactive ion etching treatment, and the like are preferable. In the case of wet treatment, either dipping method or spin coating method can be used, but dipping method is more preferable since it can be treated uniformly. Examples of wet treatment include ultrasonic cleaning in water, immersion in an alkali or acidic degreasing solution, immersion in an aqueous surfactant solution, immersion in a soft etching solution, and the like. Examples of wet treatment include treatment with a commercially available acidic degreasing solution, alkaline degreasing solution, and soft etching solution. Using these treatments is preferable because the treatment is simple. These treatments may be used alone or in combination, and it is preferable to select the most appropriate treatment method according to the contamination of the wafer and the type of passivation.

After the above-mentioned cleaning, it is preferable to treat with a metal compound having catalytic activity when metal is deposited on the surface of the wafer by the electroless plating solution. Examples of such metal compounds include palladium compounds, zinc compounds, and the like. As the palladium compound, ammonia complexes such as palladium chlorides, hydroxides, oxides, sulfates, and ammonium salts that exhibit catalytic effects are exemplified. The palladium compound is used in the form of an aqueous solution or an organic solvent solution. As the organic solvent, for example, methanol, ethanol, isopropanol, acetone, methyl ethyl ketone, toluene, ethylene glycol, polyethylene glycol, dimethylformamide, dimethyl sulfoxide, dimethy Alkanes, etc. or their mixtures. The palladium compound is more preferably used in the form of an aqueous solution in relation to a series of treatments. In addition, zinc compounds are generally used as zincate treatment, and commercially available chemicals can be used.

After the above-mentioned metal compound treatment, the wafer is immersed in an electroless plating solution for electroless plating treatment. When electroless plating is performed, it is advantageous to accommodate a plurality of wafers in, for example, a 3-point support type or 4-point support type wafer cassette, and immerse the wafer cassette in an electroless plating solution to improve productivity. Electroless plating may be electroless plating performed by displacement or electroless plating performed by reduction. In the electroless plating solution, a metal ion source for constituting a desired plating layer is contained in the form of, for example, sulfur oxide or chloride. Furthermore, reducing agents such as formaldehyde, hydrazine, sodium hypophosphite, sodium borohydride, ascorbic acid, and glyoxylic acid, sodium acetate, EDTA, tartaric acid, malic acid, citric acid, and glycine may also be included in the electroless plating solution. and other complexing agents and precipitation control agents.

In the electroless plating solution, commonly used substances such as sodium hydroxide and potassium hydroxide can be used as a pH adjuster, but when it is desired to avoid alkali metals such as sodium and potassium in semiconductor applications, tetramethyl hydroxide is preferably used. ammonium base.

Through the above-mentioned steps, electroless plating is performed on the wafer surface to form, for example, Ni/Au, Ni/Pd, Ni/Pd/Au films, etc. on the wafer surface. In the conventional process of performing back grinding and backing metal formation after electroless plating, the thickness of the Ni plating film is less than about 1 μm due to the occurrence of warpage. From the viewpoint of securing the Ni film, the thickness is preferably 1 μm or more to form an intermetallic compound. In the present invention, since warpage is rarely generated, it is possible to increase the thickness of the film, and it only needs to be 10 μm or less in thickness. The Ni film is preferably 1 to 5 μm in terms of operational efficiency based on plating time, film formation of a metal compound with solder, and the like. In addition, the thickness of the Pd plating film is preferably 0.02 to 0.2 μm in terms of Ni diffusion barrier properties and plating time. The Au plating film is preferably 0.01 to 0.2 μm for the purpose of ensuring solder wettability.

In the present invention, since the UBM is formed after bonding the glass substrate on the back surface, damage to the wafer during plating and adhesion of plating to the back surface of the wafer can be prevented. In addition, warping of the wafer due to plating can also be prevented.

(6) Regarding the process of peeling off the glass substrate on the back of the wafer

After the step (5) above, the glass substrate bonded in the step (4) above is peeled off.

What is necessary is just to peel off using a commercially available peeling apparatus as the method of peeling. It is preferable to use an adhesive that cures or generates gas by UV or heating, since the adhesive strength with the wafer is lowered by UV or heating, and peeling is easy.

(7) Regarding the process of attaching dicing tape to the back of the wafer, performing dicing, and picking up from the dicing tape to form chips

This step itself is well known, and any method known to those skilled in the art may be used, and examples are given below.

First, using a mounter, a dicing tape is attached to the back of the wafer together with the ring frame.

Before pasting the dicing tape, a protective tape or a glass substrate can be pasted on the surface of the wafer to protect the surface. When a protective tape or a glass substrate is attached to the surface of the wafer, after affixing the dicing tape to the back of the wafer, the protective tape or the glass substrate on the surface is peeled off. As the above-mentioned protective tape or glass substrate, the same tape or glass substrate as that used in the above-mentioned (2) step or (4) step can be used. In addition, the pasting method can also use the same method as the above-mentioned (2) step or (4) step. As a protective tape, what attached the same adhesive agent as the adhesive agent used when adhering a glass substrate in the said process (4) can be used, and it can stick|attach with a commercially available apparatus. The peeling method may be performed using a commercially available peeling device. Thereafter, the wafer is placed on the dicing table of the dicing device with the surface facing upward, and is fixed by vacuum suction of the suction unit.

Next, using a dicing saw, the wafer in the ring frame is cut vertically and horizontally from the surface side to obtain individual chips. The cut individual chips are fixed with dicing tape, thereby maintaining the aligned state.

After the dicing process, the process proceeds to the chip separation process, where the separated chips are mounted at predetermined positions on the circuit board, and each chip is connected to the metal wiring of the circuit board to manufacture desired power devices.

According to the manufacturing method of the present invention, it is possible to manufacture even if the thickness of the wafer is reduced. According to the manufacturing method of the present invention, the process sequence avoids the process of warping the wafer, and the glass substrate is pasted in the process where warping of the wafer is likely to occur. Therefore, even if the wafer is thinned, the power device obtained is almost There is no warpage of the wafer, and problems due to warpage (delamination from the glass substrate during the process) do not occur in the manufacturing process, and are also excellent in productivity.

Since the thickness of the wafer can be reduced, it is possible to provide a power device with less energy loss and excellent heat dissipation.

Example

Examples of the present invention are shown below, but these examples are provided for better understanding of the present invention and are not intended to limit the present invention.

Example 1

The wafer process is performed in order of the following steps (1) to (7) to form chips.

＜Process (1)＞

Using a conventional apparatus, an 8-inch silicon test wafer was fabricated on which AlSi electrodes of 1 cm square were formed on the wafer surface, and the electrode area was 80% of the wafer surface.

＜Process (2)＞

The surface of the wafer was protected with a commercially available back grinding tape, and the back surface was ground to a thickness of 100 μm.

＜Process (3)＞

Using an existing device, a back metal was formed with a titanium layer of 100 nm, a nickel layer of 200 nm, and a gold layer of 100 nm.

＜Process (4)＞

Using a conventional device, quartz glass (1 mm thick) was attached to the back surface of the wafer using a double-sided tape with a UV-curable adhesive, and the back grinding tape in step (2) was peeled off.

＜Process (5)＞

Using a conventional method, an electroless plating film of 3 μm in nickel and 0.05 μm in gold was formed on the pad on the surface of the wafer.

＜Process (6)＞

The quartz glass on the backside of the wafer was peeled off using an existing device.

＜Process (7)＞

Using an existing device, quartz glass (1 mm thick) was pasted on the wafer surface using a double-sided tape with a UV-curable adhesive. Thereafter, a dicing tape was attached to the back surface, and the quartz glass attached to the wafer surface was peeled off, followed by dicing and picking up from the dicing tape. It was confirmed that the pick-up was possible without problems, and power devices could be manufactured even if the thickness was reduced.

Example 2

About Example 1, it carried out similarly to Example 1 except having made the thickness of the wafer which performed the back grinding in process (2) into 150 micrometers.

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

Example 3

About Example 1, it carried out similarly to Example 1 except having made the thickness of the wafer which performed the back grinding in process (2) into 50 micrometers.

It was confirmed that in the step (7), pick-up was possible without any problem, and a power device could be manufactured even if the thickness was reduced.

Example 4

About Example 1, it carried out similarly to Example 1 except having set the nickel layer of the back metal in process (3) to 400 nm.

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

Example 5

About Example 1, it carried out similarly to Example 1 except having set the electroless plating film in process (5) to 3 micrometers of nickel, 0.05 micrometers of palladium, and 0.03 micrometers of gold.

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

Example 6

About Example 1, it carried out similarly to Example 1 except having made the electroless plating film in process (5) nickel 3 micrometers, and palladium 0.2 micrometers.

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

Example 7

About Example 1, it carried out similarly to Example 1 except having used Pyrex (registered trademark) glass (1 mm thickness of borosilicate glass) as the quartz glass in process (4).

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

Example 8

Example 1 was performed in the same manner as in Example 1, except that the quartz glass in step (7) was not attached to the wafer surface, and a dicing tape was attached to the back surface and dicing was performed.

It was confirmed that it was possible to pick up without any problem in the step (7), and it was confirmed that a power device could be manufactured even if the thickness was reduced.

In the above Examples 1 to 8, by performing the step (5) of forming the UBM after the step of forming the back metal (3), even if the thickness of the wafer is reduced to 50 to 150 nm, warping can be prevented and the productivity can be improved. Power devices with predetermined thickness reductions are manufactured without any defects caused by warpage.

Comparative example 1

The procedure of the steps in Example 1 was changed to manufacture in the following procedure. As a result, the warp of the wafer became large in the step (3), and the wafer could not be manufactured.

Process sequence: (1)→(5)→(2)→(3)→(7)

Comparative example 2

In Comparative Example 1, the same process as Comparative Example 1 was performed except that a glass substrate (quartz 1mm thick) was pasted instead of the back grinding tape in the process (2). As a result, in the process (3), warping of the wafer warped, the wafer was peeled off from the glass substrate and could not be manufactured.

Comparative example 3

In Example 1, the same process as in Example 1 was performed except that the quartz glass in the step (4) was changed to a commercially available protective tape with a UV-curable adhesive. As a result, air bubbles were generated between the protective tape and the metal back layer on the back surface of the wafer, and adhesive residues adhered to the metal back layer on the back surface of the wafer.

Pickup is possible in the step (7), but the yield decreases.

Claims (3)

1. A kind of 1. manufacture method of power device, it is characterised in that successively with following (1)~(7) process,

   (1) process at least forming electrode in wafer surface；

   (2) process that chip is carried out to grinding back surface (BG)；

   (3) be in wafer back surface forming electrode back pad metal (BM) process；

   (4) process of glass substrate is pasted in chip back surface；

   (5) process for forming UBM by electroless plating on the electrode of the wafer surface；

   (6) process for peeling off the glass substrate of the chip back surface；

   (7) by pasting dicing tape in chip back surface and being cut, it is picked up from dicing tape to carry out chip Process.
2. 2. the manufacture method of power device according to claim 1, it is characterised in that pass through nothing in (5) process The UBM that electrolysis plating is carried out is formed, and is to form Ni/Au epitheliums, Ni/Pd epitheliums or Ni/Pd/Au epitheliums by electroless plating.
3. 3. the manufacture method of power device according to claim 1 or 2, it is characterised in that in (7) process, to Before chip back surface pastes dicing tape, Protection glue band or glass substrate are pasted to wafer surface, is pasted to chip back surface The Protection glue band or glass substrate are peeled off after dicing tape.