CN104977029A - Temperature sensing circuit and its conversion circuit - Google Patents

Abstract

The present invention relates to a temperature sensing circuit and a conversion circuit thereof. The temperature sensing circuit receives an input signal from a first conversion circuit, and delays the input signal according to a temperature to generate a delay signal; a counting circuit receives the delay signal and the input signal, and generates a counting data according to the time difference between the clock pulse counting delay signal and the input signal; and a second conversion circuit receives the counting data, and generates a temperature data corresponding to the counting data according to a temperature comparison table. In this way, the present invention does not need to use a delay unit that does not change with temperature changes, and reduces the overall circuit area, thereby achieving the purpose of saving costs.

Description

Temperature sensing circuit and its conversion circuit

technical field

The present invention relates to a sensing circuit and its conversion circuit, in particular to a temperature sensing circuit and its conversion circuit.

Background technique

Temperature sensing circuits are used to control a wide variety of integrated circuit functions. These dynamic functions include the update frequency of the dynamic random access memory and the delay time of the delay unit, both of which change with temperature. The chip temperature sensor changes with temperature. Changes to adjust or change the update frequency of the dynamic random access memory; similarly, the chip temperature sensor is also used to adjust or stabilize the changes in the circuit delay time, the stability of the circuit delay time is very important for the circuit It depends on the accuracy of the circuit delay provided for the correct circuit application, such as a circuit delay chain circuit; in addition, the chip temperature sensing circuit is also expected to realize the digital thermometer application.

Since the temperature sensing circuit occupies part of the integrated circuit with other integrated functions, it is very important that these integrated temperature sensing circuits occupy the smallest chip area and consume the least chip power. In addition, other components of the integrated temperature sensing circuit An important design parameter is the accuracy of the temperature measurement itself.

Please refer to FIG. 1 , which is a circuit diagram of a conventional temperature sensing circuit. As shown in the figure, the conventional temperature sensing circuit 9 includes a first delay unit 90 , a second delay unit 92 and an AND gate 94 . The first delay unit 90 receives an input signal START and delays the input signal START to generate a first delayed signal T ₁ , the second delay unit 92 receives the input signal START and delays the input signal START to generate a second delayed signal T ₂ , the AND gate 94 receives the first delayed signal T ₁ and the second delayed signal T ₂ , and performs logic operation on the first delayed signal T ₁ and the second delayed signal T ₂ to generate a temperature signal T _OT .

Please also refer to FIG. 2 , which is a waveform diagram of a conventional temperature sensing circuit. As shown in the figure, since the first delay signal T1 output by the _first delay unit 90 will vary with the temperature change, but the second delay signal T2 output by the _second delay unit 92 will not change with the temperature change , so the difference between the _first delayed signal T1 and the _second delayed signal T2 is a signal containing temperature factors, that is to say, the level of the AND gate 94 at the level of the _first delayed signal T1 and the level of the second delayed signal T When the levels of ₂ are all high levels, a temperature signal T _OT is generated to know the temperature.

However, the circuit of the second delay unit 92 that does not vary with temperature is complex and costly. Therefore, the temperature sensing circuit of the prior art increases the overall circuit area due to the use of the second delay unit 92 that does not vary with temperature. , and increase costs.

Therefore, how to propose a novel temperature sensing circuit and its conversion circuit for the above problems, which can reduce the overall circuit area and save costs, so as to solve the above problems.

Contents of the invention

One of the objectives of the present invention is to provide a temperature sensing circuit and its conversion circuit, which does not need to use a delay unit that does not change with temperature, thereby reducing the overall circuit area, thereby achieving the purpose of cost saving.

One of the objectives of the present invention is to provide a temperature sensing circuit and its conversion circuit, which uses a capacitor arranged between an inverter and an output terminal to reduce the overall circuit area and increase the temperature sensing resolution.

In order to achieve the aforementioned objects and effects, the present invention discloses a temperature sensing circuit, which includes a first conversion circuit, a counting circuit and a second conversion circuit. The first converting circuit receives an input signal, and delays the input signal according to a temperature to generate a delayed signal; the counting circuit receives the delayed signal and the input signal, and generates a counting data according to a time difference between the delayed signal and the input signal by counting a clock; The second conversion circuit receives the count data, and generates a temperature data corresponding to the count data according to a temperature comparison table. In this way, the present invention does not need to use a delay unit that does not vary with temperature, thereby achieving the purpose of cost saving.

Moreover, the first conversion circuit of the present invention is a delay circuit, and the delay circuit includes a first transistor, a second transistor and a capacitor. A first end of the first transistor is coupled to a power supply end, a second end of the first transistor is coupled to an output end of the delay circuit, a control end of the first transistor receives an input signal; a first end of the second transistor Coupling the second end of the first transistor and the output end, a second end of the second transistor is coupled to a ground end, a control end of the second transistor receives an input signal; one end of the capacitor is coupled to the power supply end and the first transistor The first terminal and the other terminal of the capacitor are coupled to the output terminal, the second terminal of the first transistor, and the first terminal of the second transistor. In this way, the present invention achieves reducing the overall circuit area and increasing the resolution of temperature sensing through the capacitance.

In addition, another embodiment of the delay circuit of the present invention may also include a first transistor, a second transistor and a capacitor. A first end of the first transistor is coupled to a power supply end, a second end of the first transistor is coupled to an output end of the delay circuit, a control end of the first transistor receives an input signal; a first end of the second transistor Coupling the second end of the first transistor and the output end, a second end of the second transistor is coupled to a ground end, a control end of the second transistor receives an input signal; one end of the capacitor is coupled to the power supply end and the first transistor The second terminal, the first terminal and the output terminal of the second transistor, and the other terminal of the capacitor are coupled to the ground terminal. In this way, the present invention achieves reducing the overall circuit area and increasing the resolution of temperature sensing through the capacitance.

The beneficial effects of implementing the present invention are: the temperature sensing circuit and its conversion circuit of the present invention, the temperature sensing circuit receives an input signal from the first conversion circuit, and delays the input signal according to a temperature to generate a delayed signal; The counting circuit receives the delay signal and the input signal, and generates a count data according to the time difference between the clock count delay signal and the input signal; and a second conversion circuit receives the count data, and generates a temperature corresponding to the count data according to a temperature comparison table data. In this way, the present invention does not need to use a delay unit that does not vary with temperature, thereby reducing the overall circuit area, thereby achieving the purpose of saving costs.

Description of drawings

FIG. 1 is a circuit diagram of a conventional temperature sensing circuit.

FIG. 2 is a waveform diagram of a conventional temperature sensing circuit.

FIG. 3 is a circuit diagram of a temperature sensing circuit according to an embodiment of the present invention.

FIG. 4 is a waveform diagram of a temperature sensing circuit according to a first embodiment of the present invention.

FIG. 5 is a waveform diagram of a temperature sensing circuit according to a second embodiment of the present invention.

FIG. 6A is a circuit diagram of a first converting circuit according to a first embodiment of the present invention.

FIG. 6B is a circuit diagram of a first converting circuit according to a second embodiment of the present invention.

FIG. 6C is a circuit diagram of a first converting circuit according to a third embodiment of the present invention.

FIG. 7A is a circuit diagram of a first converting circuit according to a fourth embodiment of the present invention.

FIG. 7B is a circuit diagram of a first converting circuit according to a fifth embodiment of the present invention.

FIG. 7C is a circuit diagram of a first converting circuit according to a sixth embodiment of the present invention.

FIG. 8A is a circuit diagram of a first conversion circuit according to a seventh embodiment of the present invention.

FIG. 8B is a circuit diagram of a first converting circuit according to an eighth embodiment of the present invention.

FIG. 8C is a circuit diagram of a first converting circuit according to a ninth embodiment of the present invention.

FIG. 9A is a circuit diagram of a first converting circuit according to a tenth embodiment of the present invention.

FIG. 9B is a circuit diagram of a first converting circuit according to an eleventh embodiment of the present invention.

FIG. 9C is a circuit diagram of a first converting circuit according to a twelfth embodiment of the present invention.

[Description of drawing number comparison]

1.9 Temperature sensing circuit

10 The first conversion circuit

12, 14 Inverter

120 first transistor

122 Second transistor

20 Counting circuit

200 Logical Units

202 Counting unit

30 Second conversion circuit

90 The first delay unit

92 Second delay unit

94 AND gate

START input signal

T ₁ first delayed signal

T ₂ second delay signal

T _OT temperature signal

DA, DA1, DA2 delayed signal

XR, XR1, XR2 Differential signal

CNT, CNT1, CNT2 count data

CLK Clock

C, C1, C2 Capacitance

R, R1, R2 resistors

IN input terminal

OUT output terminal

V _DD power terminal

Detailed ways

Certain terms are used in the specification and subsequent claims to refer to particular components. It should be understood by those skilled in the art that hardware manufacturers may refer to the same component by different terms. This specification and subsequent patent applications do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. The "comprising" mentioned in the entire specification and subsequent claims is an open term, so it should be interpreted as "including but not limited to electrical connection means. Therefore, if the text describes a first device coupled to a The first in ". In addition, the term "coupled" here includes any direct and indirect two devices, which means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. Two devices.

In order to enable your review committee members to have a further understanding and understanding of the characteristics of the present invention and the achieved effects, I would like to provide preferred embodiments and detailed descriptions, as follows:

Please refer to FIG. 3 , which is a circuit diagram of a temperature sensing circuit according to an embodiment of the present invention. As shown in the figure, the temperature sensing circuit 1 of the present invention includes a first conversion circuit 10 , a counting circuit 20 and a second conversion circuit 30 .

The first conversion circuit 10 receives an input signal START, and delays the input signal START according to a temperature to generate a delayed signal DA. In this embodiment, the first conversion circuit 10 is a delay circuit. The first conversion circuit 10 will generate a delay signal DA with different delay times as the temperature changes. For example, when the temperature is 30 degrees, the first conversion circuit 10 delays the input signal START for 10 milliseconds (ms), and generates a delay signal DA; When the temperature is 40 degrees, the first conversion circuit 10 delays the input signal START by 20 milliseconds (ms) to generate a delay signal DA, so the first conversion circuit 10 will generate different delay times according to different temperatures The signal DA, therefore, the first conversion circuit 10 can be called a temperature-to-time conversion circuit.

The counting circuit 20 is coupled to the first conversion circuit 10, and the counting circuit 20 receives the delay signal DA and the input signal START, and counts the time difference between the delay signal DA and the input signal START according to a clock CLK to generate a count data CNT. Here, the counting circuit 20 receives the delay signal DA and the input signal START, and compares the difference between the delay signal DA and the input signal START, and counts the delay time difference between the delay signal DA and the input signal START according to the clock CLK, and Generate counting data CNT, wherein, since the first conversion circuit 10 will delay different times to generate the delay signal DA according to different temperatures, the counting circuit 20 counts the time difference between the delay signal DA and the input signal START to generate the counting data. Contains temperature information.

The second converting circuit 30 is coupled to the counting circuit 20, and the second converting circuit receives the counting data CNT, and generates a temperature data corresponding to the counting data CNT according to a temperature comparison table. That is to say, the second conversion circuit 30 has a built-in temperature comparison table, and the temperature comparison table includes a plurality of count data CNT, and each count data CNT corresponds to a temperature, for example, when the count data CNT is 20, its corresponding The temperature is 25 degrees, so the temperature data output by the second conversion circuit 30 is 25 degrees; when the count data CNT is 30, the corresponding temperature is 30 degrees, so the temperature data output by the second conversion circuit 30 is 30 degrees. degree, so the second conversion circuit 30 of the present invention is equivalent to a time-to-temperature conversion circuit. In this way, the present invention does not need to use a delay circuit that does not change with temperature, so that the overall circuit area is reduced, thereby achieving the purpose of cost saving.

In addition, since the temperature corresponding curve of the temperature comparison table can be a linear curve, but not limited thereto, for example, when the counting data CNT are 20, 30 and 40 respectively, the corresponding temperatures are 25 degrees, 30 degrees and 35 degrees respectively. Therefore, the second conversion circuit 30 can use the method of internal difference calculation to know the temperature with higher resolution. That is to say, the count data CNT received by the second conversion circuit 30 does not directly correspond to the temperature comparison table. temperature, the second conversion circuit 30 can use the temperature data corresponding to the two count data CNT closest to the received count data CNT, and use the inner difference operation to obtain the temperature data corresponding to the received count data CNT, For example, the counting data CNT in the temperature comparison table are respectively 20, 30 and 40 hours, and the corresponding temperatures are 25 degrees, 30 degrees and 35 degrees. When the counting data CNT received by the second conversion circuit 30 is 25, since there is no temperature corresponding to the counting data CNT being 25 in the temperature comparison table, at this moment, the second conversion circuit 30 can use the method of internal difference operation, First obtain the two count data CNTs closest to 25 with CNT 20 and 30 corresponding to temperature data 25 and 30 respectively, and then perform interpolation to obtain that the temperature corresponding to count data CNT 25 is 27.5 degrees . In this way, the present invention can increase the resolution of temperature sensing by way of interpolation operation.

In addition, the counting circuit 20 of this embodiment includes a logic unit 200 and a counting unit 202 . The logic unit 200 receives the delay signal DA and the input signal START, and generates a difference signal XR (as shown in FIG. 4 ) according to the time difference between the delay signal DA and the input signal START. In this embodiment, the logic unit 200 is a Mutually exclusive OR gate, therefore, the difference signal XR generated by the logic unit 200 represents the time difference between the delay signal DA and the input signal START. The counting unit 202 is coupled to the logic unit 200. The counting unit 202 receives the difference signal XR, and counts the difference signal XR according to the clock CLK to generate count data CNT.

Please also refer to FIG. 4 , which is a waveform diagram of a temperature sensing circuit according to a first embodiment of the present invention. As shown in the figure, the input signal START is transmitted to the first conversion circuit 10, and the first conversion circuit 10 delays the input signal START to generate a delayed signal DA. The logic unit 200 receives the delayed signal DA and the input signal START, and performs logic operations to generate a difference signal. XR, in this embodiment, the logic unit 200 is a mutually exclusive OR gate. Therefore, when the level of the input signal START is a high level and the level of the delay signal DA is a low level, the level of the difference signal XR The bit is a high level, so the high level part of the difference signal XR is the time caused by the temperature. The counting unit 202 counts the high level part of the difference signal XR according to the clock CLK, and the generated count data CNT is It can be equivalent to the time caused by the temperature, and then the temperature corresponding to the count data CNT is found from the temperature comparison table through the second conversion circuit 30. In this embodiment, the count data CNT is 5, and the corresponding count data CNT The temperature is 17.5 degrees.

Please also refer to FIG. 5 , which is a waveform diagram of a temperature sensing circuit according to a second embodiment of the present invention. As shown in the figure, the difference between this embodiment and the embodiment of FIG. 4 is that the first conversion circuit 10 of this embodiment generates delay signals DA1 and DA2 at different temperatures, and the logic unit 200 generates difference signals XR1 and DA2 respectively. For the difference signal XR2, since the temperature is linear to the delay time of the first conversion circuit 10, the counting unit 202 counts the count data CNT1 and CNT2 of the difference signal XR1 and the difference signal XR2 respectively by 5 and 10, so after the second conversion The temperature data generated by the circuit 30 are 17.5 degrees and 20 degrees.

Please refer to FIG. 6A , which is a circuit diagram of a first converting circuit according to a first embodiment of the present invention. As shown in the figure, the first conversion circuit 10 of the present invention is a delay circuit. In this embodiment, the delay circuit includes a one-stage delay unit, and the delay unit includes an inverter 12 and a capacitor C. An input terminal IN of the inverter 12 receives the input signal START, and inverts the input signal START; the capacitor C is coupled to the inverter 12, and delays the inverted input signal START of the inverter 12 according to the temperature to generate a delay signal da.

As mentioned above, the inverter 12 includes a first transistor 120 and a second transistor 122 . A first terminal of the first transistor 120 is coupled to a power supply terminal V _DD , a second terminal of the first transistor 120 is coupled to an output terminal OUT, and a control terminal of the first transistor 120 receives the input signal START; the second transistor 122 A first terminal of the first transistor 122 is coupled to the second terminal of the first transistor 120 and the output terminal OUT, and a second terminal of the second transistor 122 is coupled to a ground terminal. A control terminal of the second transistor receives the input signal START. In this embodiment, one end of the capacitor C is coupled to the power supply terminal V _DD and the first end of the first transistor 120 , and the other end of the capacitor C is coupled to the output end OUT, the second end of the first transistor 120 and the second transistor 122 the first end of . Wherein, the capacitor C has a positive temperature coefficient, that is, when the temperature rises, the capacitance of the capacitor C increases correspondingly, and conversely, when the temperature drops, the capacitance of the capacitor C decreases accordingly.

Based on the above, since this embodiment mainly uses the inverter 12, and uses a capacitor C with a positive temperature coefficient at the output terminal OUT, when the temperature rises, the mobility (Mobility) of the first transistor 120 and the second transistor 122 will decrease, so the equivalent channel resistance value will increase. In addition, since the capacitance C of the output terminal OUT has a positive temperature coefficient, the capacitance value of the capacitance C will also increase with the temperature rise. Therefore, the overall delay of the first conversion circuit 10 The increase of time with temperature rise can be approximated by multiplying the channel resistance by the capacitance value of the capacitor C at the output terminal OUT. Conversely, the same goes for temperature drop, and the delay time of the first converting circuit 10 will decrease as the temperature drops. In this way, in the present invention, the capacitor C is arranged between the inverter 12 and the output terminal OUT to reduce the overall circuit area, thereby achieving the purpose of cost saving.

In addition, the above-mentioned positive temperature coefficient in the present invention does not necessarily only refer to the capacitor C, and the capacitor C can be made of MIM, depletion type MOS, or enhancement type MOS to achieve a positive temperature coefficient or a negative temperature coefficient. The positive temperature coefficient mentioned in the present invention means that the characteristic of the first conversion circuit 10 as a whole is a positive temperature coefficient. coefficient. Conversely, the negative temperature coefficient also means that the overall first conversion circuit 10 has a negative temperature coefficient.

Please also refer to FIG. 6B , which is a circuit diagram of a first conversion circuit according to a second embodiment of the present invention. As shown in the figure, the difference between this embodiment and the embodiment of FIG. 6A is that the capacitance C of this embodiment is composed of field effect transistors to form an equivalent capacitance C, and the capacitance C of this embodiment will also change with temperature. .

Please also refer to FIG. 6C , which is a circuit diagram of a first conversion circuit according to a third embodiment of the present invention. As shown in the figure, the difference between this embodiment and the embodiment shown in FIG. 6A and FIG. 6B is that the first conversion circuit 10 of this embodiment further includes a power group R. As shown in FIG. One terminal of the resistor R is coupled to the second terminal of the first transistor 120 and the first terminal of the second transistor 122 , and the other terminal of the resistor R is coupled to the output terminal OUT and the capacitor C. In this way, the resistor R can increase the resistance value of the charging and discharging path.

In addition, since the resistance R can be poly resistance, well resistance, high R poly resistance, and other resistance formed by different materials, its temperature coefficient may be positive or negative. However, in the present invention, it depends on the inverter 12, Whether the effect of the first conversion circuit 10 integrated with the capacitor C and the resistor R is a positive temperature coefficient or a negative temperature coefficient. Therefore, regardless of whether the inverter 12, capacitor C, and resistor R have a positive temperature coefficient or a negative temperature coefficient, it mainly depends on the effect of the overall first conversion circuit 10 after the inverter 12, capacitor C, and resistor R are combined. Is it a positive temperature coefficient or a negative temperature coefficient.

Please refer to FIG. 7A , FIG. 7B and FIG. 7C , which are circuit diagrams of the first conversion circuit of a fourth, fifth and sixth embodiments of the present invention, respectively. As shown in the figure, the first conversion circuits of the fourth, fifth and sixth embodiments respectively correspond to the first conversion circuits of the first, second and third embodiments, and are different from the first conversion circuits of the first, second and third embodiments In the fourth, fifth and sixth embodiments, one end of the capacitor C of the first conversion circuit is coupled to the power supply terminal VDD and the second terminal of the first transistor 120, the first terminal of the second transistor 122 and the output terminal OUT, The other end of the capacitor C is coupled to the ground, and its operation principle is the same as that of the first conversion circuit 10 of the first embodiment, so it will not be repeated here.

Please also refer to FIG. 8A to FIG. 8C , which are circuit diagrams of the first conversion circuits of the seventh, eighth and ninth embodiments, respectively. As shown in the figure, the difference between the first conversion circuit 10 of the seventh, eighth and ninth embodiments and the first conversion circuit 10 of the first, second and third embodiments lies in the first conversion circuit 10 of the seventh, eighth and ninth embodiments. The conversion circuit 10 further includes a one-stage inverter 14 and a capacitor C2 to increase the delay time of the first conversion circuit 10, and its structure is the same as that of the first conversion circuit 10 of the first, second and third embodiments, hereby No more details.

Based on the above, it can be known that the first conversion circuit 10 of the present invention can be a one-stage delay unit, and the first conversion circuit 10 can also be a two-stage or even multi-stage delay unit.

Please also refer to FIG. 9A to FIG. 9C , which are circuit diagrams of the first conversion circuits of the tenth, eleventh and twelfth embodiments, respectively. As shown in the figure, the difference between the first conversion circuit 10 of the tenth, eleventh and twelfth embodiment and the first conversion circuit 10 of the fourth, fifth and sixth embodiment is that the tenth, eleventh and twelfth embodiment The first conversion circuit 10 of the example further includes a one-stage inverter 14 and a capacitor C2 to increase the delay time of the first conversion circuit 10, and its structure is the same as that of the first conversion circuit 10 of the fourth, fifth and sixth embodiments , will not be repeated here.

In summary, the present invention relates to a temperature sensing circuit and its conversion circuit. The temperature sensing circuit receives an input signal from the first conversion circuit, and delays the input signal according to a temperature to generate a delayed signal; a counting The circuit receives the delay signal and the input signal, and generates a count data according to the time difference between the clock count delay signal and the input signal; and a second conversion circuit receives the count data, and generates a temperature data corresponding to the count data according to a temperature comparison table . In this way, the present invention does not need to use a delay unit that does not vary with temperature, thereby reducing the overall circuit area, thereby achieving the purpose of saving costs.

The above is only a preferred embodiment of the present invention, and is not intended to limit the implementation scope of the present invention. All equivalent changes and modifications made in accordance with the shape, structure, characteristics and spirit described in the scope of the claims of the present invention shall be included in the scope of the claims of the present invention.

Claims (12)

1. a temperature sensing circuit, is characterized in that, it comprises:

One first change-over circuit, receives an input signal, and postpones this input signal according to a temperature, produces one and postpones signal;

One counting circuit, receives this delay signal and this input signal, and counts the mistiming of this delay signal and this input signal according to a clock pulse, produces an enumeration data; And

One second change-over circuit, receives this enumeration data, and according to a temperature table of comparisons to enumeration data producing a temperature data.

2. temperature sensing circuit as claimed in claim 1, it is characterized in that, wherein this first change-over circuit is a delay circuit, and this delay circuit postpones this input signal according to this temperature, produces this delay signal.

3. temperature sensing circuit as claimed in claim 2, it is characterized in that, wherein this delay circuit comprises:

One the first transistor, one first end couples a power end, and one second end of this first transistor couples an output terminal of this delay cell, and a control end of this first transistor receives this input signal;

One transistor seconds, one first end couples this second end and this output terminal of this first transistor, and one second end of this transistor seconds couples an earth terminal, and a control end of this transistor seconds receives this input signal; And

One electric capacity, its one end couples this first end of this power end and this first transistor, and the other end of this electric capacity couples this output terminal, this second end of this first transistor and this first end of this transistor seconds.

4. temperature sensing circuit as claimed in claim 3, it is characterized in that, wherein this delay circuit more comprises:

One resistance, its one end couples this first end of this second end of this first transistor and this transistor seconds, and the other end of this resistance couples this output terminal and this electric capacity.

5. temperature sensing circuit as claimed in claim 2, it is characterized in that, wherein this delay circuit comprises:

One the first transistor, one first end couples a power end, and one second end of this first transistor couples an output terminal of this delay cell, and a control end of this first transistor receives this input signal;

One transistor seconds, one first end couples this second end and this output terminal of this first transistor, and one second end of this transistor seconds couples an earth terminal, and a control end of this transistor seconds receives this input signal; And

One electric capacity, its one end couples this second end of this power end and this first transistor, this first end of this transistor seconds and this output terminal, and the other end of this electric capacity couples this earth terminal.

6. temperature sensing circuit as claimed in claim 5, it is characterized in that, wherein this delay circuit more comprises:

One resistance, its one end couples this first end of this second end of this first transistor and this transistor seconds, and the other end of this resistance couples this output terminal and this electric capacity.

7. temperature sensing circuit as claimed in claim 1, it is characterized in that, wherein this counting circuit comprises:

One logical block, receives this delay signal and this input signal, and according to the mistiming between this delay signal and this input signal, produces a difference signal; And

One counting unit, receives this difference signal, and counts this difference signal according to this clock pulse, produces this enumeration data.

8. a change-over circuit for temperature sensing circuit, is characterized in that, it comprises:

One phase inverter, receives an input signal, and this input signal anti-phase; And

One electric capacity, couples this phase inverter, and according to a temperature and postpone this phase inverter anti-phase after this input signal, produce one postpone signal.

9. change-over circuit as claimed in claim 8, it is characterized in that, wherein this phase inverter comprises:

One the first transistor, one first end couples a power end, and one second end of this first transistor couples an output terminal of this delay cell, and a control end of this first transistor receives this input signal; And

One transistor seconds, one first end couples this second end and this output terminal of this first transistor, and one second end of this transistor seconds couples an earth terminal, and a control end of this transistor seconds receives this input signal;

Wherein, this electric capacity one end couples this first end of this power end and this first transistor, and the other end of this electric capacity couples this output terminal, this second end of this first transistor and this first end of this transistor seconds.

10. change-over circuit as claimed in claim 9, it is characterized in that, it more comprises:

One resistance, its one end couples this first end of this second end of this first transistor and this transistor seconds, and the other end of this resistance couples this output terminal and this electric capacity.

11. change-over circuits as claimed in claim 8, it is characterized in that, wherein this phase inverter comprises:

One the first transistor, one first end couples a power end, and one second end of this first transistor couples an output terminal of this delay cell, and a control end of this first transistor receives this input signal; And

One transistor seconds, one first end couples this second end and this output terminal of this first transistor, and one second end of this transistor seconds couples an earth terminal, and a control end of this transistor seconds receives this input signal;

Wherein, one end of this electric capacity couples this second end of this power end and this first transistor, this first end of this transistor seconds and this output terminal, and the other end of this electric capacity couples this earth terminal.

12. change-over circuits as claimed in claim 11, it is characterized in that, it more comprises:

One resistance, its one end couples this second end of this first transistor and this first end of this transistor seconds, and the other end of this resistance couples this output terminal and this electric capacity.