CN104882385B - Reduction semiconductor packages carries out method and its device cracked during stable baking - Google Patents
Reduction semiconductor packages carries out method and its device cracked during stable baking Download PDFInfo
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- CN104882385B CN104882385B CN201510228208.3A CN201510228208A CN104882385B CN 104882385 B CN104882385 B CN 104882385B CN 201510228208 A CN201510228208 A CN 201510228208A CN 104882385 B CN104882385 B CN 104882385B
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The method cracked when semiconductor packages carries out stable baking and its device are reduced the present invention relates to a kind of.Methods described is included：The semiconductor packages is inserted in apparatus for baking, wherein the semiconductor packages is held from fixing device and the fixing device applies the first stress to the semiconductor packages；And after the baking of the scheduled time, the fixing device applies the second stress to the semiconductor packages；Wherein, first stress is set to avoid the semiconductor packages from coming off from the fixing device, and second stress is more than first stress and is set to maintain the surface smoothness of the semiconductor packages.The method and related device that the present invention is provided are not susceptible to warpage when can not only ensure semiconductor package mounted in stable baking, additionally it is possible to the risk cracked when reducing semiconductor package mounted in stable baking.
Description
Technical field
The present invention relates to semiconductor preparation field.More particularly it relates to which a kind of reduction semiconductor packages is carried out surely
The method and its device cracked when toasting surely.
Background technology
QFN encapsulation (QFN, Quad Flat No-lead Package) is a kind of plastic-sealed body only in side
Product.After preceding working procedure completion, it is necessary to which QFN encapsulation is implemented curing process to cause plastic-sealed body
Reaction is finished organic matter (for example, epoxy resin) completely at high temperature.But, the finite capacity of curing apparatus in itself once can
The enough product quantity for performing solidification is less.Therefore, in order to improve efficiency, prior art generally completes initial merely with curing apparatus
Solidification.Then, after product to be packaged cooling completely, then these encapsulating products are inserted in apparatus for baking to the height for undergoing the long period
Temperature reacts to complete the solidification (" stable to toast ") of residual organic substances.Generally, the Capacity Ratio curing apparatus of apparatus for baking is much bigger,
The solidification of more encapsulating products can once be completed.So, the combination of curing process and baking process can be in the shorter time
The interior more encapsulating products of solidification, so as to improve production efficiency.
Due to needing once to complete the stable baking of multiple encapsulating products, and plastic-sealed body in each encapsulating products is organic
Thermal Contraction Coefficient between thing and lead frame may be inconsistent, is easily caused stabilization of the encapsulating products in the experience long period
Serious warpage is produced during baking.This makes the flatness of product be affected, and then influences subsequent job and semiconductor
The quality of encapsulating products.In order to solve the problem, encapsulating products are fixed in apparatus for baking by prior art usually using fixture
And ensure in whole baking process fixture apply to encapsulating products clamping force keep it is constant.
It should be noted that the clamping force is unsuitable too small, it otherwise can not ensure that the surface of semiconductor packages is toasted stable
After the completion of still have higher flatness.But, clamping force also unsuitable excessive, the otherwise surface meeting of the encapsulating products of out-of-flatness
Cracked or even be broken due to unbalance stress.The quality of plastic-sealed body is more crisp, also exacerbates what encapsulation was cracked and was broken
Risk.Therefore, this area needs a kind of method and phase that semiconductor package can be avoided to be cracked when being mounted in progress stabilization baking
The device answered.
The content of the invention
In order to solve the above problems, the present invention provides a kind of semiconductor packages that reduces and carries out what is cracked during stable baking
Method, it is included：The semiconductor packages is inserted in apparatus for baking, wherein the semiconductor packages is held by fixing device
And the fixing device applies the first stress to the semiconductor packages；And after the baking of the scheduled time, the fixation
Device applies the second stress to the semiconductor packages；Wherein, first stress be set to avoid the semiconductor packages from
Come off in the fixing device, wherein second stress is more than first stress and is set to maintain the semiconductor packages
Surface smoothness.
Further, the present invention also provides a kind of fixing device, and the fixing device can reduce semiconductor packages and carry out surely
The risk cracked when toasting surely, the fixing device includes：Pressure adjustment means, the pressure adjustment means are applied for regulation
It is added to the pressure of the semiconductor packages；Monitoring temperature component, the temperature described in the monitoring temperature means monitors in apparatus for baking
Degree；Time monitoring component, the baking time of apparatus for baking described in the time monitoring means monitors；And control member, it is described
Control member is configured to the temperature and reaches after predetermined temperature or control institute after the baking time reaches the scheduled time
State pressure adjustment means and be applied to the pressure of the semiconductor packages to change.
It is preferable that the method and related device that the present invention is provided can not only ensure that semiconductor product has after stable baking
Flatness, additionally it is possible to the risk cracked when reducing semiconductor package mounted in stable baking.
Brief description of the drawings
Fig. 1 is the method that reduction semiconductor packages according to an embodiment of the invention cracked during stable baking
Flow chart.
Fig. 2 is that the reduction semiconductor packages according to an embodiment of the invention that performs cracked during stable baking
The schematic diagram of the device of method.
Embodiment
Referring to Fig. 1, the method cracked when carrying out stable baking it illustrates the reduction semiconductor packages of the present invention
Flow chart.
First, in a step 101, semiconductor packages is inserted in apparatus for baking, wherein the semiconductor packages is by fixing
Device is held and the fixing device applies the first stress to the semiconductor packages.Wherein, the value of first stress is with partly leading
The quantity of body encapsulation is proportional, i.e. under normal conditions, the quantity for inserting the semiconductor packages of apparatus for baking is more, and this first
Stress is bigger；Otherwise, first stress is smaller.Preferably, the first stress should be set to prevent semiconductor packages from producing as small as possible
Raw crackle.For example, the first stress can only be set to avoid semiconductor packages from coming off from fixing device.In preferred embodiment
In, first stress has the moment of torsion of 2-4 Newton meters, such as 3 Newton meters.Those skilled in the art know, other stress
Value falls within protection scope of the present invention.
Then, in a step 102, after the baking by the scheduled time, the organic matter of the plastic-sealed body of completion is had been cured
Hardness decrease, now the fixing device is applied more than the second stress of the first stress to maintain half to the semiconductor packages
The surface smoothness of conductor encapsulation, it is to avoid because the inconsistent of Thermal Contraction Coefficient is led between the organic matter and lead frame of plastic-sealed body
Encapsulating products are caused to produce warpage in the follow-up stable baking process of experience.In one embodiment, the scheduled time can be one
Set time, such as 25-35 minute, such as 30 minutes.In other embodiments, the scheduled time can also be according to apparatus for baking
Interior temperature is set.For example, In a particular embodiment, the set time can reach the temperature in apparatus for baking
160-190 degrees Celsius of time, such as, but not limited to 170 degrees Celsius, 175 degrees Celsius, 180 degrees Celsius etc..
According to one embodiment of the invention, second stress has the moment of torsion of 9-11 Newton meters, such as daNm.
Those skilled in the art know that other stress values fall within protection scope of the present invention.
It will be understood by those skilled in the art that at the initial stage of stable baking, fixing device applies less to semiconductor packages
First stress.In the presence of first stress, semiconductor packages will not come off from apparatus for baking.Be additionally, since this first
Stress is relatively small, is also generally unlikely to cause crackle even if the surface irregularity of semiconductor packages.It is predetermined in stable baking
After period, the hardness of the organic matter of plastic-sealed body is gradually reduced under high temperature action, and the first stress now is adjusted into bigger
Two stress, which will not both cause to crack, can also avoid warpage issues caused by clamping stress deficiency.Carried by the application
The two-part force baking method of confession, can avoid traditional unistage type force baking method may by applying stress excessive institute initial stage
The caused risk for cracking or even being broken because of encapsulating products surface unbalance stress.
The application further provides for a kind of fixing device for being used to perform the application two-part force baking method, and this is fixed
Device includes：Pressure adjustment means 201, monitoring temperature component 202, time monitoring component 203 and control member 204.
As shown in Fig. 2 the pressure that pressure adjustment means 201 are applied to semiconductor packages for adjusting makes it in first pressure
Change between second pressure.Monitoring temperature component 202 is used to monitor the temperature in apparatus for baking.Time monitoring component 203 is used
In the baking time for monitoring the apparatus for baking.Control member 204 be configured to the temperature reach after predetermined temperature or
The baking time reaches that the pressure adjustment means are controlled after the scheduled time is applied to the pressure of the semiconductor packages to change
Power.
The technology contents and technical characterstic of the present invention have revealed that as above, but those skilled in the art still may base
Make a variety of replacements and modification without departing substantially from spirit of the present invention in teachings of the present invention and announcement.Therefore, protection model of the invention
The content disclosed in embodiment should be not limited to by enclosing, and should include various replacements and modification without departing substantially from the present invention, and be this patent
Application claims are covered.
Claims (10)
1. a kind of reduce the method that semiconductor packages cracked during stable baking, it is included：
The semiconductor packages is inserted in apparatus for baking, wherein the semiconductor packages is held and described solid by fixing device
Determine device and apply the first stress to the semiconductor packages；And
After the baking of the scheduled time, the fixing device applies the second stress to the semiconductor packages；
Wherein, first stress is set to avoid the semiconductor packages from coming off from the fixing device, and described second should
Power is more than first stress and is set to maintain the surface smoothness of the semiconductor packages.
2. according to the method described in claim 1, wherein the semiconductor packages is QFN encapsulation (QFN).
3. method according to claim 1 or 2, wherein the scheduled time is 25-35 minutes.
4. method according to claim 1 or 2, wherein the scheduled time is set to make the temperature in the apparatus for baking
Reach 160-190 degrees Celsius of time.
5. method according to claim 4, wherein the scheduled time is set to reach the temperature in the apparatus for baking
To 175 degrees Celsius of time.
6. method according to claim 1 or 2, wherein first stress is set to the moment of torsion with 2-4 Newton meters.
7. method according to claim 6, wherein first stress is set to the moment of torsion with 3 Newton meters.
8. method according to claim 1 or 2, wherein second stress is set to the torsion with 9-11 Newton meters
Square.
9. method according to claim 8, it is characterised in that：Second stress is set to the torsion with daNm
Square.
10. a kind of perform claim requires the fixing device of the method described in any one of 1-9, it is characterised in that the fixing device
Including：
Pressure adjustment means, the pressure adjustment means are used to adjust the pressure for being applied to the semiconductor packages；
Monitoring temperature component, the temperature described in the monitoring temperature means monitors in apparatus for baking；
Time monitoring component, the baking time of apparatus for baking described in the time monitoring means monitors；And
Control member, the control member is configured to the temperature and reaches after predetermined temperature or reached in the baking time
The pressure adjustment means are controlled after the scheduled time and are applied to the pressure of the semiconductor packages to change.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510228208.3A CN104882385B (en) | 2015-05-06 | 2015-05-06 | Reduction semiconductor packages carries out method and its device cracked during stable baking |
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|---|---|---|---|
| CN201510228208.3A CN104882385B (en) | 2015-05-06 | 2015-05-06 | Reduction semiconductor packages carries out method and its device cracked during stable baking |
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| CN104882385A CN104882385A (en) | 2015-09-02 |
| CN104882385B true CN104882385B (en) | 2017-10-24 |
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| CN113270348A (en) * | 2020-02-17 | 2021-08-17 | 深圳第三代半导体研究院 | Product housing box for semiconductor package, processing method and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101271851A (en) * | 2008-05-08 | 2008-09-24 | 日月光半导体制造股份有限公司 | Heat treatment method for reducing packaging warping degree |
| CN101707263A (en) * | 2009-07-15 | 2010-05-12 | 深圳市海太阳实业有限公司 | Method for packaging cylindrical polymer lithium-ion battery |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6790473B2 (en) * | 1995-10-26 | 2004-09-14 | International Business Machines Corporation | Lead protective coating composition, process and structure thereof |
| US8647963B2 (en) * | 2009-07-08 | 2014-02-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method of wafer level chip molded packaging |
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2015
- 2015-05-06 CN CN201510228208.3A patent/CN104882385B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101271851A (en) * | 2008-05-08 | 2008-09-24 | 日月光半导体制造股份有限公司 | Heat treatment method for reducing packaging warping degree |
| CN101707263A (en) * | 2009-07-15 | 2010-05-12 | 深圳市海太阳实业有限公司 | Method for packaging cylindrical polymer lithium-ion battery |
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| CN104882385A (en) | 2015-09-02 |
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Effective date of registration: 20201229 Address after: No. 669, GuoShouJing Road, Pudong New Area pilot Free Trade Zone, Shanghai, 201203 Patentee after: Rirong semiconductor (Shanghai) Co.,Ltd. Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 669 Patentee before: ASE ASSEMBLY & TEST (SHANGHAI) Ltd. |
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