CN104851908A - High-voltage super-junction MOSFET device terminal structure and manufacturing method thereof - Google Patents

Abstract

The invention relates to a high-voltage super-junction MOSFET device terminal structure and a manufacturing method thereof, including a cell area and a terminal area, and is characterized in that: the terminal area includes an N-type heavily doped substrate and is arranged on an N-type heavily doped substrate For the N-type epitaxial layer on the upper surface of the bottom, a wide-shaped SiO ₂ column area is set on the N-type epitaxial layer, and the wide-shaped SiO ₂ column area extends from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer. There is a transition region between the cell region and the terminal region, and the transition region includes an N-type heavily doped substrate, an N-type epitaxial layer, and two narrow P-column regions formed in the N-type epitaxial layer. The shaped P-column region extends from the upper surface of the N-type epitaxial layer to the lower surface, and there is a preset distance between the lower end of the narrow-shaped P-column region and the lower surface of the N-type epitaxial layer. The cell region includes an N-type heavily doped substrate, an N-type epitaxial layer, and a narrow P-column region and an N ^- body region formed in the N-type epitaxial layer. The invention greatly reduces the area of the terminal while achieving the withstand voltage capability of the existing terminal.

Description

High-voltage super-junction MOSFET device terminal structure and manufacturing method thereof

technical field

The invention relates to a terminal structure of a high-voltage super-junction MOSFET device and a manufacturing method thereof, belonging to the technical field of semiconductor power devices.

Background technique

The super-junction MOSFET device is an important power device that has appeared in recent years. Its basic principle is the charge balance principle. The basic super-junction structure of the super-junction MOSFET device uses alternately arranged P columns and N columns.

An important issue to be considered in the design of super-junction MOSFET devices is the design of the junction termination structure. A good junction termination can effectively improve the device withstand voltage, reduce leakage and improve device reliability. The terminal structure of the most widely used super junction structure currently adopts the same super junction structure as the cell part, that is, it is composed of multiple groups of the same groove structure. Specifically as shown in FIG. 1 , it includes an N-type heavily doped substrate 100, an N-type epitaxial layer 101 is provided on the N-type heavily doped substrate 100, and the N-type epitaxial layer 101 has a cell region 102 and a termination region 103. , the N-type epitaxial layer 101 of the cell region 102 has a P-column region 104 and an N-type body region 105, and the N-type epitaxial layer 101 of the terminal region 103 has multiple sets of P-column regions 104 uniformly distributed with the same width; the P There is a certain distance between the pillar region 104 and the lower surface of the N-type epitaxial layer 101 , for example, when the thickness of the N-type epitaxial layer 101 is 50 μm, the height of the P-pillar region 104 is generally 35˜45 μm. The width of the P-column region 104 of the existing high-voltage super-junction MOSFET device of this kind of structure is relatively narrow, generally about 5 μm. In order to obtain a sufficiently high withstand voltage of the terminal region, the terminal region 103 must occupy a large area. For example, the withstand voltage is The 600V high-voltage super-junction MOSFET device has a terminal width at least greater than 130 μm.

Contents of the invention

The purpose of the present invention is to overcome the deficiencies in the prior art, provide a high-voltage super-junction MOSFET device terminal structure and its manufacturing method, which greatly reduces the area of the terminal while achieving the existing terminal voltage resistance capability.

According to the technical solution provided by the present invention, the terminal structure of the high-voltage super-junction MOSFET device includes a cell area and a terminal area, and is characterized in that: the terminal area includes an N-type heavily doped substrate and is arranged on an N-type heavily For the N-type epitaxial layer on the upper surface of the substrate, a wide-shaped SiO ₂ column area is set on the N-type epitaxial layer, and the wide-shaped SiO ₂ column area extends from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer.

In a specific embodiment, there is a transition region between the cell region and the terminal region, and the transition region includes an N-type heavily doped substrate, an N-type epitaxial layer, and two N-type epitaxial layers formed in the N-type epitaxial layer. Narrow P-column region, the narrow P-column region extends from the upper surface of the N-type epitaxial layer to the lower surface, and there is a preset distance between the lower end of the narrow-shaped P-column region and the lower surface of the N-type epitaxial layer.

In a specific embodiment, the cell region includes an N-type heavily doped substrate, an N-type epitaxial layer, and a narrow P-column region and an N ^- body region formed in the N-type epitaxial layer, and the N ^- body The region is formed on the upper part of the narrow P column region; the narrow P column region of the cellular region extends from the upper surface of the N-type epitaxial layer to the lower surface, and the lower end of the narrow P column region is connected to the lower part of the N type epitaxial layer There is a preset spacing between surfaces.

In a specific embodiment, the N ^-body region extends toward the termination region and is in contact with the termination region.

In a specific embodiment, the N ^-body region extends toward the transition region and is in contact with a narrow P-pillar region of the transition region.

In a specific embodiment, the width of the wide SiO ₂ pillar region is 40-100 μm.

In a specific embodiment, the width of the narrow P-pillar region is about 5 μm.

The manufacturing method of the terminal structure of the high-voltage super-junction MOSFET device is characterized in that the following steps are adopted:

(1) Provide a semiconductor substrate with an N-type heavily doped substrate and an N-type epitaxial layer;

(2) Etching the terminal area of the N-type epitaxial layer to obtain a first groove body penetrating from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer, the width of the first groove body is 40-100 μm;

(3) Deposit an oxide layer in the first tank to form a wide SiO ₂ column area;

(4) The upper surface of the wide-shaped SiO ₂ column area is ground flat by the CMP process;

(5) Make the cell area or the cell area and the transition area.

Further, when making the cell area and the transition area, it specifically includes:

The second groove body is formed by etching on the N-type epitaxial layer in the cell region and the transition region. The second groove body extends from the upper surface of the N-type epitaxial layer to the lower surface, and the bottom of the second groove body is in contact with the N-type epitaxial layer. There is a predetermined distance between the lower surfaces of the layers, and the width of the second groove is about 5 μm;

Filling the P-type semiconductor layer in the second groove to form a narrow P-column region;

Implantation and diffusion are carried out on top of the narrow P-column region in the cell region to form an N ^- body region.

The manufacturing method of the terminal structure of the high-voltage super-junction MOSFET device is characterized in that the following steps are adopted:

(1) Provide a semiconductor substrate with an N-type heavily doped substrate and an N-type epitaxial layer;

(2) Etching is performed on the terminal region of the N-type epitaxial layer to obtain a plurality of third grooves penetrating from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer, the width of the third grooves is 2-5 μm, The ratio of the width of the third trough to the distance between the third trough is 10:4;

(3) The oxide layer is grown by wet oxidation in the third tank to form a wide SiO ₂ column area;

(4) The upper surface of the wide-shaped SiO ₂ column area is ground flat by the CMP process;

(5) Make the cell area or the cell area and the transition area.

The high-voltage super-junction MOSFET device terminal structure of the present invention and its manufacturing method adopt a wide-shaped SiO ₂ pillar region, and the wide-shaped SiO ₂ pillar region extends from the upper surface of the N-shaped epitaxial layer to the lower surface of the N-shaped epitaxial layer, and The width is relatively wide, 40-100 μm, so as to achieve the withstand voltage capability of the existing terminal and greatly reduce the area of the terminal.

Description of drawings

FIG. 1 is a schematic structural diagram of a terminal of a high-voltage super-junction MOSFET device in the prior art.

Fig. 2-1 is a schematic structural diagram of Embodiment 1 of the present invention.

FIG. 2-2 is a schematic structural diagram of Embodiment 1 after deep trenches are formed in the terminal region of the N-type epitaxial layer.

2-3 are schematic structural diagrams of the first embodiment after fabricating grooves in the cell region of the N-type epitaxial layer.

Fig. 3-1 is a schematic structural diagram of Embodiment 2 of the present invention.

FIG. 3-2 is a schematic structural diagram of Embodiment 2 after multiple sets of deep trenches are fabricated in the terminal region of the N-type epitaxial layer.

3-3 is a schematic diagram of the structure of the second embodiment after making grooves in the transition region and the cell region of the N-type epitaxial layer.

The labels in the figure are: 100, 200-N-type heavily doped substrate, 101, 201-N-type epitaxial layer, 102, 202-cell area, 103, 203-terminal area, 104-P column area, 105-N Type body area, 204-narrow P column area, 205-N ^- body area, 206-wide _SiO2 column area, 207-transition area, 208-first cell, 209-second cell, 210-the first Three-slot body.

Detailed ways

The present invention will be further described below in conjunction with specific drawings.

Embodiment one:

As shown in Figure 2-1, the terminal structure of the high-voltage super-junction MOSFET device of the present invention includes a cell region 202 and a terminal region 203, and the cell region 202 includes an N-type heavily doped substrate 200, an N-type epitaxial layer 201 and a In the narrow P-column region 204 and the N ^- body region 205 in the N-type epitaxial layer 201, the N ^- body region 205 is formed on the upper part of the narrow-shaped P-column region 204, and the N ^- body region 205 faces the terminal region 203 and is in contact with the terminal region 203; the narrow P column region 204 extends from the upper surface of the N-type epitaxial layer 201 to the lower surface, and the lower end of the narrow P column region 204 is in contact with the lower end of the N-type epitaxial layer 201 There is a predetermined distance between the surfaces, and the width of the narrow P-pillar region 204 is generally about 5 μm.

The terminal region 203 includes an N-type heavily doped substrate 200 and an N-type epitaxial layer 201 disposed on the upper surface of the N-type heavily doped substrate 200, and a wide-shaped SiO ₂ column region 206 is arranged on the N-type epitaxial layer 201, The wide-shaped SiO ₂ pillar region 206 extends from the upper surface of the N-type epitaxial layer 201 to the lower surface of the N-type epitaxial layer 201, and the width of the wide-shaped SiO ₂ pillar region 206 is 40-100 μm.

The manufacturing process of the terminal structure of the high-voltage super-junction MOSFET device described in this embodiment is as follows:

(1) Forming an N-type epitaxial layer 201 on an N-type heavily doped substrate 200;

(2) Etch a first groove body 208 whose depth is greater than or equal to the thickness of the N-type epitaxial layer 201 in the terminal region 203 on the N-type epitaxial layer 201. The width of the first groove body 208 is 40-100 μm, as shown in Figure 2-2 shown;

(3) By depositing an oxide layer, filling the first tank body 208 with SiO ₂ to form a wide SiO ₂ column area 206;

(4) Grinding the upper surface of the wide-shaped SiO ₂ column region 206 by CMP (thinning/polishing) process;

(5) Subsequent manufacturing of the cell region 202 according to the existing conventional process, specifically including etching the second groove body 209 on the N-type epitaxial layer 201 of the cell region 202, as shown in Figure 2-3, the second groove body There is a predetermined distance between 209 and the lower surface of the N-type epitaxial layer 201, and the narrow P-pillar region 204 is epitaxially grown in the second groove body 209; and an N ^- type body region is formed on the top of the narrow-shaped P-pillar region 204 205 ; finally obtain the terminal structure of the high-voltage super-junction MOSFET device as shown in FIG. 2-1 .

For the existing high-voltage super-junction MOSFET devices, since the width of the P-column region is narrow, generally about 5 μm, in order to obtain a sufficiently high withstand voltage of the terminal region, the terminal region must occupy a large area, such as a withstand voltage of 600V For high-voltage super-junction MOSFET devices, the terminal width is at least greater than 130 μm. However, in this embodiment, the wide-shaped SiO ₂ column region extends from the upper surface of the N-shaped epitaxial layer to the lower surface of the N-shaped epitaxial layer, and the width is wider, 40-100 μm, so as to achieve the current terminal withstand voltage capability While greatly reducing the area of the terminal.

Embodiment two:

As shown in Figure 3-1, the terminal structure of the high-voltage super-junction MOSFET device of the present invention includes a cell region 202, a terminal region 203, and a transition region 207 between the cell region 202 and the terminal region 203, and the cell region 202 includes An N-type heavily doped substrate 200, an N-type epitaxial layer 201, and a narrow P-column region 204 and an N ^- body region 205 formed in the N-type epitaxial layer 201, and the N ^- body region 205 is formed on a narrow-shaped P-column The upper part of the region 204, and the N ^- body region 205 extends toward the terminal region 203 and is in contact with the transition region 207; the narrow P-pillar region 204 extends from the upper surface of the N-type epitaxial layer 201 to the lower surface, and There is a preset distance between the lower end of the narrow P-pillar region 204 and the lower surface of the N-type epitaxial layer 201 , and the width of the narrow P-pillar region 204 is generally about 5 μm.

The transition region 207 includes an N-type heavily doped substrate 200, an N-type epitaxial layer 201, and two narrow P-pillar regions 204 formed in the N-type epitaxial layer 201, and one narrow P-pillar region of the transition region 207 The upper part of 204 is in contact with N ^- body region 205 of cell region 202 . The narrow P-column region 204 extends from the upper surface of the N-type epitaxial layer 201 toward the lower surface, and there is a preset distance between the lower end of the narrow-shaped P-column region 204 and the lower surface of the N-type epitaxial layer 201. The width of the stud region 204 is generally about 5 μm.

The terminal region 203 includes an N-type heavily doped substrate 200 and an N-type epitaxial layer 201 disposed on the upper surface of the N-type heavily doped substrate 200, and a wide-shaped SiO ₂ column region 206 is arranged on the N-type epitaxial layer 201, The wide-shaped SiO ₂ pillar region 206 extends from the upper surface of the N-type epitaxial layer 201 to the lower surface of the N-type epitaxial layer 201, and the width of the wide-shaped SiO ₂ pillar region 206 is 40-100 μm.

The manufacturing process of the terminal structure of the high-voltage super-junction MOSFET device described in this embodiment is as follows:

(1) Forming an N-type epitaxial layer 201 on an N-type heavily doped substrate 200;

(2) On the N-type epitaxial layer 201, etch a plurality of third grooves 210 whose depth is greater than or equal to the thickness of the N-type epitaxial layer 201 in the terminal region 203, the width of the third grooves 210 is 2-5 μm, and the third grooves The ratio of the width of 210 to the spacing of the third tank body 210 is 10:4, as shown in Figure 3-2;

(3) Using wet oxygen to grow an oxide layer, grow SiO ₂ between the third tank body 210 to form a wide SiO ₂ column area 206 filled with an oxide layer;

(4) Grinding the upper surface of the wide-shaped SiO ₂ column region 206 by CMP (thinning/polishing) process;

(5) Subsequent manufacturing of the cell region 202 and the transition region 207 according to the existing conventional process, specifically including etching and forming the second groove body 209 on the N-type epitaxial layer 201 of the cell region 202 and the transition region 207, as shown in Figure 3- 3, there is a predetermined distance between the second groove body 209 and the lower surface of the N-type epitaxial layer 201, and the narrow P column region 204 is epitaxially grown in the second groove body 209; N ^- type body region 205 is formed on the top of the P-shaped P-column region 204; finally, the terminal structure of the high-voltage super-junction MOSFET device as shown in FIG. 3-1 is obtained.

Claims (10)

1. A high-voltage super-junction MOSFET device terminal structure, including a cell region (202) and a terminal region (203), characterized in that: the terminal region (203) includes an N-type heavily doped substrate (200) and a set On the N-type epitaxial layer (201) on the upper surface of the N-type heavily doped substrate (200), a wide-shaped SiO ₂ column area (206) is set on the N-type epitaxial layer (201), and the wide-shaped SiO ₂ column area (206 ) extending from the upper surface of the N-type epitaxial layer (201) to the lower surface of the N-type epitaxial layer (201). 2. The terminal structure of a high-voltage super-junction MOSFET device according to claim 1, characterized in that: there is a transition region (207) between the cell region (202) and the termination region (203), and the transition region (207 ) includes an N-type heavily doped substrate (200), an N-type epitaxial layer (201), and two narrow P-pillar regions (204) formed in the N-type epitaxial layer (201), the narrow P-pillar region ( 204) extends from the upper surface of the N-type epitaxial layer (201) toward the lower surface, and there is a preset distance between the lower end of the narrow P-column region (204) and the lower surface of the N-type epitaxial layer (201). 3. The terminal structure of a high-voltage super-junction MOSFET device according to claim 1 or 2, characterized in that: the cell region (202) includes an N-type heavily doped substrate (200), an N-type epitaxial layer (201) And the narrow P-column region (204) and N ^- body region (205) formed in the N-type epitaxial layer (201), the N ^- body region (205) is formed on the upper part of the narrow-shaped P-column region (204) ; The narrow P-column region (204) of the cellular region (202) extends from the upper surface of the N-type epitaxial layer (201) toward the lower surface, and the lower end of the narrow-shaped P-column region (204) is in contact with the N-type epitaxial layer There is a preset distance between the lower surfaces of (201). 4. The terminal structure of the high-voltage super-junction MOSFET device according to claim 3, characterized in that: the N ^- body region (205) extends toward the terminal region (203) and contacts with the terminal region (203). 5. The terminal structure of the high-voltage super-junction MOSFET device according to claim 3, characterized in that: the N ^- body region (205) extends toward the transition region (207), and is connected to a narrow shape of the transition region (207) The P-pillar area (204) contacts. 6. The terminal structure of a high-voltage super-junction MOSFET device according to claim 1 or 2, characterized in that: the width of the wide-shaped SiO ₂ column region (206) is 40-100 μm. 7. The terminal structure of the high-voltage super-junction MOSFET device according to claim 3, characterized in that: the width of the narrow P-column region (204) is about 5 μm. 8. A method for manufacturing a terminal structure of a high-voltage super-junction MOSFET device, characterized in that, the steps are as follows: (1) Provide a semiconductor substrate with an N-type heavily doped substrate and an N-type epitaxial layer; (2) Etching the terminal area of the N-type epitaxial layer to obtain a first groove body penetrating from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer, the width of the first groove body is 40-100 μm; (3) Deposit an oxide layer in the first tank to form a wide SiO ₂ column area; (4) The upper surface of the wide-shaped SiO ₂ column area is ground flat by the CMP process; (5) Make the cell area or the cell area and the transition area. 9. The method for manufacturing a terminal structure of a high-voltage super-junction MOSFET device as claimed in claim 8, characterized in that: when making the cell region and the transition region, it specifically includes: The second groove body is formed by etching on the N-type epitaxial layer in the cell region and the transition region. The second groove body extends from the upper surface of the N-type epitaxial layer to the lower surface, and the bottom of the second groove body is in contact with the N-type epitaxial layer. There is a predetermined distance between the lower surfaces of the layers, and the width of the second groove is about 5 μm; Filling the P-type semiconductor layer in the second groove to form a narrow P-column region; Implantation and diffusion are carried out on top of the narrow P-column region in the cell region to form an N ^- body region. 10. A method for manufacturing a terminal structure of a high-voltage super-junction MOSFET device, characterized in that, the following steps are adopted: (1) Provide a semiconductor substrate with an N-type heavily doped substrate and an N-type epitaxial layer; (2) Etching is performed on the terminal region of the N-type epitaxial layer to obtain a plurality of third grooves penetrating from the upper surface of the N-type epitaxial layer to the lower surface of the N-type epitaxial layer, the width of the third grooves is 2-5 μm, The ratio of the width of the third trough to the distance between the third trough is 10:4; (3) The oxide layer is grown by wet oxidation in the third tank to form a wide SiO ₂ column area; (4) The upper surface of the wide-shaped SiO ₂ column area is ground flat by the CMP process; (5) Make the cell area or the cell area and the transition area.