CN104823530B - Multilayer printed-wiring board and its manufacture method - Google Patents
Multilayer printed-wiring board and its manufacture method Download PDFInfo
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- CN104823530B CN104823530B CN201380063322.4A CN201380063322A CN104823530B CN 104823530 B CN104823530 B CN 104823530B CN 201380063322 A CN201380063322 A CN 201380063322A CN 104823530 B CN104823530 B CN 104823530B
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
- H05K2201/09518—Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
It is an object of the invention to provide " warpage ", " distortion ", the multilayer printed-wiring board of " change in size " and its manufacture method for reducing the multilayer printed-wiring board obtained with conventional lamination method.In order to realize the purpose,Present invention employs a kind of multilayer printed-wiring board,It is characterized in that,On the two sides of core substrate, there is provided in the multilayer printed-wiring board of more than 2 layers of build-up wiring layer,The thickness for forming the insulating barrier of the core substrate of the multilayer printed-wiring board is less than 150 μm,The two sides for adding the insulating barrier of framework material has internal layer circuit,And the X Y-directions linear expansivity of the insulating barrier for adding framework material is 0ppm/ DEG C~20ppm/ DEG C,The 1st build-up wiring layer and the 2nd build-up wiring layer set on the two sides of the core substrate is made up of copper circuit layer and X Y-directions linear expansivity for 1ppm/ DEG C~50ppm/ DEG C of insulating resin layer,And the X-direction linear expansivity (Bx) of the insulating resin layer value and Y-direction linear expansivity (By) value ratio meet 0.9~1.1 relation.
Description
Technical field
The present invention relates to multilayer printed-wiring board and its manufacture method.More particularly, it relates to printed by the multilayer of lamination method manufacture
Brush wiring plate.
Background technology
In the past, for the mesh for realizing quickening signal velocity, erection space of the reduction as printed wiring board etc.
, multilayer printed-wiring board is widely applied.The multilayer printed wiring board-use is in the various electronic units of installation.In the multilayer
When electronic unit is installed on printed wiring board, the various methods such as Reflow Soldering connection, terminal conjunction method are used.Now, it is multi-sheet printed
Wiring plate will be unable to carry out the installation of good electronic unit in the event of " warpage ", " distortion ", " change in size ", thus not
It is preferred that.Especially, when the manufacture method as multilayer printed-wiring board uses lamination method (build-up method), processing
During also easily occur " warpage ", " distortion ", " change in size ", therefore, be currently suggested for solving each of these phenomenons
Kind technology.Hereinafter, the example of this prior art is listed.
In patent document 1 (Japanese Unexamined Patent Publication 11-261228 publications), to provide the change of the size in X-Y directions and Z-direction
For the purpose of changing much less layer of printed wiring board of small, surface bending and warpage, such as " on core substrate alternately layer is disclosed
In the multilayer printed-wiring board that pressure interlayer resin insulating layers and conductor layer form, core substrate is by low-thermal-expansions such as glass cloth
In the cloth of fiber impregnated of bismaleimide-triazine resin, thickness be below 0.15mm prepreg be laminated more than 6 layers
To be formed.Now, by make every resin impregnate prepreg thickness it is thinning and increase number, prevent from being laminated prepreg and
Into core substrate, i.e. X-Y directions of multilayer printed-wiring board change in size, warpage " method.
In patent document 2 (Japanese Unexamined Patent Publication 2003-086941 publications), it can be reduced caused by thermal history with providing
While the generation of warpage, outermost conductor layer is easily formed for the purpose of the printed wiring board of fine pattern, is employed " a kind of
Printed wiring board, it is characterised in that alternately lamination is arranged on internal layer circuit by multiple layers of insulating resin layer and conductor layer
In the printed wiring board formed on the surface of substrate, outermost insulating resin layer is formed as not containing glass cloth as base material
While the layer of resin body, the insulating resin layer of the second layer is formed as containing layer of the glass cloth as base material from outermost layer ".
In patent document 3 (Japanese Unexamined Patent Publication 2004-342827 publications), resin is filled with IVH to obtain, and only
It is that the multilayer printed-wiring board of lamination laminated resin layer is compared, warpage, distortion are small, and modulus of elasticity is high, and with only using prepreg
The multilayer printed-wiring board of making is compared, and concave-convex surface is excellent, and the excellent printed wiring board of heat resistance, resistance to migration is mesh
, employ and " form organic film substrate resin combination in the tow sides of the inner plating with IVH or do not impose base material and increase
IVH filling is carried out after strong resin composition layer, at least the enhancing of fiber non-woven cloth base material is formd in outermost layer so as to be made
Resin composition layer structure printed wiring board " manufacture method.
In patent document 4 (Japanese Unexamined Patent Publication 2008-307886 publications), to provide the metal-coating lamination for reducing warpage
For the purpose of the manufacture method of plate and multilayer laminate, disclosing use, " a kind of manufacture method of metal-coated laminated board, its feature exist
In, including the layered product that forms of metal foil will be configured on prepreg, in defined forming temperature and defined 1st shaping pressure
First process of power heating pressurization, at least 5 points are being lighted from the defined time after the heating of first process pressurization
It is less than 0.4 the 2nd forming pressure pressurization layered product of the 1st forming pressure in pressure ratio during more than clock
Meanwhile the temperature of the layered product is maintained to the temperature for being changed into minimum low 5 DEG C of the temperature for dissolving viscosity than the prepreg
The second process above, and lighted from the defined time after more than 30 minutes, cool down the layered product and be formed
The 3rd process " scheme.
Prior art literature
Patent document
Patent document 1：Japanese Unexamined Patent Publication 11-261228 publications
Patent document 2：Japanese Unexamined Patent Publication 2003-086941 publications
Patent document 3：Japanese Unexamined Patent Publication 2004-342827 publications
Patent document 4：Japanese Unexamined Patent Publication 2008-307886 publications
The content of the invention
Problems to be solved by the invention
However, for the above-mentioned disclosed invention of 1~patent document of patent document 4, exist in practical operation
Various problems, and be noted " warpage " that can not be fully solved multilayer printed-wiring board, " distortion ", " change in size " it is each
The defects of kind problem.If being inquired into above-mentioned each citation disclosed invention the problem of point, have following several
Situation.
In technical scheme disclosed in patent document 1, there is so-called " prepreg is laminated into more than 6 layers to be formed "
Limitation, there is limitation in terms of the Rotating fields of the Z-direction of multilayer printed-wiring board, therefore, even if can prevent multi-sheet printed
Change in size, the warpage in the X-Y directions of wiring plate, but make Z-direction thickness it is thinning the problem of on there is certain limit.
Also, according to technology disclosed in patent document 2, it is necessary to meet " most in the printed wiring board obtained with lamination method
The insulating resin layer of outer layer is formed as not containing layer of the glass cloth as the resin body of base material " and " second from outermost layer
Layer insulating resin layer be formed as containing layer of the glass cloth as base material " two conditions.
According to technology disclosed in patent document 3, it is necessary to meet " to be formed in the tow sides of the inner plating with IVH organic
Film substrate resin combination does not impose the filling that IVH is carried out after the resin composition layer of base material enhancing " and " at least most
Outer layer forms the resin composition layer of fiber non-woven cloth base material enhancing " two conditions.
And then the technology according to disclosed in patent document 4, such as " the rule after being pressurizeed from the heating of first process
During the fixed time lights at least more than 5 minutes, less than 0.4 the 2nd shaping pressure in pressure ratio for the 1st forming pressure
Power pressurize the layered product while, the temperature of the layered product is maintained at and is changed into minimum than the prepreg and dissolves viscosity
Low 5 DEG C of temperature temperature more than the second process ... " it is described, manufacturing process is complicated, the quality of resulting product
Easily produce fluctuation.
As seen from the above description, the multilayer printed-wiring board obtained at present to reduction with conventional lamination method such as " sticks up
It is bent ", " distortion ", the phenomenon of " change in size ", and these phenomenons fluctuate much less layer of printed wiring board and its manufacture method
Simplification proposes requirement.
The method solved the problems, such as
Therefore, the result through concentrating on studies, present inventors have recognized that passing through the change of simple manufacture method, multi-sheet printed
The change of the Rotating fields of wiring plate is difficult to " warpage ", " distortion ", " size for the multilayer printed-wiring board that suppression is obtained with lamination method
Change ", and these is not produced fluctuation.As a result, by using following technical concept, even if to contemplate this more by the present inventor
There is slight " warpage ", " distortion ", " change in size " in layer printed wiring board, can also reduce between printed wiring panel products
The method of fluctuation.Hereinafter, present invention content is illustrated.
1st, multilayer printed-wiring board
It is to be provided with more than 2 layers of build-up wiring on the two sides of core substrate as the multilayer printed-wiring board of the application
The multilayer printed-wiring board of layer, it is characterised in that as the core substrate for forming the multilayer printed-wiring board, the thickness of insulating barrier
Spend for less than 150 μm, there is internal layer circuit on the two sides for the insulating barrier for adding framework material, and this adds framework material
The X-Y directions linear expansivity of insulating barrier is 0ppm/ DEG C~20ppm/ DEG C, in the 1st lamination cloth that the two sides of the core substrate is set
Line layer and the 1st build-up wiring layer surface set the 2nd build-up wiring layer by copper circuit layer and X-Y directions linear expansivity
Formed for 1ppm/ DEG C~50ppm/ DEG C of insulating resin layer, and the value and Y of the X-direction linear expansivity (Bx) of the insulating resin layer
The value of direction linear expansivity (By) meets the relation of [Bx]/[By]=0.9~1.1.
As the multilayer printed-wiring board of the application composition the 1st build-up wiring layer and the 2nd build-up wiring layer it is exhausted
Edge resin bed, tensile modulus of elasticity at 25 DEG C is preferably 5GPa~10GPa.
As the multilayer printed-wiring board of the application composition the 1st build-up wiring layer and the 2nd build-up wiring layer it is exhausted
Edge resin bed, thickness are preferably 20 μm~80 μm.
As the multilayer printed-wiring board of the application composition the 1st build-up wiring layer and the 2nd build-up wiring layer it is exhausted
Edge resin bed, relative dielectric constant are preferably less than 3.5.
In the outermost layer of the multilayer printed-wiring board of the application, it is preferably provided with being less than with tensile modulus of elasticity at 25 DEG C
The build-up wiring layer of 5.0GPa insulating resin layer.
2nd, the manufacture method of multilayer printed-wiring board
As the manufacture method of the multilayer printed-wiring board of the application, include the concept of following two kinds of manufacture methods.
This, referred to as the first manufacture method and the second manufacture method.
<First manufacture method>
First manufacture method is the manufacture method of above-mentioned multilayer printed-wiring board, it is characterised in that is had following
1~process of process 3.
Process 1：Thickness used in insulating barrier is less than 150 μm, X-Y directions linear expansivity is 0ppm/ DEG C~20ppm/ DEG C
The surface of the insulating barrier for adding framework material there is the copper clad laminate of copper foil layer, internal layer circuit is formed, so as to obtain core
Heart substrate.
Process 2：The X-Y directions linear expansivity that the insulating resin layer after solidification is formd used in the surface of copper foil is 1ppm/
DEG C~copper foil with semi-solid preparation resin bed of 50ppm/ DEG C of semi-solid preparation resin bed, the copper foil for making this carry semi-solid preparation resin bed
Semi-solid preparation resin bed side abut and be laminated to the two sides of the core substrate, then carry out circuit formed, so as to be carried
The laminate of 1st build-up wiring layer.
Process 3：The semi-solid preparation resin bed of the copper foil with semi-solid preparation resin bed is set to be connected to the 1st build-up wiring layer
Laminate surface, further form the lamination layer (build-up layer) being made up of insulating resin layer and copper foil layer, with
Circuit is carried out afterwards to be formed, and this operation is set to the 1st cell processes, for the two of the laminate with the 1st build-up wiring layer
N is repeated in face, the 1st cell processes1Secondary (n1>=1 integer), so as to obtain that there is (4+2n on the two sides of core substrate1)
The multilayer printed-wiring board of the lamination layer of the Rotating fields of layer.
<Second manufacture method>
Second manufacture method is the manufacture method of above-mentioned multilayer printed-wiring board, it is characterised in that is had following
1~process of process 4.
Process 1：Thickness used in insulating barrier is less than 150 μm, X-Y directions linear expansivity is 0ppm/ DEG C~20ppm/ DEG C
The surface of the insulating barrier for adding framework material there is the copper clad laminate of copper foil layer, internal layer circuit is formed, so as to obtain core
Heart substrate.
Process 2：The X-Y directions linear expansivity that the insulating resin layer after solidification is formd used in the surface of copper foil is 1ppm/
DEG C~copper foil with semi-solid preparation resin bed of 50ppm/ DEG C of semi-solid preparation resin bed, the copper foil for making this carry semi-solid preparation resin bed
Semi-solid preparation resin bed side abut and be laminated to the two sides of the core substrate, then carry out circuit formed, so as to be carried
The laminate of 1st build-up wiring layer.
Process 3：The semi-solid preparation resin bed of the copper foil with semi-solid preparation resin bed is set to be connected to the 1st build-up wiring layer
Laminate surface, further form the lamination layer being made up of insulating resin layer and copper foil layer, then carry out circuit formed, will
This operation is set to the 1st cell processes, anti-for the two sides of the laminate with the 1st build-up wiring layer, the 1st cell processes
N is carried out again1Secondary (n1>=1 integer), so as to obtain that there is (4+2n on the two sides of core substrate1) layer build-up wiring layer it is more
Layer printed wiring board.
Process 4：In (the 4+2n formed with the 1st cell processes1) layer build-up wiring layer surface, with being formed after solidification
The copper foil with semi-solid preparation resin bed of semi-solid preparation resin bed of the tensile modulus of elasticity less than 5.0GPa at 25 DEG C, makes the band
After the semi-solid preparation resin bed side for having the copper foil of semi-solid preparation resin bed abuts and is laminated, carry out circuit and formed, this operation is set to
N is repeated in 2nd cell processes, the 2nd cell processes2Secondary (n2>=1 integer), so as to obtain being configured with core substrate
Two sides has [4+2 (n1+n2)] the lamination layers of the Rotating fields of layer, and in outermost layer there is tensile modulus of elasticity at 25 DEG C to be less than
The multilayer printed-wiring board of the build-up wiring layer of 5.0GPa insulating resin layer.
The effect of invention
As the multilayer printed-wiring board of the application, the X-Y directions linear expansivity and composition of the insulating barrier of the core substrate
Meet above-mentioned condition and relation in the X-Y directions linear expansivity of the insulating resin layer for the build-up wiring layer that its two sides is set, from
And it can effectively reduce " sticking up in multilayer printed-wiring board of the two sides of core substrate with more than 2 layers of build-up wiring layer
Song ", " distortion ", " change in size ", and these is not produced fluctuation.
Brief description of the drawings
Fig. 1 is the diagrammatic cross-section of the multilayer printed-wiring board of the application.
Fig. 2 is the schematic diagram for illustrating the manufacturing process of the multilayer printed-wiring board of the application.
Fig. 3 is the schematic diagram for illustrating the manufacturing process of the multilayer printed-wiring board of the application.
Fig. 4 is the schematic diagram for illustrating the manufacturing process of the multilayer printed-wiring board of the application.
Fig. 5 is the schematic diagram for illustrating the manufacturing process of the multilayer printed-wiring board of the application.
Fig. 6 is the diagrammatic cross-section of 8 layers of the multilayer printed-wiring board of the application.
The explanation of symbol
1 multilayer printed-wiring board, 2 core substrates, 3a, 3b laminations layer, 10 add the insulating barrier of framework material, 11 cores
The insulating barrier of substrate forms resin, 12 framework materials, 14 copper foils (layer), 15 insulating resin layers, the plating of 20 interlayer conductions, 21 cross-layers
Blind hole, 22 internal layer circuits, 23,24,25 copper circuit layers, 30,31,32 insulating resin layers, 40 copper clad laminates, 50 carry semi-solid preparation
The copper foil of resin bed, 51 laminate, 52 multilayer copper-clad laminates, Bun the n-th build-up wiring layers (n with the 1st build-up wiring layer
≥1)
Embodiment
Hereinafter, the system of the multilayer printed-wiring board of the embodiment to the multilayer printed-wiring board of the application and the application
The embodiment for making method is illustrated.
1st, the embodiment of multilayer printed-wiring board
As the multilayer printed-wiring board 1 of the application, there is more than 2 layers of the 1st build-up wiring on the two sides of core substrate 2
Layer Bu1, the 2nd build-up wiring layer Bu2, have the Rotating fields as shown in Fig. 1 diagrammatic cross-section.The multilayer for forming the application is printed
Brush wiring plate 1 " the 1st build-up wiring layer Bu1 " and " for the 2nd build-up wiring layer Bu2 ", if meeting condition as described below,
Even if then the 3rd layer of later build-up wiring layer is unsatisfactory for preferable condition mentioned in the present invention, can also reduce " warpage ",
" distortion ", " change in size ".
Hereinafter, reference picture 1 carries out the explanation of the multilayer printed-wiring board 1 of the application.In addition, in the Fig. 1, as tool
Have 2 layers of the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 Rotating fields, show wherein have be used as interlayer conduction
The embodiment of the cross-layer blind hole (skipped via) 21 of means.In the following description, by as much as possible to the more of the application
The inscape of layer printed wiring board 1 illustrates one by one.
Core substrate：Here, core substrate 2 as the multilayer printed-wiring board 1 for forming the application, the thickness of insulating barrier
Spend for less than 150 μm, there is internal layer circuit on the two sides for the insulating barrier for adding framework material, and this adds framework material
The X-Y directions linear expansivity of insulating barrier is preferably 0ppm/ DEG C~20ppm/ DEG C.By the X- of the insulating barrier for adding framework material
The reason for lower limit of Y-direction linear expansivity is set to 0ppm/ DEG C is, even if considering the insulating barrier composition for forming core substrate 2
The combination of resin 11 and framework material 12, it is also difficult to reason of the control below the value.On the other hand, this adds framework material
Insulating barrier X-Y directions linear expansivity more than 20ppm/ DEG C when, then " warpage ", " distortion " becomes significant tendency and increased, nothing
Method ensures that the tendency of the dimensional stability as printed wiring board also increases, thus not preferred.In addition, depicted here as " X-Y side
To linear expansivity " when with following connotation.I.e., it is assumed that one overlook when for rectangular plate-like core substrate when, will be along one side
Direction on expansion rate be referred to as " X-direction linear expansivity ", by the expansion rate on vertical direction is referred to as " Y on one side with this
Direction linear expansivity ".
As the measure of the X-Y directions linear expansivity of the above-described insulating barrier for adding framework material, adding
After the two sides lamination copper foil of the insulating barrier of framework material, etching removes copper foil, and bone is added so as to the sheet that have cured
The insulating barrier of frame material, in programming rate it is 5 DEG C/min with tensile load method with TMA experimental rigs using this as sample
The average value that condition determines the linear expansivity from room temperature untill glass transition temperature for twice, calculating the 2nd measure is made
For the X-Y directions linear expansivity value.
Also, the core substrate 2 of the multilayer printed-wiring board 1 as the application, generally has internal layer on its two sides
Circuit 22.With regard to the internal layer circuit 22 and positioned at core substrate 2 outer layer side the 1st build-up wiring layer Bu1 copper circuit layer 23 and
Speech, it is to use the arbitrary interlayer conduction means such as via hole (via hole), through hole (through hole) (omitting diagram) even
Fetch and used.
Also, the core substrate 2 of the multilayer printed-wiring board 1 as the application, the thickness of insulating barrier is preferably 150
Below μm.When the thickness of the insulating barrier of core substrate 2 is more than 150 μm, the requirement for thin printed wiring board can not be met, because
Without preferred.Though in addition, considering most thin framework material 12 without preset lower limit here, can consider at this stage
15 μm are lower limits.And then, it is contemplated that when market requires for printed wiring board thin layer, the thickness of the core substrate 2
Should be below 100 μm, more preferably less than 80 μm.
And then for framework material 12 mentioned here, the composition of the insulating barrier as printed wiring board can be used
Glass cloth, the glass non-woven fabric of materials'use, for the material of glass, there is no particular limitation.Also, as core substrate 2
Insulating barrier forms resin 11, epoxylite, the cyanogen that the constituent material of the insulating barrier as printed wiring board can be used to use
Acid esters resinoid, maleimide resin, polyphenylene ether group resin, polybutadiene resinoid, acrylic resin etc., to this
There is no particular limitation.
Build-up wiring layer：As the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2, as shown in figure 1, being in core
The surface for foring internal layer circuit 22 of substrate is set.Also, as the multilayer printed-wiring board of composition the application now
1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2, it is to be by copper circuit layer 23,24 and X-Y directions linear expansivity
1ppm/ DEG C~50ppm/ DEG C of insulating resin layer 30,31 is formed.Here, the X-Y direction lines of insulating resin layer 30,31 are expanded
The reason for lower limit of rate is set to 1ppm/ DEG C be, the reason being difficult to control from the perspective of reality below the value.The opposing party
Face, when the X-Y directions linear expansivity of the insulating resin layer 30,31 is more than 50ppm/ DEG C, " warpage ", " distortion ", which become, significantly inclines
To increasing, it is difficult to ensure the dimensional stability as printed wiring board, thus it is not preferred.
As referred to herein as the build-up wiring layer Bu1 of composition the 1st, the 2nd build-up wiring layer Bu2 insulating resin layer 30,31
Resin, can use epoxylite, cyanate resin, maleimide resin, polyphenylene ether group resin, polyamide resin
Fat, polyimide resin, polyamide-imide resin, polybutadiene resinoid, acrylic resin etc..
For the measure of the X-Y directions linear expansivity of above-described build-up wiring layer, the 1st build-up wiring layer is used in
Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30, the above-mentioned resin component used in 31 formation, manufacture are described later
Two copper foils for carrying semi-solid preparation resin bed, after making these resin face against each other and being laminated, etching removes copper foil, consolidate
The insulating resin layer for the sheet changed, in the numerical value that above-mentioned TMA experimental rigs and experimental condition are measured.
With regard to above-described composition the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30,31
For the linear expansivity of X-Y directions, above, it is assumed that during the build-up wiring layer of rectangle, it may be considered that be divided into X-direction linear expansivity
And Y-direction linear expansivity (By) (Bx).The just value of X-direction linear expansivity (Bx) now and the value of Y-direction linear expansivity (By)
For, preferably meet [Bx]/[By]=0.9~1.1 relation, more preferably meet [Bx]/[By]=0.95~1.05 relation.
Should [Bx]/[By] value when exceed the scope, in the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 itself, X-direction with
The linear expansivity of Y-direction will vary considerably, so as to obtain small multi-sheet printed of " warpage ", " distortion ", " change in size "
Wiring plate 1, thus it is not preferred.
In order to adjust form the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30,31 X-Y
Direction linear expansivity, silicon oxide particle, hollow silicon particle, aluminium oxide particles, cunning are preferably comprised in the insulating resin layer
Stone etc. is used as filler.As filler now, preferably using the filler that average grain diameter is 20nm~1 μm.Now, to filler
There is no particular limitation for the lower limit of average grain diameter, but in view of being set in 20nm as the actual conditions of industrial products.Separately
On the one hand, when the average grain diameter of the filler is more than 1 μm, there is in the jut and insulating resin layer of the mat surface of copper foil
The possibility of filler contact is big, so as to cause the tendency that adaptation reduces, therefore it is not preferred.Also, forming the 1st lamination cloth
Line layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30, when containing filler in 31, relative to the insulating resin layer 30,
31, filler is preferably contained with the weight % of 30 weight %~70 scope.When the filer content is less than 30 weight %, the 1st product is formed
Layer wiring layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30,31 X-Y directions linear expansivity become to be difficult to adjust, because
Without preferred.On the other hand, when the filer content is more than 70 weight %, it is difficult to buried between internal layer circuit possessed by core substrate
If the insulating resin layer containing filler, thus it is not preferred.
Hereinafter, to composition the 1st build-up wiring layer Bu1 of the multilayer printed-wiring board 1 of the application, the 2nd build-up wiring
Layer Bu2 physical characteristic of characteristic of insulating resin layer 30,31 etc. is illustrated.It is used as 30,31,25 DEG C of the insulating resin layer
When tensile modulus of elasticity be preferably 5GPa~10GPa.Tensile modulus of elasticity at 25 DEG C of the insulating resin layer 30,31 is less than
During 5GPa, " warpage ", " distortion ", " change in size " when multilayer printed-wiring board 1 is made have the tendency of to become big thus unexcellent
Choosing.On the other hand, when tensile modulus of elasticity at 25 DEG C of the insulating resin layer 30,31 is more than 10GPa, the insulating resin layer
30,31 become fragile, and then small " warpage " or " distortion " during due to multilayer printed-wiring board 1 is made, when causing the part to install
Become big thus not preferred in the tendency of build-up wiring layer generation crackle.
In addition, for the measure of " tensile modulus of elasticity at 25 DEG C " mentioned here, the 1st build-up wiring layer is used in
Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30, the above-mentioned resin component used in 31 formation, manufacture are described later
Two copper foils for carrying semi-solid preparation resin bed, after making these resin face against each other and being laminated, etching removes copper foil, consolidate
The insulating resin layer for the sheet changed, as sample, the numerical value determined with determination of viscoelasticity device (DMA).
Also, composition the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer of the multilayer printed-wiring board 1 of the application
The insulating resin layer 30,31 of Bu2, relative dielectric constant are preferably less than 3.5.Hereinafter, to providing the relative dielectric constant
Reason illustrates.In view of the impedance control using high density printed wiring board during high-frequency signal of mobile phone etc., to interlayer
The good control of crosstalk effect proposes requirement.As the key element for influenceing the crosstalk effect, circuit width, interlayer can be enumerated
Relative dielectric constant for the resin component that insulation distance, insulating barrier use etc..Wherein, the insulation distance hour of interlayer, due to needing
Reduce the circuit width of strip line, causing circuit to be formed becomes difficult.Therefore, it is in order that small, thick with the insulation distance of interlayer
Strip line, just must use low relative dielectric constant insulating barrier.That is, it is (thin using the small substrate of the insulation distance of interlayer
Printed wiring board) when in order to carry out impedance control, preferably using the thin printed wiring board of low relative dielectric constant.Based on this
Reason, the above-mentioned 1st build-up wiring layer Bu1's of composition, the 2nd build-up wiring layer Bu2 as the multilayer printed-wiring board 1 of the application
Insulating resin layer 30,31, relative dielectric constant is controlled below 3.5, so that the impedance control of high density printed wiring board
Become easy.And then preferably the relative dielectric constant is less than 3.1, so as to which impedance control precision can be carried further
It is high.And then the relative dielectric constant below 3.0 when, it can be ensured that substantially meet the impedance control precision of market demands.This
In, as the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 relative dielectric constant, it is used in the 1st build-up wiring layer
Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30, the above-mentioned resin component used in 31 formation, manufacture are described later
Two copper foils for carrying semi-solid preparation resin bed, after making these resin face against each other and being laminated, etching removes copper foil, consolidate
After the insulating resin layer for the sheet changed, in this, as sample, with separating medium the resonance method (frequency of use：1GHz) the number of measure
Value.
Also, composition the 1st build-up wiring layer Bu1, the 2nd build-up wiring with regard to the multilayer printed-wiring board 1 of the application
For layer Bu2 insulating resin layer 30,31, to the glass transition temperature (Tg) after solidification, there is no particular limitation, but preferably
For less than 160 DEG C.By being set to the glass transition temperature (Tg) to be less than 160 DEG C, insulating resin layer 30,31 is in high-temperature area
Being changed into the tendency of low elasticity reduces, it is not easy to warpage occurs, thus is preferable.In addition, as " vitrifying turn mentioned here
Temperature ", the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30 are used in, is used in 31 formation
Above-mentioned resin component, manufacture it is described later two carry semi-solid preparation resin bed copper foils, make these resin face against each other simultaneously
After lamination, etching removes copper foil, the insulating resin layer for the sheet that have cured, in this, as sample, is filled with determination of viscoelasticity
Put the numerical value of (DMA) in the condition measure of 5 DEG C/min of programming rate.
And then composition the 1st build-up wiring layer Bu1 with regard to the multilayer printed-wiring board 1 of the application, the 2nd build-up wiring
For layer Bu2 insulating resin layer 30,31, thickness is preferably 20 μm~80 μm.The thickness of the insulating resin layer 30,31 is less than 20
μm when, it is difficult to ensure insulating properties, and " warpage ", " distortion ", " change in size " have the tendency of to become big thus not preferred.The opposing party
Face, when the thickness of the insulating resin layer 30,31 is more than 80 μm, it is difficult to meet the requirement to thin printed wiring board, insulating resin
The thickness fluctuation of layer 30,31 can also become big, and " warpage ", " distortion ", " change in size " have the big tendency of change on the contrary, thus not
It is preferred that.And then just form the 1st build-up wiring layer Bu1, the 2nd build-up wiring layer Bu2 insulating resin layer 30,31 thickness
For, it is contemplated that thin layer requirement of the market for printed wiring board, more preferably less than 50 μm, more preferably 40 μm with
Under.
More than 8 layers of multilayer printed-wiring board：As the multilayer printed-wiring board of the application, minimum Rotating fields are 6 layers,
New build-up wiring layer is provided with the outer layer of 6 layers of the multilayer printed-wiring board, in more than 8 layers of the multilayer printed-wiring board
Outermost layer be preferably provided with build-up wiring layer as described below.
As the build-up wiring layer configured in the outermost layer, preferably the insulating resin layer for forming the build-up wiring layer is set to
Tensile modulus of elasticity at 25 DEG C is less than 5.0GPa low elasticity.The insulating resin layer for using this low elastic modulus be based on
The reasons why lower.After part installation being carried out with tin ball etc. on multilayer printed-wiring board, because error causes the installation base plate to fall,
And then when impacting on the ground, installation base plate can be by very strong dropping shock.Now, be configured with part installation in make
The face that the installation circuit of tin ball contacts with insulating resin base material, if subjected to fall suitable thump with above-mentioned,
The weight of installing component can be suppressed on installation circuit, so as to cause to occur by edge part to the insulating resin layer of circuit
Situations such as crackle generation, the stripping of installing component come off, circuit broken string.Therefore, it is excellent in order to eliminate the influence of this fortuitous event
The insulating resin layer for forming outermost build-up wiring layer is designed to low elasticity by choosing.The tensile modulus of elasticity is less than 5.0GPa
When, formed after installation base plate even if fall also can effectively prevent crackle from generating, the stripping of installing component comes off, circuit
Broken string etc., can enable installation base plate have good drop impact resistance.Now, if the tensile modulus of elasticity is less than 3.5GPa,
Then the drop impact resistance of installation base plate can substantially rise, if the tensile modulus of elasticity is less than 3.0GPa, the drop impact resistance can be entered
One step improves, and is also hardly sustained damage in the operating process of installation base plate even if falling.Though in addition, here not to the stretching
The lower limit of modulus of elasticity is illustrated, but is seen as 0.1GPa or so from empirically.When the tensile modulus of elasticity is less than 0.1GPa,
Depression after the pressure extrusion of the soldering apparatus used when the circuit of installation site is installed by part, thus it is not preferred.
Also, for being formed in the insulating resin layer of build-up wiring layer of outermost layer configuration, elongation at break is preferred
For more than 5%.When elongation at break is less than 5%, the insulating resin layer for forming build-up wiring layer becomes fragile, even if in above-mentioned stretching
Modulus of elasticity also has above-mentioned installation base plate drop impact resistance when being less than 5.0GPa can produce the situation of fluctuation.If however,
More than 5%, the insulating resin layer for forming build-up wiring layer will have for impact the elongation at break of the insulating resin layer
Sufficient flexibility, and with obtain good drop impact resistance can tendency.
As it is mentioned here, be formed in outermost layer configuration build-up wiring layer insulating resin layer low elasticity resin,
Epoxylite, cyanate resin, maleimide resin, polyphenylene ether group resin, polyamide, polyamides can be used
Imide resin, polyamide-imide resin, polybutadiene resinoid, acrylic resin, polyester resin, phenoxy resin,
Polyvinyl acetal resin, styrene-butadiene resinoid etc..
2nd, the manufacture of multilayer printed-wiring board
<First manufacture method>
The first manufacture method as the multilayer printed-wiring board, it is characterised in that there is following 1~process of process 3.
Hereinafter, reference picture 2~Fig. 4 illustrates process one by one.
Process 1：In the process, prepare as shown in Fig. 2 (a), be by framework material 12 and X-Y directions linear expansivity
The surface that 0ppm/ DEG C~20ppm/ DEG C of insulating barrier forms the insulating barrier 10 for adding framework material that resin 11 is formed has copper
The copper clad laminate 40 of layers of foil 14.Subsequently, for the copper foil layer 14 of the copper clad laminate 40, implement via hole as needed and add
Work, interlayer conduction plating processing, etching and processing etc., internal layer circuit 22 as defined in formation, so as to obtain the insulation shown in Fig. 2 (b)
The thickness of layer is less than 150 μm of core substrate 2.
Process 2：In the process, as shown in Fig. 3 (c), make the semi-solid preparation resin of the copper foil 50 with semi-solid preparation resin bed
After 15 side of layer abut and are laminated on the surface of the core substrate 2 shown in Fig. 2 (b), as shown in Fig. 3 (d), in core substrate 2
Two sides forms the 1st lamination layer 3a being made up of insulating resin layer 30 and copper foil layer 14.And then as the insulating resin layer now
30, X-Y direction linear expansivities be 1ppm/ DEG C~50ppm/ DEG C, and the value of the X-direction linear expansivity (Bx) of the insulating resin layer and
The value of Y-direction linear expansivity (By) meets the relation of [Bx]/[By]=0.9~1.1.In addition, conduct should carry semi-solid preparation resin
The copper foil 50 of layer, is to coat the resin varnish for forming insulating resin layer on the surface of copper foil layer 14, is then dried to make
Make.On the manufacture method of the copper foil 50 with semi-solid preparation resin bed, technical staff's energy of the manufacturing field of printed wiring board
Enough it is readily appreciated that, therefore, omits the explanation using accompanying drawing herein.
Then, in the process 2, from the state shown in Fig. 3 (d), for the copper foil layer at the 1st lamination layer 3a surface
14, after implementing conducting hole machined, interlayer conduction plating processing, etching and processing etc. as needed, copper circuit layer 23 is formed to set
1st build-up wiring layer Bu1, so as to obtain the laminate 51 with the 1st build-up wiring layer shown in Fig. 3 (e).
Process 3：In the process, formed for the circuit at the two sides of the laminate 51 with the 1st build-up wiring layer
Face, the 1st cell processes n is repeated1Secondary (n1>=1 integer), so as to obtain that there is (4+2n on the two sides of core substrate1) layer
Build-up wiring layer multilayer printed-wiring board.1st cell processes mentioned here refer to " make this with semi-solid preparation resin bed
The semi-solid preparation resin bed of copper foil is connected to the surface of lamination layer, further forms the lamination being made up of insulating resin layer and copper foil layer
After layer, the operation of circuit formation is carried out ".
Process of 1st cell processes shown in equivalent to Fig. 4 (f)~Fig. 5 (h).That is, as shown in Fig. 4 (f), carry this
The semi-solid preparation resin bed 15 of the copper foil 50 of semi-solid preparation resin bed is connected to the 1st of the laminate 51 with the 1st build-up wiring layer
In build-up wiring layer Bu1 circuit forming face, after forming the 2nd lamination layer 3b being made up of insulating resin layer 31 and copper foil layer 14,
As shown in Fig. 4 (g), obtain in multilayer of the two sides of core substrate 2 with 2 layers of the 1st build-up wiring layer Bu1, the 2nd lamination layer 3b
Copper clad laminate 52.
Subsequently, for the copper foil layer of the 2nd lamination layer 3b at the two sides of the multilayer copper-clad laminate 52 shown in Fig. 4 (g)
14, implement conducting hole machined, interlayer conduction plating processing, etching and processing etc. as needed, copper electricity is formed as shown in Fig. 5 (h)
After road floor 24, the multilayer printed-wiring board 1 there is provided the 2nd build-up wiring layer Bu2 is obtained.In addition, as shown in Fig. 5 (h), implementation level
Between conducting plating 20 after formed cross-layer blind hole 21 when, it is convenient to omit the 1st build-up wiring layer Bu1 of internal layer side perforate processing, enter
And process when can cut down to form the 1st build-up wiring layer Bu1, thus be preferable.
N is repeated in above-described 1st cell processes1Secondary (n1>=1 integer), so as to obtain in core substrate
Two sides there is (4+2n1) layer build-up wiring layer multilayer printed-wiring board 1.
<Second manufacture method>
Second manufacture method of the multilayer printed-wiring board is the manufacture method of above-mentioned multilayer printed-wiring board, its feature
It is that there is following 1~process of process 4.Here, 1~process of process 3 is identical with the first above-mentioned manufacture method.Therefore, this
In only different processes, i.e. process 4 are illustrated, the repetitive description thereof will be omitted.
Process 4：In the process, the multilayer printed-wiring board with build-up wiring layer is obtained, in the build-up wiring layer,
Relative to the first manufacture method process 3 obtain " there is (4+2n on the two sides of core substrate1) layer build-up wiring layer
The circuit forming face of build-up wiring layer at the outermost layer on the two sides of multilayer printed-wiring board ", when outermost layer has 25 DEG C
Tensile modulus of elasticity is less than 5.0GPa insulating resin layer.Now, tensile modulus of elasticity when making to have 25 DEG C after solidifying is small
Abut and be laminated to more in the semi-solid preparation resin bed side of the copper foil with semi-solid preparation resin bed of 5.0GPa semi-solid preparation resin bed
N is repeated in the surface of layer printed wiring board, the 2nd cell processes2Secondary (n2>=1 integer), so as in core substrate
Two sides sets [4+2 (n1+n2)] the build-up wiring layers of the Rotating fields of layer.
The manufacturing process of 2nd cell processes is identical with the manufacturing process of the 1st cell processes.However, the formation of lamination layer
The middle difference of the copper foil with semi-solid preparation resin bed used.That is, the copper with semi-solid preparation resin bed the 2nd cell processes used
For the semi-solid preparation resin bed of paper tinsel, 5.0GPa resin bed is less than using tensile modulus of elasticity during 25 DEG C after solidification, so as to
Form the lamination layer being made up of insulating resin layer and copper foil layer.So as to as the state shown in Fig. 5 (h), obtain in two sides laminating strips
Have the copper foil of semi-solid preparation resin bed half tree solidification lipid layer so that formed circuit 25 come be provided with the 3rd build-up wiring layer Bu3,
Multilayer printed-wiring board 1 shown in Fig. 5 (i).Drawing at 25 DEG C of the insulating resin layer 32 of the 3rd build-up wiring layer Bu3 now
Stretch modulus of elasticity and be less than 5.0GPa.
Embodiment 1
In the embodiment 1, by following process, 10 layers of multilayer printed-wiring board as shown in Figure 6 has been manufactured.
Process 1：In embodiment 1, prepared state shown in Fig. 2 (a), there is on the two sides of insulating barrier copper foil cover copper
Laminate (copper thickness：18 μm, thickness of insulating layer：60 μm, insulating barrier：It is containing glass cloth, X-direction linear expansivity
14.0ppm/ DEG C, Y-direction linear expansivity be 12.0ppm/ DEG C).Then, the copper foil of the outer layer of the etching and processing copper clad laminate,
Internal layer circuit 22 as defined in being formed on two sides, so as to obtain the thickness of the insulating barrier as shown in Fig. 2 (b) as less than 150 μm
Core substrate 2.
Process 2：In the process 2, as shown in Fig. 3 (c), make (the thickness of copper foil 50 with semi-solid preparation resin bed：30 μm,
Copper thickness：18 μm, semi-solid preparation resin bed：With epoxylite formed resin involucra) the side of semi-solid preparation resin bed 15 abut
And the surface of the core substrate 2 shown in Fig. 2 (b) is laminated to, so as to be formd as shown in Fig. 3 (d) on the two sides of core substrate 2
The 1st lamination layer 3a being made up of insulating resin layer 30 and copper foil layer 14.As the insulating resin layer of the 1st lamination layer 3a now,
X-Y directions linear expansivity is 39ppm/ DEG C, the value and Y-direction linear expansivity of the X-direction linear expansivity (Bx) of the insulating resin layer
(By) ratio of value is [Bx]/[By]=1.0, and tensile modulus of elasticity at 25 DEG C is 7.0GPa, relative dielectric constant 3.1,
Glass transition temperature (Tg) is 150 DEG C.
Then, in the process 2, as the state shown in Fig. 3 (d), for the copper foil layer at the 1st lamination layer 3a surface
14, after implementing conducting hole machined, interlayer conduction plating processing, etching and processing etc. as needed, formed with copper circuit layer 23
1st build-up wiring layer Bu1, so as to obtain the laminate 51 with the 1st build-up wiring layer shown in Fig. 3 (e).
Process 3：In the process 3, formed for the circuit at the two sides of the laminate 51 with the 1st build-up wiring layer
Face, with the same copper foil 50 with semi-solid preparation resin bed with being used in the 1st lamination layer 3a formation, it is repeated above-mentioned
The 1st cell processes twice, 2 layers of the 2nd build-up wiring layer Bu2, the 3rd build-up wiring layer Bu3 is set, so as to obtain in the core
The two sides of heart substrate 2 has build-up wiring layer Bu1~Bu3 8 layers of multilayer printed-wiring board.
Process 4：In process 4, for the 3rd product at the outermost layer of 8 layers of the multilayer printed-wiring board obtained in process 3
Layer wiring layer Bu3 circuit forming face, half of tensile modulus of elasticity less than 5.0GPa during by using with 25 DEG C after solidification
Copper foil (the thickness with semi-solid preparation resin bed of curing resin layer：40 μm, copper thickness：18 μm), carry out once above-mentioned the 2nd
Cell processes set the 4th build-up wiring layer Bu4, obtain being configured with the build-up wiring layer for having 10 layers on the two sides of core substrate
Bu1~Bu4 and outermost layer have the build-up wiring layer of insulating resin layer of the tensile modulus of elasticity less than 5.0GPa at 25 DEG C
10 layers of multilayer printed-wiring board.In addition, for the circuit set on 10 layers of the multilayer printed-wiring board, form
Simulate the test circuit pattern of high-density wiring circuit.
Then, thus obtained 10 layers of multilayer printed-wiring board is divided into four parts, the measure as 12cm × 12cm
With sample, amount of warpage is determined with the TherMoire AXP of Akrometrix company systems.As amount of warpage, four parts are being divided into
Each measurement sample 30 DEG C~260 DEG C of heating process and 260 DEG C~30 DEG C of temperature-fall period in, each shown in table 1
The temperature measuring amount of warpage of four measurement samples.Then, in the measured value of four, by the measure numerical value that warpage is minimum
The maximum measure numerical value (in table 1, being expressed as " minimum numerical value ") of (in table 1, being expressed as " highest numerical value ") and warpage is shown in table 1
In.It is also same processing in following embodiment and comparative example.
Embodiment 2
In the embodiment 2, by 1~process of process 4 same as Example 1, the more of as shown in Figure 6 10 layers are manufactured
After layer printed wiring board, amount of warpage is determined same as Example 1ly.Therefore, only different parts is illustrated.
In the embodiment 2, just with the (thickness of copper foil 50 with semi-solid preparation resin bed：30 μm, copper thickness：18 μm, half
Curing resin layer：With epoxylite, cyanate ester resin and bimaleimide resin formed resin involucra), through with implementation
1~the process of identical process 3 of example 1 formed the build-up wiring layer Bu3 of the 1st build-up wiring layer Bu1~the 3 insulating resin layer 32 and
Speech, X-Y directions linear expansivity are 24ppm/ DEG C, and the value and Y-direction line of the X-direction linear expansivity (Bx) of the insulating resin layer expand
The ratio of the value of rate (By) is [Bx]/[By]=1.0, and tensile modulus of elasticity at 25 DEG C is 8.9GPa, and relative dielectric constant is
3.2, glass transition temperature (Tg) is 270 DEG C.
Comparative example
Comparative example 1
In the comparative example 1, the multilayer printed-wiring board with 10 layers of embodiment 1 and 2 identical of embodiment has been manufactured, and with
Embodiment 1 determines amount of warpage in the same manner.
In the comparative example 1, on the two sides for the core substrate 2 that embodiment 1 uses, overlapping lamination is 20 μm containing thickness
Glass cloth is surveyed as the copper foil that the prepreg (after lamination, thickness is changed into 30 μm) and thickness of framework material are 18 μm to be formed
Circuit pattern on probation, the process are repeated four times, all more with 10 layers of prepreg composition so as to manufacture insulating barrier
Layer printed wiring board.For the insulating resin layer formed with the prepreg, X-direction linear expansivity is 14ppm/ DEG C, Y-direction
Linear expansivity is 12ppm/ DEG C, the ratio of the value of the X-direction linear expansivity (Bx) and the value of Y-direction linear expansivity (By) for [Bx]/
[By]=1.2, X-direction tensile modulus of elasticity at 25 DEG C is 24GPa, Y-direction tensile modulus of elasticity is 22GPa, with respect to dielectric
Constant is 4.6.
Comparative example 2
In the comparative example 2, the multilayer printed-wiring board with 10 layers of embodiment 1 and 2 identical of embodiment has been manufactured, and with
Embodiment 1 determines amount of warpage in the same manner.
In comparative example 2, what is used in the outermost formation of embodiment 1 and embodiment 2 " has 25 after solidification
DEG C when tensile modulus of elasticity less than 5.0GPa semi-solid preparation resin bed the copper foil (thickness with semi-solid preparation resin bed：40 μm,
Copper thickness：18 μm) ", the two sides of the core substrate 2 used in embodiment 1 is laminated the copper foil for carrying semi-solid preparation resin bed
To form test circuit pattern, the process is repeated four times, so as to manufacture 10 layers of multilayer printed-wiring board.It is used as this
When insulating resin layer, X-Y directions linear expansivity is 70ppm/ DEG C, and the value and Y-direction line of the X-direction linear expansivity (Bx) expand
The ratio of the value of rate (By) is [Bx]/[By]=1.0, and tensile modulus of elasticity at 25 DEG C is 3.2GPa, and relative dielectric constant is
3.1。
In addition, the measurement sample as the amount of warpage obtained in comparative example 2, just occurs immediately in the stage to complete
More than 1.0mm warpage, therefore, the measure of the amount of warpage during heating, cooling is not carried out.
The contrast of embodiment and comparative example
In order to carry out the contrast of embodiment and comparative example, concluded in table 1 and show including above-mentioned intrinsic numeric and
Data including amount of warpage.
With reference to table 1, the amount of warpage of comparing embodiment and comparative example 1.First, for embodiment and comparative example 1, by warpage
From the point of view of measuring minimum highest numerical value, 10 layers of multilayer printed-wiring board that the insulating barrier of comparative example 1 is all made up of prepreg
Warpage it is minimum, standard deviation is also small, it can thus be appreciated that the fluctuation of warpage is small.However, by embodiment and the amount of warpage of comparative example 1 most
When from the point of view of more minimum numerical value, the relation is reversed.From the point of view of amount of warpage by the minimum numerical value of embodiment 1, peak is
164 μm, minimum is 126 μm, and average value is 140 μm, and standard deviation is 13.4 μm.And then by the minimum numerical value of embodiment 2
From the point of view of amount of warpage, peak is 191 μm, and minimum is 124 μm, and average value is 156 μm, and standard deviation is 18.8 μm.Relative to
This, from the point of view of the amount of warpage by the minimum numerical value of comparative example 1, peak is 227 μm, and minimum is 145 μm, and average value is 164 μm,
Standard deviation is 25.2 μm.Therefore, when if from the point of view of the maximum minimum numerical value of amount of warpage, it may determine that the exhausted of comparative example 1
The warpage for 10 layers of the multilayer printed-wiring board that edge layer is all made up of prepreg is maximum, and standard deviation is also big, the ripple of warpage
It is dynamic big.
From these facts, as shown in comparative example 1 only using the multilayer printed-wiring board that prepreg manufactures and
Speech, there is amount of warpage to become difficult situation with generation fluctuation, the operation as product between a batch of product.Relative to
This, as shown in the multilayer printed-wiring board of the application, " the 1st lamination layer " and " the 2nd lamination layer " are made if meeting above-mentioned condition
Which kind of layer no matter is configured for the 3rd layer of later build-up wiring layer, " warpage ", " distortion ", " change in size " can be reduced, and
Fluctuation can be made to diminish, and then " warpage ", " distortion ", the expection of " change in size " become possible to, operability is also improved.
Industrial applicibility
Compared with the conventional multilayer printed-wiring board with build-up wiring layer, the multilayer printed-wiring board of the application
" warpage ", " distortion ", " change in size " are small, fluctuation is few, it is thus possible to the error in estimation manufacturing process in advance, in manufacturing process
The problem of become to be difficult to occur.Therefore, the multilayer printed-wiring board as the application, part installation is easy, can be used as Gao Pin
The printed wiring board of matter is supplied to market.Also, the manufacture method of the multilayer printed-wiring board as the application, can directly it make
With conventional lamination autofrettage, thus there is advantage in terms of effective usability of existing equipment.
Claims (5)
1. multilayer printed-wiring board, it is that there is provided the multi-sheet printed of more than 2 layers of build-up wiring layer on the two sides of core substrate
Wiring plate, it is characterised in that
In the core substrate for forming the multilayer printed-wiring board, the thickness of insulating barrier is less than 150 μm, adds framework material
The two sides of insulating barrier there is internal layer circuit, and the X-Y directions linear expansivity of the insulating barrier for adding framework material is 0ppm/
DEG C~20ppm/ DEG C,
The 1st build-up wiring layer set on the two sides of the core substrate and the 2nd product set on the surface of the 1st build-up wiring layer
Layer wiring layer is made up of copper circuit layer and X-Y directions linear expansivity for 1ppm/ DEG C~50ppm/ DEG C of insulating resin layer, and should
The X-direction linear expansivity Bx of insulating resin layer value and Y-direction linear expansivity By value meet the pass of Bx/By=0.9~1.1
System,
Forming tensile modulus of elasticity of the insulating resin layer of the 1st build-up wiring layer and the 2nd build-up wiring layer at 25 DEG C is
5GPa~10GPa,
In the outermost layer of multilayer printed-wiring board, there is provided the insulation tree for being less than 5.0GPa with tensile modulus of elasticity at 25 DEG C
The build-up wiring layer of lipid layer.
2. multilayer printed-wiring board as claimed in claim 1, wherein, form the 1st build-up wiring layer and the 2nd build-up wiring
The thickness of the insulating resin layer of layer is 20 μm~80 μm.
3. multilayer printed-wiring board as claimed in claim 1 or 2, wherein, form the 1st build-up wiring layer and the 2nd lamination
The relative dielectric constant of the insulating resin layer of wiring layer is less than 3.5.
4. multilayer printed-wiring board as claimed in claim 1 or 2, wherein, it is formed in the build-up wiring layer of outermost layer setting
The elongation at break of insulating resin layer is more than 5%.
5. the manufacture method of multilayer printed-wiring board, it is the multilayer printed-wiring board described in any one in Claims 1 to 4
Manufacture method, it is characterised in that there is following 1~process of process 4,
Process 1：Used in the table for the insulating barrier for adding framework material that X-Y directions linear expansivity is 0ppm/ DEG C~20ppm/ DEG C
Face has the copper clad laminate of copper foil layer, forms internal layer circuit, so as to obtain the core base that the thickness of insulating barrier is less than 150 μm
Plate,
Process 2：Used in the surface of copper foil form solidification after insulating resin layer X-Y directions linear expansivity for 1ppm/ DEG C~
50ppm/ DEG C and the X-direction linear expansivity Bx of insulating resin layer value and Y-direction linear expansivity By value meet Bx/By=
The copper foil with semi-solid preparation resin bed of the semi-solid preparation resin bed of 0.9~1.1 relation, the copper for making this carry semi-solid preparation resin bed
The semi-solid preparation resin bed side of paper tinsel abuts and is laminated to the two sides of the core substrate, then carries out circuit and is formed, so as to obtain band
There is the laminate of the 1st build-up wiring layer,
Process 3：The semi-solid preparation resin bed of the copper foil with semi-solid preparation resin bed is set to be connected to the layer with the 1st build-up wiring layer
The surface of pressing plate, the lamination layer being made up of insulating resin layer and copper foil layer is further formed, then carry out circuit and formed, will so
Operation be set to the 1st cell processes, to the two sides of the laminate with the 1st build-up wiring layer, the 1st cell processes enter repeatedly
Row n1It is secondary, wherein n1For the integer more than or equal to 1, so as to which the two sides obtained in core substrate has 4+2n1The product of the Rotating fields of layer
Multilayer printed-wiring board layer by layer,
Process 4：In the 4+2n formed with the 1st cell processes1The surface of the build-up wiring layer of layer, with foring 25 DEG C after solidification
When tensile modulus of elasticity less than 5.0GPa semi-solid preparation resin bed the copper foil with semi-solid preparation resin bed, make should with partly consolidate
After the semi-solid preparation resin bed side of the copper foil of change resin bed abuts and is laminated, carry out circuit and formed, it is single that such operation is set into the 2nd
N is repeated in first process, the 2nd cell processes2It is secondary, wherein n2For the integer more than or equal to 1, so as to obtain being configured with core
The two sides of substrate has 4+2 (n1+n2) layer Rotating fields lamination layer, and outermost layer have 25 DEG C when tensile modulus of elasticity
The multilayer printed-wiring board of the build-up wiring layer of insulating resin layer less than 5.0GPa.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012270788 | 2012-12-11 | ||
| JP2012-270788 | 2012-12-11 | ||
| PCT/JP2013/083266 WO2014092137A1 (en) | 2012-12-11 | 2013-12-11 | Multilayer printed circuit board and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104823530A CN104823530A (en) | 2015-08-05 |
| CN104823530B true CN104823530B (en) | 2018-03-30 |
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| CN201380063322.4A Active CN104823530B (en) | 2012-12-11 | 2013-12-11 | Multilayer printed-wiring board and its manufacture method |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JP6295206B2 (en) |
| KR (1) | KR102097847B1 (en) |
| CN (1) | CN104823530B (en) |
| TW (1) | TWI501715B (en) |
| WO (1) | WO2014092137A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105722303B (en) * | 2014-12-04 | 2019-01-25 | 中山台光电子材料有限公司 | Multilayer board |
| CN105357864A (en) * | 2015-11-30 | 2016-02-24 | 珠海方正科技多层电路板有限公司 | Multilayer circuit board and manufacturing method |
| JP5991500B1 (en) * | 2016-03-18 | 2016-09-14 | パナソニックＩｐマネジメント株式会社 | Metal-clad laminate, printed wiring board, method for producing metal-clad laminate, and method for producing printed wiring board |
| WO2018003590A1 (en) * | 2016-06-28 | 2018-01-04 | 住友ベークライト株式会社 | Heat-curable resin composition, resin film with carrier, printed wiring board, and semiconductor device |
| KR102436225B1 (en) * | 2017-07-28 | 2022-08-25 | 삼성전기주식회사 | Printed circuit board |
| JP7607616B2 (en) | 2022-07-26 | 2024-12-27 | 株式会社Ｄｎｐファインケミカル | Printed Wiring Boards |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW383435B (en) * | 1996-11-01 | 2000-03-01 | Hitachi Chemical Co Ltd | Electronic device |
| JP3944795B2 (en) * | 1997-06-20 | 2007-07-18 | 日立化成工業株式会社 | Multilayer wiring board |
| JP3904100B2 (en) * | 1997-07-18 | 2007-04-11 | 日立化成工業株式会社 | Multilayer wiring board |
| JPH11261228A (en) | 1998-03-13 | 1999-09-24 | Ibiden Co Ltd | Multilayered printed wiring board |
| JP2000013033A (en) * | 1998-06-25 | 2000-01-14 | Denso Corp | Printing wiring board and electronic device |
| JP2002327165A (en) * | 2001-04-20 | 2002-11-15 | Three M Innovative Properties Co | Thermosetting adhesive film and adhesive structure given by using the same |
| JP2003001752A (en) * | 2001-06-26 | 2003-01-08 | Kanegafuchi Chem Ind Co Ltd | Laminate and multilayered wiring board |
| JP2003086941A (en) | 2001-09-13 | 2003-03-20 | Matsushita Electric Works Ltd | Printed wiring board |
| JP2004342827A (en) | 2003-05-15 | 2004-12-02 | Mitsubishi Gas Chem Co Inc | Multilayer printed circuit board |
| TW200626038A (en) * | 2003-12-05 | 2006-07-16 | Ibiden Co Ltd | Multilayer PCB |
| JP4924871B2 (en) * | 2006-05-08 | 2012-04-25 | 日立化成工業株式会社 | Composite board and wiring board |
| JP2009544153A (en) * | 2006-07-14 | 2009-12-10 | ステイブルコール，インコーポレイティド | Build-up printed wiring board substrate having a core layer that is part of the circuit |
| US20080200084A1 (en) * | 2007-02-16 | 2008-08-21 | Angus Richard O | Compositions for thin circuit materials, circuits, multi-layer circuits, and methods of manufacture thereof |
| WO2008117711A1 (en) | 2007-03-27 | 2008-10-02 | Panasonic Electric Works Co., Ltd. | Metal-plated laminated board, multilayer laminated board and method for manufacturing the same |
| TWI416673B (en) * | 2007-03-30 | 2013-11-21 | Sumitomo Bakelite Co | Connection structure for flip-chip semiconductor package, build-up layer material, sealing resin composition, and circuit substrate |
| JP4862963B2 (en) * | 2008-06-05 | 2012-01-25 | 住友ベークライト株式会社 | Manufacturing method of semiconductor device |
| JP5703010B2 (en) * | 2010-12-16 | 2015-04-15 | 新光電気工業株式会社 | Semiconductor package and manufacturing method thereof |
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2013
- 2013-12-11 TW TW102145792A patent/TWI501715B/en active
- 2013-12-11 WO PCT/JP2013/083266 patent/WO2014092137A1/en active Application Filing
- 2013-12-11 CN CN201380063322.4A patent/CN104823530B/en active Active
- 2013-12-11 JP JP2014552075A patent/JP6295206B2/en active Active
- 2013-12-11 KR KR1020157015166A patent/KR102097847B1/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| TWI501715B (en) | 2015-09-21 |
| WO2014092137A1 (en) | 2014-06-19 |
| CN104823530A (en) | 2015-08-05 |
| KR20150094625A (en) | 2015-08-19 |
| JPWO2014092137A1 (en) | 2017-01-12 |
| TW201448701A (en) | 2014-12-16 |
| KR102097847B1 (en) | 2020-04-06 |
| JP6295206B2 (en) | 2018-03-14 |
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