CN104820182A - Signal integrity test method of SAS 12G RX link - Google Patents

Abstract

The invention discloses a signal integrity test method of a SAS 12G RX link, which belongs to the field of computer test design; the method is as follows: the TX port and the RX port of a SAS controller are signal-connected through a SAS signal test fixture to form a loop; The type generator controls the TX end to send a specific data pattern, and the RX end receives this specific data pattern; check the error code at the RX end after receiving a certain bit of data; if there is no error code, the signal of the RX link is complete and does not need to be optimized; if there is Bit errors occur, and there is a signal integrity problem in the RX link, and optimization is performed until no bit errors occur in the test; the present invention greatly reduces the errors caused by human operations, and improves the accuracy of the test.

Description

A signal integrity test method for SAS 12G RX link

technical field

The invention discloses a signal integrity test method, which belongs to the field of computer test design, in particular to a signal integrity test method of a SAS 12G RX link.

Background technique

SAS (Serial Attached SCSI) is serial SCSI technology, which is a new type of disk connection technology. It combines the advantages of existing parallel SCSI and serial connection technologies, uses serial communication as the protocol infrastructure, adopts SCSI extended instruction set and is compatible with SATA devices, and is a multi-level storage device connection protocol stack. SAS reduces address conflicts and slowdown of daisy-chain connections; provides a dedicated signal path for each device to ensure maximum bandwidth, better scalability, and more disk devices can be connected.

With the rapid development of computer technology, the data transmission rate is getting higher and higher. The transmission rate of SAS has reached 12Gbps. However, with the increase of data transmission rate, the signal integrity requirements are also increasing. Subsequently, the SAS 12G system can run stably. In addition to the common signal integrity test of the TX link, the signal integrity of the RX link also needs to be tested, but there is currently no easy way to test the SAS RX link signal integrity. In order to fully test the signal quality of the SAS 12G RX link, the present invention proposes a signal integrity test method for the SAS 12G RX link. The test method does not depend on an oscilloscope, and the test can be completed only by using the SAS test fixture and test software. Compared with the RX link signal test with an oscilloscope, the error caused by human operation is greatly reduced, and the accuracy of the test is improved.

Contents of the invention

In order to fully test the signal quality of the SAS 12G RX link and ensure the stable operation of the SAS 12G system, the present invention provides a signal integrity test method for the SAS 12G RX link. The error caused by human operation is reduced, and the accuracy of the test is improved.

The concrete scheme that the present invention proposes is:

A signal integrity test method for SAS 12G RX link:

Connect the TX port of the SAS controller to the RX port through the SAS signal test fixture to form a loop;

The pattern generator controls the TX end to send a specific data pattern, and the RX end receives this specific data pattern;

After receiving a certain bit of data, check the bit error at the RX end; if there is no bit error, the signal of the RX link is complete and does not need to be optimized; if there is a bit error, there is a signal integrity problem in the RX link, optimize it until there is no bit error in the test produce.

The signal connection between the TX port and the RX port through the SAS signal test fixture is to use the SMA cable to lead out from the TX port of the SAS controller, connect the SAS female head of the SAS signal test fixture, and then lead out the TX signal line through the SMA male head Connect to the RX port of the SAS controller.

The TX end is controlled by the PRBS generator to send the PRBS5 data pattern, and the RX end receives the PRBS5 data pattern.

After receiving 10 ¹⁰ -10 ¹⁵ bit data, check the bit error at the RX end, and the bit error rate does not exceed 10 ^-10 .

A signal integrity test system for a SAS 12G RX link, including a SAS controller, a SAS test fixture, and a pattern generator;

The SAS controller includes a TX port and an RX port, and the TX port and the RX port are connected through the SAS signal test fixture to form a loop;

The pattern generator is connected with the SAS controller to control the TX end to send a specific data pattern, and the RX end to receive the specific data pattern.

In the system, the signal connection between the TX port and the RX port through the SAS signal test fixture is to use the SMA cable to lead out from the TX port of the SAS controller, connect the SAS female head of the SAS signal test fixture, and then pass the TX signal line through the SMA The male header is connected to the RX port of the SAS controller.

The pattern generator is a PRBS generator, which is composed of a shift register and an exclusive OR gate.

The advantage of the present invention is that: the present invention uses the SAS signal test fixture to connect the TX signal of the tested SAS port to the RX to form a loop. Control the TX end to send a specific data pattern, and the RX receiving end to receive the same data pattern, and check the error code at the RX end after receiving a certain bit of data. If there is no bit error, it means that there is no problem with the signal integrity of the RX link; if there is a bit error, it means that there is a signal integrity problem in the RX link, and design optimization is required until no bit error occurs during the test. The test method of the present invention does not rely on an oscilloscope like a traditional test method, and only one SAS test fixture and test software can be used to complete the test. Compared with testing with an oscilloscope, this method greatly reduces the errors caused by human operations. Improved test accuracy and test efficiency.

Description of drawings

Figure 1 Schematic diagram of the composition of the test system;

Fig. 2 is a schematic diagram of the testing principle of the present invention.

Detailed ways

The present invention will be further described in conjunction with the accompanying drawings.

As shown in Figure 1, a signal integrity test system for a SAS 12G RX link, including a SAS controller, a SAS test fixture, and a pattern generator;

The SAS controller includes a TX port and an RX port, and the TX port and the RX port are signal-connected through the SAS signal test fixture to form a loop; in the system, the signal connection between the TX port and the RX port through the SAS signal test fixture is to use the SMA The cable is led out from the TX port of the SAS controller, connected to the SAS female head of the SAS signal test fixture, and then the TX signal cable is led out to the RX port of the SAS controller through the SMA male head;

The pattern generator is connected with the SAS controller to control the TX end to send a specific data pattern, and the RX end to receive the specific data pattern. The pattern generator can be a PRBS generator, which is composed of a shift register and an exclusive OR gate.

Basically, a SAS12G RX link signal integrity test method is used in the test system, and the SAS signal test fixture is used to connect the TX (Transmitter) signal of the tested SAS port to the RX (Receiver), thus forming a loop (Loop back ). The PRBS generator controls the TX end to send a specific data pattern, such as: PRBS5, the RX receiving end receives the same data pattern, and checks the bit error (BER) at the RX end after receiving 10 ¹⁰ -10 ¹⁵ bit data. If there is no bit error, That is, if the bit error rate is less than ^{10 -10} , it means that there is no problem with the signal integrity of the RX link; No bit errors occurred in the test.

The specific operation process is as follows:

Build a test platform, connect the TX on the SAS test fixture to the RX with an SMA cable, you can insert the SAS test fixture into the SAS port under test or use an SMA cable to connect;

Use the PRBS generator to control the TX end of the SAS port under test to send the PRBS5 data pattern;

The PRBS generator controls the RX end to receive the PRBS5 data pattern, and observe the received bit error situation;

After receiving 10 ¹² bit data at the RX end, check the bit error at the RX end, the results are as follows:

Except for the technology disclosed in the present invention, other technologies used in the present invention are prior art that can be understood by those skilled in the art.

Claims (7)

1. a measuring signal integrality method for SAS 12G RX link, is characterized in that:

The TX port of SAS controller is carried out signal with RX port by SAS signal testing fixture be connected, form a loop;

Pattern generator control TX end sends particular data code shape, and RX termination receives this particular data code shape;

The error code that RX holds is checked after receiving certain bit data; If do not have error code, the signal integrity of RX link is without the need to optimizing; If there is error code to produce, there is problems of Signal Integrity in RX link, is optimized, until test does not have error code to produce.

2. the measuring signal integrality method of a kind of SAS 12G RX link according to claim 1, it is characterized in that by SAS signal testing fixture, described TX port and RX port are undertaken that signal is connected is utilize SMA cable to be drawn by the TX port of SAS controller, connect the SAS female of SAS signal testing fixture, then drawn the RX port being connected to SAS controller by TX signal wire by SMA male.

3. the measuring signal integrality method of a kind of SAS 12G RX link according to claim 1 and 2, it is characterized in that the TX end described in PRBS generator controls sends PRBS5 numeric data code shape, RX termination receives this PRBS5 numeric data code shape.

4. the measuring signal integrality method of a kind of SAS 12G RX link according to claim 3, is characterized in that described reception 10 ¹⁰-10 ¹⁵check the error code that RX holds after bit data, the bit error rate is less than 10 ^-10.

5. a measuring signal integrality system for SAS 12G RX link, is characterized in that comprising SAS controller, SAS test fixture, pattern generator;

SAS controller comprises TX port and RX port, and TX port carries out signal with RX port by SAS signal testing fixture and is connected, and forms a loop;

Pattern generator is connected with SAS controller, and control TX end sends particular data code shape, and RX termination receives this particular data code shape.

6. the measuring signal integrality system of a kind of SAS 12G RX link according to claim 5, it is characterized in that by SAS signal testing fixture, described TX port and RX port are undertaken that signal is connected is utilize SMA cable to be drawn by the TX port of SAS controller, connect the SAS female of SAS signal testing fixture, then drawn the RX port being connected to SAS controller by TX signal wire by SMA male.

7. the measuring signal integrality system of a kind of SAS 12G RX link according to claim 5 or 6, is characterized in that described pattern generator is PRBS generator, is made up of shift register and XOR gate.