CN104777650B - Tft array substrate, its production method, liquid crystal display panel and display device - Google Patents

Abstract

The invention discloses a TFT array substrate, a manufacturing method thereof, a liquid crystal display panel and a display device, comprising: a base substrate, a triangular common electrode metal layer disposed on the base substrate between two PAD regions, and The insulating layer arranged on the metal layer of the common electrode, the PAD area is the wiring area around the display area on the TFT array substrate; wherein, the surface of the insulating layer has at least one first groove. Since at least one first groove is provided on the insulating layer, it can be used to weaken the aggregation of the alignment film solution to the area where the common electrode metal layer is located and to diffuse outward, which solves the problem of the reduction of the alignment film solution in the display area and the uneven distribution of the solution. The thickness of the alignment film is thin and the uniformity is poor, resulting in the problem of poor moiré, so that the alignment film solution in the display area can be evenly distributed, avoiding poor moiré, and thereby improving the quality of the display panel.

Description

TFT array substrate, manufacturing method thereof, liquid crystal display panel and display device

technical field

The invention relates to the field of display technology, in particular to a TFT array substrate, a manufacturing method thereof, a liquid crystal display panel and a display device.

Background technique

At present, the liquid crystal display panel (Liquid Crystal Display, LCD) controls the light penetrating the liquid crystal layer by controlling the rotation direction and rotation angle of the liquid crystal molecules, thereby displaying images of various grayscales, which has high picture quality, small size, and light weight. And other advantages, widely used in mobile phones, notebook computers, televisions and monitors and other products. Usually, in order to arrange the major axes of most liquid crystal molecules regularly, an alignment film is formed on a thin film transistor (Thin Film Transistor, TFT) array substrate in an LCD.

The existing TFT array substrate, as shown in Figure 1a, is provided with a display area (AA area) and a plurality of (taking 2 as an example in Figure 1a) wiring areas (PAD areas) on the base substrate 001, every two PADs The area between the regions is the area where the triangular common electrode metal layer 002 is located, wherein the height of the area where the common electrode metal layer is located is usually less than or equal to the height of the display area; Figure 1b shows the area where the common electrode metal layer is located along the The schematic cross-sectional structure in the AA' direction includes: a base substrate 001 , a common electrode metal layer 002 and an insulating layer 003 sequentially disposed on the base substrate 001 . In the process of coating the alignment film, the inkjet printing method is usually used. After the inkjet printing method is applied, when the alignment film solution diffuses, the area where the metal layer of the common electrode is conventionally designed is triangular and the overall surface is flat. The alignment film solution is easy to gather and diffuse outward from the two ends to the gap between the two PADs, that is, the area where the triangular common electrode metal is located, resulting in a decrease in the alignment film solution in the display area and uneven distribution, which in turn leads to a thinner alignment film during high temperature curing. And the uniformity is poor, prone to poor moiré.

Therefore, how to achieve a more uniform thickness of the alignment film in the display area and improve moiré defect is a technical problem urgently needed to be solved by those skilled in the art.

Contents of the invention

In view of this, the embodiments of the present invention provide a TFT array substrate, a manufacturing method thereof, a liquid crystal display panel, and a display device, which can uniformly distribute the alignment film solution in the display area, avoid moiré defects, and further improve the quality of the display panel.

Therefore, an embodiment of the present invention provides a TFT array substrate, including: a base substrate, a triangular common electrode metal layer disposed on the base substrate between two PAD regions, and a triangular common electrode metal layer disposed on the common electrode The insulating layer on the electrode metal layer, the PAD area is the wiring area around the display area on the TFT array substrate; wherein,

The surface of the insulating layer has at least one first groove.

In a possible implementation manner, the above-mentioned TFT array substrate provided by the embodiment of the present invention further includes: a transparent conductive layer disposed on the insulating layer and in direct contact with the insulating layer; the transparent conductive layer There is a second groove matching the first groove of the insulating layer, and the transparent conductive layer is electrically connected to the common electrode metal layer through the first groove.

In a possible implementation manner, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, at least a part of the surface of the common electrode metal layer has a third groove corresponding to the position of the first groove of the insulating layer. groove.

In a possible implementation manner, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, the common electrode metal layer is arranged on the same layer as the gate of the TFT array substrate;

The insulating layer includes a gate insulating layer and a passivation layer stacked on the substrate, and at least one of the first grooves is located between the gate insulating layer and the passivation layer.

In a possible implementation manner, the above-mentioned TFT array substrate provided by the embodiment of the present invention further includes: a second electrode metal layer is disposed between the base substrate and the common electrode metal layer.

In a possible implementation manner, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, the common electrode metal layer is arranged on the same layer as the source and drain electrodes of the TFT array substrate;

The insulating layer is a passivation layer, and the passivation layer has at least one first groove.

In a possible implementation manner, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, the opening shapes of the first groove, the second groove and the third groove are strips or holes shape.

The embodiment of the present invention also provides a method for manufacturing the above-mentioned TFT array substrate provided by the embodiment of the present invention, including:

forming the pattern of the common electrode metal layer on the base substrate;

A pattern of an insulating layer having at least one first groove is formed on the common electrode metal layer.

In a possible implementation manner, the method for manufacturing the above-mentioned TFT array substrate provided by the embodiment of the present invention, after forming the pattern of the insulating layer having at least one first groove, includes:

A pattern of a transparent conductive layer having a second groove is formed on the insulating layer, and the transparent conductive layer is electrically connected to the common electrode metal layer through the first groove.

An embodiment of the present invention also provides a liquid crystal display panel, including an opposite substrate and a TFT array substrate, and a liquid crystal layer located between the opposite substrate and the TFT array substrate; wherein,

The TFT array substrate is the above-mentioned TFT array substrate provided by the embodiment of the present invention.

An embodiment of the present invention also provides a display device, including the above-mentioned liquid crystal display panel provided by the embodiment of the present invention.

The beneficial effects of the embodiments of the present invention include:

A TFT array substrate, a manufacturing method thereof, a liquid crystal display panel, and a display device provided by an embodiment of the present invention include: a base substrate, a triangular common electrode metal layer disposed on the base substrate between two PAD regions , and an insulating layer disposed on the common electrode metal layer, the PAD area is a wiring area on the periphery of the display area on the TFT array substrate; wherein, the surface of the insulating layer has at least one first groove. Since at least one first groove is provided on the insulating layer, it can be used to weaken the aggregation of the alignment film solution to the area where the common electrode metal layer is located and to diffuse outward, which solves the problem of the reduction of the alignment film solution in the display area and the uneven distribution of the solution. The thickness of the alignment film is relatively thin and the uniformity is poor, resulting in the problem of poor moiré, so that the alignment film solution in the display area can be evenly distributed, avoiding poor moiré, and thereby improving the quality of the display panel.

Description of drawings

Figure 1a is a top view of a TFT array substrate in the prior art;

Fig. 1b is a schematic cross-sectional structure diagram along the A-A' direction of the region where the common electrode metal layer is located in Fig. 1a;

2a to 2f are schematic structural diagrams of TFT array substrates provided by embodiments of the present invention;

3a to 3c are top views of the region where the common electrode metal layer is located in the TFT array substrate provided by the embodiment of the present invention;

4 to 7 are flow charts of the manufacturing method of the TFT array substrate provided by the embodiment of the present invention, respectively.

Detailed ways

The specific implementation manners of the TFT array substrate provided by the embodiments of the present invention, its manufacturing method and the display device will be described in detail below with reference to the accompanying drawings.

Wherein, the thickness and shape of each film layer in the drawings do not reflect the real proportion of the TFT array substrate, and the purpose is only to illustrate the content of the present invention.

An embodiment of the present invention provides a TFT array substrate, as shown in FIG. 2a, including: a base substrate 100, a triangular common electrode metal layer 200 disposed on the base substrate 100 between two PAD regions, and The insulating layer 300 disposed on the common electrode metal layer 200, the PAD area referred to here is the wiring area on the periphery of the display area on the TFT array substrate; wherein,

The insulating layer 300 has at least one first groove A on its surface.

In the above-mentioned TFT array substrate provided by the embodiment of the present invention, since at least one first groove A is provided on the insulating layer above the common electrode metal layer (in the patterning process, the insulating layer at the corresponding position of the first groove A can be completely etched or partially etched, that is, the depth of the first groove A is less than or equal to the thickness of the insulating layer), which can be used to weaken the aggregation of the alignment film solution to the area where the common electrode metal layer is located and to diffuse outward, solving the problem of display The alignment film solution in the area is reduced and the solution is unevenly distributed, and the thickness of the formed alignment film is relatively thin and the uniformity is poor, resulting in the problem of poor moiré, so that the alignment film solution in the display area can be evenly distributed to avoid poor moiré. Further, the quality of the display panel is improved.

In specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, in order to reduce the resistance of the common electrode metal layer 200, as shown in FIG. 2b, the array substrate may further include: The transparent conductive layer 400 in direct contact with the insulating layer 300; the transparent conductive layer 400 is electrically connected to the common electrode metal layer 200 through the first groove A (at this time, in the patterning process, the insulation at the corresponding position of the first groove A Layer 300 must be completely etched away, that is, the depth of the first groove A is equal to the thickness of the insulating layer 300), so that the transparent conductive layer 400 is electrically connected to the common electrode metal layer 200 through the first groove A (equivalent to a via hole). connected, the resistance of the common electrode metal layer 200 can be reduced to the greatest extent, and the signal-to-noise ratio when the common electrode metal layer 200 transmits electrical signals can be improved. Moreover, the transparent conductive layer 400 should have the same shape as the first groove A of the insulating layer 300 The matched second groove B, it should be noted that the second groove B matched with the first groove A specifically means that the transparent conductive layer 400 directly fills the first groove A, but does not fill it, so that it is transparent The conductive layer 400 has a second groove B. As shown in FIG. Since the surface of the transparent conductive layer 400 has the second groove B, it can also effectively solve the problem of uneven diffusion of the alignment film solution and avoid moiré defects.

In specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, in order to improve the contact ability between the transparent conductive layer 400 and the common electrode metal layer 200, as shown in FIG. 2c, at least a part of the common electrode metal layer 200 There may be a third groove C corresponding to the position of the first groove A of the insulating layer 300 on the surface (at this time, in the patterning process, the top layer of the common electrode metal layer may be partially etched, that is, the first groove and the second groove The total depth of the three grooves is less than the total thickness of the insulating layer and the common electrode metal layer). It should be noted that the position of the first groove A corresponds to the position of the third groove C, and the specific manufacturing process means that the first groove A and the third groove C can be formed simultaneously through exposure and etching through the same patterning process graphics.

In specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, as shown in FIG. When it is a gate metal material, the insulating layer 300 can include a gate insulating layer 301 and a passivation layer 302 stacked on the base substrate 100, in order to make the alignment film solution in the display area evenly distributed, avoid moiré defects, and can Increase the upper and lower gaps, at least one first groove A can be located between the gate insulating layer 301 and the passivation layer 302, that is, the gate insulating layer 301 and the passivation layer 302 have at least one first groove A, specifically in the manufacturing process The gate insulating layer 301 and the passivation layer 302 can be used as an integral film layer, and the pattern of the first groove A is formed on this integral film layer through a patterning process.

Further, in specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, when the common electrode metal layer 200 is arranged on the same layer as the gate of the TFT array substrate, in order to further reduce the resistance of the common electrode metal layer 200 , as shown in FIG. 2 e , the array substrate may further include: a second electrode metal layer 500 is disposed between the base substrate 100 and the common electrode metal layer 200 . In this case, the TFT substrate may be a TFT substrate in an Advanced Super Dimension Switch (ADS) panel or an In-Plane Switching (IPS) panel.

In specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, as shown in FIG. When the material is a source-drain metal material, the insulating layer 300 can be a passivation layer 302. At this time, in order to make the alignment film solution in the display area evenly distributed and avoid poor moiré, the passivation layer 302 has at least one first groove A . In addition, a gate insulating layer 301 may be disposed between the base substrate 100 and the common electrode metal layer 200 .

In a specific implementation, in the above-mentioned TFT array substrate provided by the embodiment of the present invention, the opening shapes of the first groove A, the second groove B and the third groove C may be configured as strips or holes. The strip shape can be strip shape, strip shape or other strip shape, and the hole shape can be round hole shape, oval hole shape or other hole shape. A plurality of first grooves A, second grooves B or third grooves C with elongated openings can be arranged in an array as shown in Figure 3a, or arranged in a staggered manner as shown in Figure 3b; A plurality of first grooves A, second grooves B or third grooves C whose openings are circular holes may be arranged in an array as shown in FIG. 3c.

It should be noted that the opening shape, number and arrangement of the first groove A, the second groove B and the third groove C are generally set according to actual needs, and are not limited here.

During specific implementation, in the TFT array substrate provided by the embodiment of the present invention, structures such as thin film transistors, gate lines, and data lines are generally formed on the base substrate, and these specific structures can be implemented in various ways, here Not limited.

Based on the same inventive concept, the embodiment of the present invention also provides a method for manufacturing the above-mentioned TFT array substrate provided by the embodiment of the present invention. Since the principle of solving the problem of this method is similar to that of the aforementioned TFT array substrate, the implementation of this method can be Refer to the implementation of the TFT array substrate, and repeated descriptions will not be repeated.

During specific implementation, the manufacturing method of the TFT array substrate provided by the embodiment of the present invention, as shown in FIG. 4 , specifically includes the following steps:

S401, forming a pattern of the common electrode metal layer on the base substrate;

S402, forming a pattern of an insulating layer having at least one first groove on the common electrode metal layer.

Further, in specific implementation, in the method for manufacturing the above-mentioned TFT array substrate provided by the embodiment of the present invention, as shown in FIG. 5 , after the pattern of the insulating layer having at least one first groove is formed in step S402, it may include :

S403, forming a pattern of a transparent conductive layer having a second groove on the insulating layer, and the transparent conductive layer is electrically connected to the common electrode metal layer through the first groove.

The manufacturing method of the TFT array substrate provided by the embodiment of the present invention will be described in detail below with two specific examples.

Example 1: As shown in Figure 6, the specific steps for making a TFT array substrate are as follows:

S601, forming a pattern of the second electrode metal layer on the base substrate;

In specific implementation, when the TFT substrate made is a substrate in an ADS panel or an IPS panel, a second electrode metal layer is deposited on the base substrate, and the material can be ITO, and the corresponding common electrode to be made is reserved through the patterning process. the second electrode metal layer in the area where the electrode metal layer is located;

S602, forming a pattern of the common electrode metal layer on the base substrate on which the second electrode metal layer is formed;

In specific implementation, a layer of gate metal material is deposited on the second electrode metal layer, and a triangular and flat common electrode metal layer can be formed by patterning, specifically, by methods such as coating, deposition, sputtering, etc. graphics;

S603, forming a pattern of a gate insulating layer and a passivation layer having at least one first groove on the common electrode metal layer;

In specific implementation, a layer of gate insulating layer material and passivation layer material is deposited on the common electrode metal layer, and the gate insulating layer material and passivation layer material corresponding to the position of the first groove are completely etched through the same patterning process ; It should be noted that part of the top layer of the common electrode metal layer can be etched away in this patterning process, or the top layer part can not be etched, which is not limited here;

S604, forming a pattern of a transparent conductive layer having a second groove on the passivation layer, and the transparent conductive layer is electrically connected to the common electrode metal layer through the first groove.

In specific implementation, a layer of transparent conductive layer is directly deposited on the passivation layer. The material can be ITO. The matched second groove is electrically connected with the common electrode metal layer.

So far, the above-mentioned TFT array substrate provided by the embodiment of the present invention has been fabricated through the above-mentioned steps S601 to S604 provided in Example 1.

Example 2: As shown in Figure 7, the specific steps for making a TFT array substrate are as follows:

S701, forming a pattern of a gate insulating layer on the base substrate;

In specific implementation, a layer of gate insulating layer is deposited on the base substrate, and the gate insulating layer corresponding to the area where the common electrode metal layer to be fabricated is retained through a patterning process;

S702, forming a pattern of the common electrode metal layer on the substrate on which the gate insulating layer is formed;

In specific implementation, a layer of source-drain metal material is deposited on the gate insulating layer, and a triangular and flat pattern of the common electrode metal layer can be formed through a patterning process, specifically, coating, deposition, sputtering, etc. ;

S703, forming a pattern of a passivation layer having at least one first groove on the common electrode metal layer;

In specific implementation, a layer of passivation layer material is deposited on the common electrode metal layer, and the passivation layer material corresponding to the position of the first groove is completely etched through the same patterning process; it should be noted that the common electrode metal layer Part of the top layer part of the patterning process can be etched away, or the top layer part is not etched, which is not limited here;

S704, forming a pattern of a transparent conductive layer having a second groove on the passivation layer, and the transparent conductive layer is electrically connected to the common electrode metal layer through the first groove.

In specific implementation, a layer of transparent conductive layer is directly deposited on the passivation layer. The material can be ITO. The matched second groove is electrically connected with the common electrode metal layer.

So far, the above-mentioned TFT array substrate provided by the embodiment of the present invention has been manufactured through the above-mentioned steps S701 to S704 provided in Example 2.

Based on the same inventive concept, an embodiment of the present invention also provides a liquid crystal display panel, including a TFT array substrate in any one of the above modes and an opposite substrate disposed opposite to the TFT array substrate, and a panel between the TFT array substrate and the opposite substrate between the liquid crystal layers. For the implementation of the liquid crystal panel, reference may be made to the above-mentioned embodiments of the TFT array substrate, and repeated descriptions will not be repeated.

Based on the same inventive concept, an embodiment of the present invention also provides a display device, including the above-mentioned liquid crystal display panel provided by the embodiment of the present invention, and the display device can be: a mobile phone, a tablet computer, a TV set, a monitor, a notebook computer, a digital photo frame , navigator and any other product or component with display function. The other essential components of the display device should be understood by those of ordinary skill in the art, and will not be repeated here, nor should they be regarded as limitations on the present invention. For the implementation of the display device, reference may be made to the above-mentioned embodiments of the liquid crystal display panel and the TFT array substrate, and repeated descriptions will not be repeated.

A TFT array substrate, a manufacturing method thereof, a liquid crystal display panel, and a display device provided by an embodiment of the present invention include: a base substrate, a triangular common electrode metal layer disposed on the base substrate between two PAD regions , and an insulating layer disposed on the common electrode metal layer, the PAD area is a wiring area on the periphery of the display area on the TFT array substrate; wherein, the surface of the insulating layer has at least one first groove. Since at least one first groove is provided on the insulating layer, it can be used to weaken the aggregation of the alignment film solution to the area where the common electrode metal layer is located and to diffuse outward, which solves the problem of the reduction of the alignment film solution in the display area and the uneven distribution of the solution. The thickness of the alignment film is relatively thin and the uniformity is poor, resulting in the problem of poor moiré, so that the alignment film solution in the display area can be evenly distributed, avoiding poor moiré, and thereby improving the quality of the display panel.

Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (9)

1. A TFT array substrate, comprising: the TFT array substrate comprises a substrate base plate, a common electrode metal layer and an insulating layer, wherein the common electrode metal layer is arranged on the substrate base plate and positioned between two PAD areas in a triangular shape, the insulating layer is arranged on the common electrode metal layer, and the PAD areas are wiring areas on the periphery of a display area on the TFT array base plate; which is characterized in that, among others,

the surface of the insulating layer is provided with at least one first groove;

a transparent conductive layer disposed on and in direct contact with the insulating layer; the transparent conducting layer is provided with a second groove matched with the first groove of the insulating layer and is electrically connected with the common electrode metal layer through the first groove;

and a third groove corresponding to the first groove of the insulating layer is arranged on the surface of at least one part of the common electrode metal layer.

2. The TFT array substrate of claim 1, wherein the common electrode metal layer is disposed on a same layer as a gate electrode of the TFT array substrate;

the insulating layer comprises a gate insulating layer and a passivation layer which are stacked on the substrate base plate, and at least one first groove is located between the gate insulating layer and the passivation layer.

3. The TFT array substrate of claim 2, further comprising: and a second electrode metal layer is arranged between the substrate base plate and the common electrode metal layer.

4. The TFT array substrate of claim 1, wherein the common electrode metal layer is disposed in a same layer as a source drain of the TFT array substrate;

the insulating layer is a passivation layer having at least one of the first grooves.

5. The TFT array substrate of any of claims 1-4, wherein the first recess, the second recess, and the third recess have an opening shape that is a stripe or a hole.

6. A method for fabricating the TFT array substrate according to any one of claims 1-5, comprising:

forming a pattern of a common electrode metal layer on a substrate;

and forming a pattern of an insulating layer with at least one first groove on the common electrode metal layer.

7. The method of claim 6, wherein after said patterning the insulating layer having the at least one first recess, comprising:

and forming a pattern of a transparent conducting layer with a second groove on the insulating layer, wherein the transparent conducting layer is electrically connected with the common electrode metal layer through the first groove.

8. A liquid crystal display panel comprises an opposite substrate and a TFT array substrate which are oppositely arranged, and a liquid crystal layer positioned between the opposite substrate and the TFT array substrate; which is characterized in that, among others,

the TFT array substrate is the TFT array substrate as claimed in any one of claims 1 to 5.

9. A display device comprising the liquid crystal display panel according to claim 8.