CN104776919B - FPGA-Based Infrared Focal Plane Array Stripe Non-uniformity Correction System and Method - Google Patents

Abstract

The invention discloses a kind of infrared focal plane array ribbon Nonuniformity Correction system and method based on FPGA, belong to infrared imagery technique field.The present invention for core, is optimized with the infrared equalization algorithm of intermediate value (MIRE) for algorithm and FPGA characteristic, including image buffer storage module, parameter calculating module, Nonuniformity Correction module and data outputting module.Parameter calculating module instructs to obtain weight coefficient according to host computer, original image is after caching, Nonuniformity Correction module is sequentially inputted in column direction obtains the histogram of each row image, accumulative histogram and inverse histogram, then by the way that accumulative histogram and inverse histogram are indexed and each row original image standardized onto the histogram of adjacent column respectively, finally the pixel value after each standardization is weighted to obtain final correction result and exported.The present invention can effectively correct infrared focal plane array ribbon heterogeneity, and due to all being realized using FPGA, speed is fast, can be done in real time correction.

Description

FPGA-Based Infrared Focal Plane Array Stripe Non-uniformity Correction System and Method

technical field

The invention belongs to the technical field of infrared imaging, and more specifically relates to a system and method for correcting striped non-uniformity of an infrared focal plane array using a median infrared equalization algorithm based on FPGA.

Background technique

Most of the infrared imaging systems used today are based on infrared focal plane array (IRFPA) devices, but due to manufacturing process level and material problems, infrared focal plane array devices have the problem of low signal-to-noise ratio, which is due to the inconsistent response of detection units The fixed pattern noise caused by it, on the other hand, is the striped non-uniformity caused by the non-uniformity of the readout circuit and the bias voltage noise. This non-uniformity seriously affects the quality of the infrared image and limits the infrared Applications of focal plane array devices.

Although the traditional non-uniformity correction method has excellent performance in removing the non-uniformity of infrared images, the strip-like non-uniformity has both structure and randomness. Existing calibration-based methods (such as: one-point calibration, two-point calibration) use the observation of the black body for image correction, which are only applicable to the case where the parameters are fixed in the time domain. However, traditional scene-based methods (such as: constant statistics method, neural network method, time-domain high-pass filter method, Kalman filter method) generally need to operate on several consecutive frames in the time domain, and their convergence speed is slow and cannot adapt to the parameters. domain changes. Therefore, it is necessary to study algorithms for correcting strip-like non-uniformity. At present, such algorithms mainly stay at the software implementation level, and the processing time is long, which cannot meet the real-time processing requirements of images. The existing hardware-based real-time infrared focal plane stripe non-uniformity correction system adopts an algorithm that is too simple, and the processing effect is poor. Therefore, it is necessary to design a real-time infrared focal plane array stripe non-uniformity correction system with good processing effect.

The median infrared equalization (MIRE) algorithm was proposed by Y.Tendero et al. in 2010. It has a good correction effect on striped non-uniformity, and has no iterative operation, so the complexity is low. The basic process is as follows: first, calculate the histogram I _j of each column of images C _j ; second, calculate the cumulative histogram H _j of each column of images; third, calculate the inverse histogram of the cumulative histogram of each column of images ; Fourth, calculate the median cumulative histogram Make Fifth, normalize the column histogram of each column to the median histogram of the column to obtain the corrected image

The following difficulties exist when using FPGA to realize the median infrared equalization algorithm: the five steps in the original algorithm process must completely complete all the calculations of the previous step before proceeding to the next calculation, which cannot form a coherent pipeline, which is not conducive to hardware implementation, and requires considerable storage space to cache intermediate results.

Contents of the invention

For the above defects or improvement needs of the prior art, the present invention provides a FPGA-based infrared focal plane array striped non-uniformity correction system and method, with the median infrared equalization algorithm (MIRE) as the core, for the algorithm and FPGA The characteristics of the method are optimized, and the purpose is to fill the vacancy of the existing hardware systems and methods for correcting the striped non-uniformity.

In order to achieve the above object, according to one aspect of the present invention, a FPGA-based infrared focal plane array stripe non-uniformity correction system is provided, including an image cache module, a parameter calculation module, a non-uniformity correction module and a data output module, in:

The image caching module is used to cache the externally input infrared image, and output data of the image to the non-uniformity correction module in columns after one frame of image is cached;

The parameter calculation module is used to receive and analyze the input external instructions to obtain correction parameters, and convert the weight coefficients according to the correction parameters to the non-uniformity correction module;

The non-uniformity correction module includes:

The input control and data distribution module is used to control the image cache module to output a column of images to the histogram statistics module at a time, and count the number of columns that have been output at the same time, when all the data required to calculate the normalized pixels of a certain column of images have been obtained. , controlling the image caching module to output the column of image data after secondary caching to the cumulative histogram processing module;

The histogram statistics module is used to perform histogram statistics on the image column data output by the input control and data distribution module, and at the same time pass the histogram information of the previous column image to the cumulative histogram processing module;

The cumulative histogram processing module is used to calculate and cache the cumulative histogram of the column of images according to the histogram information of each column of images, and simultaneously generate the tag value needed to calculate the inverse histogram of the cumulative histogram and pass it to the tag The value forwarding module, and the index value of the column corresponding to the image data index passed by the input control and data distribution module is passed to the index value forwarding module;

The tag value forwarding module is configured to cache the tag value and forward it to the inverse histogram calculation module group;

The index value forwarding module is configured to forward the index value to the inverse histogram calculation module group;

The inverse histogram calculation module group includes a plurality of inverse histogram calculation modules, which are used to complete the calculation of the inverse histogram through the tag value and update the internal DPRAM of the module, and then perform the internal DPRAM on the internal DPRAM of the module according to the index value Index, and forward the corresponding data to the normalized computing module;

A parallel control module, configured to control each inverse histogram calculation module in the inverse histogram calculation module group to complete the calculation, update and corresponding data forwarding of the inverse histogram; and

The normalization calculation module is used to update the weighting coefficient through the parameter calculation module, and multiply the output result of the inverse histogram calculation module group by the corresponding weighting coefficient, and obtain the image correction result after adding the multiplied results, and delivering the image correction result to the data output module; and

The data output module is used for buffering and outputting corrected images.

According to another aspect of the present invention, a method for correcting striped non-uniformity of an infrared focal plane array based on FPGA is provided, comprising:

Step 1 Calculate the weighting coefficient in, Indicates the standard deviation; k indicates the serial number of the weighting coefficient, the value is 1, 2, ..., 2N+1, 2N+1 is the calculation window size;

Step 2 caches the original input infrared image;

Step 3. Mirroring and expanding the edge of the original input infrared image, adjusting the mapping relationship between the output column and the output image address, setting the initial address of the infrared image buffer space of the original input to be 0, the number of image columns to be L, and the calculation window The size is 2x+1, then the first address m when outputting the nth column image is:

When outputting the next pixel of the current column, the address is offset by the address space of one column of pixels;

Step 4 performs histogram statistics on the current column image C _j to obtain the histogram I _j ;

Step 5 calculates the cumulative histogram H _{j of the current image column C j ;}

Step 6 Calculate the inverse histogram of the cumulative histogram of the current image column C _j ;

Step 7 When the inverse histograms of all columns in the image correction calculation window of a certain column have been calculated, input the image pixel X _{i, j} of the column cached twice, and use this pixel in the corresponding column area of the cached cumulative histogram The gray value is the index value H _j (X _i,j ) obtained from the cumulative histogram of the address lookup;

Step 8 Use the index value H _j (X _i,j ) as the address index to obtain the pixel values of the image pixels X _{i, j} of the target column after normalization to the histogram of the corresponding column respectively

Step 9 Normalize each column of image to the pixel value after adjacent column histogram Multiply by the corresponding weighting coefficient ψ _σ (k), and add the multiplied results to get the image correction result

Step 10 repeats the steps 4 to 9 until the processing of all columns of the original input infrared image is completed;

Step 11 caches and outputs the corrected image data.

Generally speaking, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects:

1. Compared with the method of implementing infrared focal plane array strip non-uniformity correction by using DSP, all the algorithms of this method are completed by FPGA, without the need of DSP auxiliary operation, the system processing speed is fast, and large-format infrared can be realized Real-time correction of images, while effectively reducing the cost of correction;

2. Perform an equivalent transformation of steps 4 and 5 of the original algorithm, so that the two steps can form a complete pipeline, which greatly simplifies the structure of the system and saves the storage space required for storing the median histogram;

3. Use the marked value to realize the simultaneous calculation of the cumulative histogram and its inverse histogram, which saves the system processing time;

4. Using on-chip storage resources to cooperate with ping-pong operations and reasonable planning of the storage area to achieve pipeline processing on the column scale. That is, in the transmission cycle of a column of images, the modules at all levels on the pipeline complete the processing of a column of image data respectively and use the on-chip DPRAM to cache the intermediate results obtained from the processing, and at the same time output the intermediate results obtained in the previous column cycle to the The next level module is processed. Make full use of the advantages of FPGA parallel computing, which is conducive to the improvement of system running speed;

5. The FPGA resource occupation of the present invention is very small, and can be implemented using low-cost FPGA devices. The algorithm processing module can also be integrated into an FPGA as a sub-module with other algorithm processing modules, which only requires the entry logic of the image cache module It is very convenient to modify the export logic of the data output module to adapt to the timing of other modules without modifying the core algorithm module, which increases the practicability of the method.

Description of drawings

Fig. 1 is the structural diagram of the infrared focal plane array stripe non-uniformity correction system based on FPGA of the present invention;

Fig. 2 is the flow chart of the infrared focal plane array stripe non-uniformity correction method based on FPGA of the present invention;

Fig. 3 is a schematic diagram of updating the weighting coefficient register of the standardized calculation module of the present invention;

Fig. 4 is a schematic diagram of the comparison between the original infrared image of the present invention, the infrared image artificially added with striped non-uniformity, and the processed image of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute a conflict with each other.

Fig. 1 shows the structural diagram of the FPGA-based infrared focal plane array stripe non-uniformity correction system of the present invention, including an image cache module, a parameter calculation module, a non-uniformity correction module and a data output module. Among them, the non-uniformity correction module is the main body of the whole system, including input control and data distribution module, histogram statistics module, cumulative histogram processing module, mark value forwarding module, index value forwarding module, inverse histogram calculation module group, parallel control modules and normalized computing modules. in:

The image cache module uses the external image cache DPRAM (DUAL-PORT STATIC RAM) to cache the externally input infrared image, and sends a data ready signal to the input control and data distribution module of the non-uniformity correction module after a frame of image is cached, and at the same time In response to a control command issued by the input control and data distribution module, the images are output in the order of columns. The image cache module divides the external DPRAM storage area into two parts, and operates in a ping-pong manner: while using the A area to cache the current frame image, it outputs the previous frame image cached in the B area to the input control and data distribution module. The image cache module uses the DPRAM (not shown in Figure 1) inside the FPGA chip to cache the image twice while outputting the cached image, and outputs it under the control of the input control and data distribution module.

The parameter calculation module uses UART to realize the interface with the upper computer, receives external command input and analyzes the upper computer instructions, and obtains the calibration parameters. The weighting coefficients required for calculation are calculated in advance on the computer and stored in the on-chip ROM. The parameter calculation module obtains the corresponding address from the ROM according to the conversion of the correction parameters and transmits the corresponding weighting coefficients to the normalization calculation module.

The input control and data distribution module is connected with the image cache module, and after receiving the data ready signal from the image cache module, it generates a logic reset signal for the rest of the non-uniformity correction module, and then controls the image cache module in the order of columns each time Output a column of images to the histogram statistics module, and count the number of output columns at the same time. When all the data required for calculating the normalized pixels of a column of images have been obtained, the control image buffering module outputs the secondary cached image data of the column to the cumulative histogram processing module.

The histogram statistics module is connected with the input control and data distribution module, and performs histogram statistics on the image column data output by the input control and data distribution module. The histogram statistical module uses the internal DPRAM to count the histogram of each column of images in real time, and at the same time transmits the histogram information of the previous column of images to the cumulative histogram processing module. The histogram statistics module divides the internal DPRAM storage area into two parts and operates in a ping-pong manner: while using area A to count the histogram of the current image column, the histogram of the previous column image cached in area B is output to the cumulative histogram image processing module.

The cumulative histogram processing module is connected with the histogram statistical module and the input control and data distribution module, calculates the cumulative histogram of the column image according to the histogram information of each column image and uses the on-chip DPRAM to cache, and simultaneously generates the calculation cumulative histogram The tag information required by the inverse histogram is passed to the tag value forwarding module, and the corresponding index value is read from the DPRAM cache area corresponding to the column of the image data index passed by the input control and data distribution module and passed to the index value forwarding module.

The marker value forwarding module is connected with the cumulative histogram processing module, and caches the marker information of the cumulative histogram of each column of images through the internal FIFO and forwards it to the corresponding inverse histogram calculation module in the inverse histogram calculation module group that needs to be updated. Because the update speed of the inverse histogram calculation module is slower than that of the cumulative histogram processing module, the tag value forwarding module contains two FIFOs to ensure that two inverse histogram calculation modules can be updated at the same time.

The index value forwarding module is connected with the cumulative histogram processing module, and forwards the index value obtained from the corresponding column image to the inverse histogram calculation module group.

The inverse histogram calculation module group is connected with the tag value forwarding module, the index value forwarding module and the parallel control module. It contains a plurality of inverse histogram calculation modules. The control module controls switching. When in the refresh state, complete the calculation of the inverse histogram and update the internal DPRAM of the module through the tag value passed by the tag value forwarding module. The specific method is: first read a tag value and fill the gray value in the memory with its height value In the corresponding address, fill the blank part between the two addresses with the gray value; when in the output state, index the internal DPRAM of the module according to the index value forwarded by the index value forwarding module and forward the corresponding data to the standardized calculation module . In the embodiment of the present invention, the number of modules included in the inverse histogram calculation module group is determined by the size of the calculation window, and the corresponding relationship is: when the window size is 2×N+1, 2×N+4 inverse The histogram calculation module performs processing in parallel.

The parallel control module is connected with the inverse histogram calculation module group, sends a refresh start signal to the inverse histogram calculation module, controls each individual module in the inverse histogram calculation module group to switch to the refresh state when it needs to be refreshed, and refreshes Switch to output state when finished.

The normalized calculation module is connected with the inverse histogram calculation module group and the parameter calculation module, and the weighting coefficient is updated through the parameter calculation module. There is a multiplier at the input interface of each inverse histogram calculation module, and the output result of the inverse histogram calculation module is multiplied by the corresponding weighting coefficient, and the multiplied results are added to obtain the normalized pixel value, which is the image correction result, and Pass the result to the data output module.

The data output module uses off-chip DPRAM to buffer the corrected image, provides an EMIF interface for DSP, and can output the result to DSP for subsequent processing, and uses the VGA interface to realize the external test interface.

Fig. 2 shows the flow chart of the infrared focal plane array stripe non-uniformity correction method based on FPGA of the present invention, specifically comprises the following steps:

Step 1 calculates the weighting coefficient ψ _σ (k).

The formula for calculating the weighting coefficient ψ _σ (k) is as follows: in, Among them, σ represents the standard deviation; k represents the serial number of the weighting coefficient, and the values are 1, 2, ..., 2N+1 (assuming that the calculation window size is 2N+1). In order to save hardware resources occupied by the system, the hardware system does not directly set the standard deviation σ to calculate the weighting coefficient, but sets several files, and each file calculates the weighting coefficient ψ _σ (k) by software in advance and then stores it in the on-chip ROM for calling. In the embodiment of the present invention, the binning method is as follows: First, determine the maximum calculation window size (2P+1) and the minimum calculation window size (2Q+1) according to the format and characteristics of the imager (note that it needs to be an odd number). For each window of (2N+1)(Q≤N≤P), define the non-uniformity coefficient Take ψ _σ (k)(k∈[1,2N+1]) when Λ is 0.5, 0.4, 0.3, 0.2 and 0.1 respectively as weighting coefficients, where all weighting coefficients are enlarged by 256 times (i.e. shifted to the left by 8 bits ). It should be noted that there are actually (2P+1) weighting coefficients for each file. For the case of N<P, the coefficient of the xth item is mapped to the x+PNth item, and the coefficient of the number of empty items is 0. When each frame of image processing starts, first check whether the host computer sends a parameter change command, if not, then judge whether the current frame is the first frame, if it is the first frame, use the default parameters, if not the first frame, then The parameters are not updated; if the host computer sends a parameter change command, it will parse out the new parameters and update them. Then map the parameters to the corresponding storage space in the coefficient ROM, read out the corresponding weighting coefficient ψ _σ (k) and update it to the normalization calculation module.

Step 2 caches the raw input infrared image.

Because the image input is input in the order of rows, and the subsequent processing of the present invention requires the output of images in the order of columns, the original image needs to be cached, and the processing is not performed until a complete frame of the image is cached.

Step 3 The edge mirroring of the original image is extended.

In the subsequent processing process, there is an operation between the current column image and the adjacent column image, but for the pixels at the edge, there is no corresponding adjacent column data for processing, so it is necessary to perform special processing on the boundary of the original image in the row direction. The present invention This problem is solved by mirroring the edges of the original image. The mirror image expansion of the image is realized by adjusting the mapping relationship between the output column and the output image address. Assuming that the starting address of the input image buffer space is 0, the number of image columns is L, and the calculation window size is 2x+1, then when the nth column image is output The first address m of is:

When outputting the next pixel of the current column, the address is offset by the address space of one column of pixels.

Step 4 calculates the histogram I _{j of the current image column C j .}

The on-chip DPRAM is used to perform histogram statistics on the current column image C _j by mapping the DPRAM address with the pixel gray value to obtain the histogram I _j . The specific details of the histogram statistics are common knowledge of those skilled in the art, and will not be described in detail here.

Step 5 calculates the cumulative histogram H _{j of the current image column C j .}

In order to save processing time, the present invention parallelizes the cumulative histogram H _j of the current image column and the inverse histogram of the cumulative histogram Therefore, it is necessary to generate information for calculating the inverse histogram while calculating the current cumulative histogram, which specifically includes the following sub-steps:

(5-1) Read the height value corresponding to the gray value of the histogram, and the gray value is 0 in the initial state;

(5-2) For the height value obtained by each grayscale value, add the height value to the cumulative height value (0 in the initial state) to obtain a new cumulative height value, and write the new cumulative height value into DPRAM Update the cumulative histogram with the address corresponding to the current gray level;

(5-3) If the height value is 0, then perform step (5-5), otherwise the new cumulative height value and the current gray value are passed down to the tag value forwarding module as the tag value;

(5-4) If the current height value is 1, then fill in 0 for the filling flag of the mark value, otherwise fill in 1;

(5-5) If the maximum gray value is reached, then end, otherwise, add 1 to the gray value, and then execute step (5-1).

Step 6 Calculate the inverse histogram of the cumulative histogram of the current image column C _j Specifically include the following sub-steps:

(6-1) When there is new marked data, read out the marked value data from the marked value forwarding FIFO, and fill in the gray value part data content in the address corresponding to the cumulative height value;

(6-2) If the filling flag is 0, then perform step (6-3), otherwise fill in the current gray value in the corresponding address area between the current cumulative height value and the previous cumulative height value received;

(6-3) If the maximum altitude has been reached, then end; otherwise, continue to execute step (6-1).

Step 7 calculates the index value H _j (X _i,j ).

After the inverse histogram statistical module calculates the inverse histograms of all adjacent columns needed to correct a certain column of images, the second cached image pixels X _i,j of the column are input, and in the corresponding column area of the cached cumulative histogram as The gray value of this pixel is the index value H _j (X _i,j ) obtained from the address lookup cumulative histogram.

Step 8 Calculate the values of the pixels X _{i and j} in the image column to be corrected after being normalized to the histogram of the adjacent column

Each inverse histogram statistical module in the output state uses the index value H _j (X _i,j ) as the address index to store its own inverse histogram in DPRAM, and obtains the image pixels X _{i, j} of the target column after being normalized to the histogram of the corresponding column pixel value of

Step 9 will normalize to the values after adjacent column histogram Weighted average to get the final correction result

When the window size is 2×N+1, a total of 2×N+4 data output interfaces of the inverse histogram statistical module are connected to the normalized calculation module, of which only 2×N+1 interfaces are connected at the same time Input is valid input. There is a multiplier at each input interface of the normalized calculation module, and the output result of each column Multiply by the corresponding weighting coefficient ψ _σ (k). The corresponding weighting coefficients are stored in registers. There are a total of 2×N+4 registers, and the coefficients corresponding to 3 invalid input interfaces in the updating state are zero, which ensures that the calculation results will not be disturbed by invalid data. The present invention realizes the sliding of the calculation window by cyclically assigning and updating the weighting coefficient register. Figure 3 shows a schematic diagram of updating the weighting coefficient register of the standardized calculation module of the present invention. The upper part of the figure shows the calculation of the normalized pixel value of the image in the N+1th column In the case of , the calculation window is the 1st column to the 2N+1 column of the image, corresponding to numbers 1 to 2N+1 in the inverse histogram calculation module, and the value in the weighting coefficient register that it is multiplied by just corresponds to ψ _σ (1 ) to ψ _σ (2N+1). The lower part of the figure shows the situation when calculating the normalized pixel value of the N+2th column image. The calculation window is from the 2nd column to the 2N+2th column of the image, corresponding to 2 to 2N+ in the inverse histogram calculation module No. 2, at this time, the weighting coefficient register performs cyclic assignment, the value of No. 1 is assigned to No. 2, No. 2 is assigned to No. 3, and so on, the value of No. 2N+4 is assigned to No. 1, so The value in the weighting coefficient register that is multiplied by the inverse histogram calculation module corresponds exactly to ψ _σ (1) to ψ _σ (2N+1). Because the weighting coefficient is magnified by 256 times, after adding all the products, the result needs to be shifted to the right by 8 bits to get the final correction result

Step 10 Repeat steps 4 to 9 until all columns of the image are processed.

In step 11, the correction result is output. The corrected image data is cached and output to the DSP through the EMIF interface for subsequent algorithm processing, and the corrected image is displayed on the monitor through the VGA interface for testing. This type of logic is common knowledge of those skilled in the art, and will not be described in detail here.

Fig. 4 is a schematic diagram showing the comparison between the original infrared image of the present invention, the infrared image artificially added with striped non-uniformity, and the processed image of the present invention. Fig. 4 (a) is the original infrared image without striped non-uniformity; Fig. 4 (b) is the image that artificially adds striped non-uniformity; Fig. 4 (c) is the processing result that the present invention obtains, can Seeing that the banding non-uniformity is well corrected and the image has no obvious distortion, the visual effect has been significantly improved.

It is easy for those skilled in the art to understand that the above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention, All should be included within the protection scope of the present invention.

Claims (10)

1. an infrared focal plane array striped non-uniformity correction system based on FPGA, is characterized in that, comprises image cache module, parameter calculation module, non-uniformity correction module and data output module, wherein: The image caching module is used to cache the externally input infrared image, and output data of the image to the non-uniformity correction module in columns after one frame of image is cached; The parameter calculation module is used to receive and analyze the input external instructions to obtain correction parameters, and convert the weight coefficients according to the correction parameters to the non-uniformity correction module; The non-uniformity correction module includes: The input control and data distribution module is used to control the image cache module to output a column of images to the histogram statistics module at a time, and count the number of columns that have been output at the same time, when all the data required to calculate the normalized pixels of a certain column of images have been obtained. , controlling the image caching module to output the column of image data after secondary caching to the cumulative histogram processing module; The histogram statistics module is used to perform histogram statistics on the image column data output by the input control and data distribution module, and at the same time pass the histogram information of the previous column image to the cumulative histogram processing module; The cumulative histogram processing module is used to calculate and cache the cumulative histogram of the column of images according to the histogram information of each column of images, and simultaneously generate the tag value needed to calculate the inverse histogram of the cumulative histogram and pass it to the tag The value forwarding module, and the index value of the column corresponding to the image data index passed by the input control and data distribution module is passed to the index value forwarding module; The tag value forwarding module is configured to cache the tag value and forward it to the inverse histogram calculation module group; The index value forwarding module is configured to forward the index value to the inverse histogram calculation module group; The inverse histogram calculation module group includes a plurality of inverse histogram calculation modules, which are used to complete the calculation of the inverse histogram through the tag value and update the internal DPRAM of the module, and then perform the internal DPRAM on the internal DPRAM of the module according to the index value Index, and forward the corresponding data to the normalized calculation module; A parallel control module, configured to control each inverse histogram calculation module in the inverse histogram calculation module group to complete the calculation, update and corresponding data forwarding of the inverse histogram; and The normalization calculation module is used to update the weighting coefficient through the parameter calculation module, and multiply the output result of the inverse histogram calculation module group by the corresponding weighting coefficient, and obtain the image correction result after adding the multiplied results, and delivering the image correction result to the data output module; and The data output module is used for buffering and outputting corrected images. 2. the infrared focal plane array stripe non-uniformity correction system based on FPGA as claimed in claim 1, is characterized in that, described image cache module utilizes the infrared image of external image cache DPRAM cache described external input, and The storage area of the external DPRAM is divided into two parts, which are operated in a ping-pong manner. 3. the infrared focal plane array stripe non-uniformity correction system based on FPGA as claimed in claim 1 or 2, is characterized in that, described weighting coefficient calculates in advance and is stored in the on-chip ROM, and described parameter calculation module according to The correction parameter is converted to obtain a corresponding address, and a corresponding weighting coefficient is obtained from the on-chip ROM according to the corresponding address and sent to the normalization calculation module. 4. the infrared focal plane array stripe non-uniformity correction system based on FPGA as claimed in claim 1, is characterized in that, each inverse histogram calculation module in the described inverse histogram calculation module group has refreshing and output The two states are switched under the control of the parallel control module. When in the refresh state, first read a tag value and fill the gray value in the address corresponding to the height value in the memory. Fill the blank part with the gray value; when in the output state, index the internal DPRAM of the module according to the index value, and forward the corresponding data to the normalized calculation module. 5. the infrared focal plane array stripe non-uniformity correction system based on FPGA as claimed in claim 4, is characterized in that, described parallel control module sends refresh start signal to described inverse histogram calculation module group, controls Each inverse histogram calculation module in the inverse histogram calculation module group switches to the refresh state when refresh is required, and switches to the output state when refresh is completed. 6. A strip-shaped non-uniformity correction method based on FPGA, characterized in that, comprising: Step 1 Calculate the weighting coefficient in, σ indicates the standard deviation; k indicates the serial number of the weighting coefficient, the value is 1, 2, ..., 2N+1, 2N+1 is the calculation window size; Step 2 caches the original input infrared image; Step 3. Mirroring and expanding the edge of the original input infrared image, adjusting the mapping relationship between the output column and the output image address, setting the initial address of the infrared image buffer space of the original input to be 0, the number of image columns to be L, and the calculation window The size is 2x+1, then the first address m when outputting the nth column image is: <mrow><mi>m</mi><mo>=</mo><mfenced open = "{" close = ""><mtable><mtr><mtd><mrow><mi>x</mi><mo>-</mo><mi>n</mi></mrow></mtd><mtd><mrow><mo>(</mo><mi>n</mi><mo>&amp;le;</mo><mi>x</mi><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><mi>n</mi><mo>-</mo><mi>x</mi><mo>-</mo><mn>1</mn></mrow></mtd><mtd><mrow><mo>(</mo><mi>x</mi><mo>&lt;</mo><mi>n</mi><mo>&amp;le;</mo><mo>(</mo><mrow><mi>L</mi><mo>+</mo><mi>x</mi></mrow><mo>)</mo><mo>)</mo></mrow></mtd></mtr><mtr><mtd><mrow><mn>2</mn><mo>&amp;times;</mo><mi>L</mi><mo>+</mo><mi>x</mi><mo>-</mo><mi>n</mi></mrow></mtd><mtd><mrow><mo>(</mo><mo>(</mo><mrow><mi>L</mi><mo>+</mo><mi>x</mi></mrow><mo>)</mo><mo>&lt;</mo><mi>n</mi><mo>&amp;le;</mo><mo>(</mo><mrow><mi>L</mi><mo>+</mo><mn>2</mn><mo>&amp;times;</mo><mi>x</mi></mrow><mo>)</mo><mo>)</mo></mrow></mtd></mtr></mtable></mfenced></mrow> When outputting the next pixel of the current column, the address is offset by the address space of one column of pixels; Step 4 performs histogram statistics on the current column image C _j to obtain the histogram I _j ; Step 5 calculates the cumulative histogram H _{j of the current image column C j ;} Step 6 Calculate the inverse histogram of the cumulative histogram of the current image column C _j Step 7 When the inverse histograms of all columns in the image correction calculation window of a certain column have been calculated, input the image pixel X _{i, j} of the column cached twice, and use this pixel in the corresponding column area of the cached cumulative histogram The gray value is the index value H _j (X _i,j ) obtained from the cumulative histogram of the address lookup; Step 8 Use the index value H _j (X _i,j ) as the address index to obtain the pixel values of the image pixels X _{i, j} of the target column after normalization to the histogram of the corresponding column respectively Step 9 Normalize each column of image to the pixel value after adjacent column histogram Multiply by the corresponding weighting coefficient ψ _σ (k), and add the multiplied results to get the image correction result Step 10 repeats the steps 4 to 9 until the processing of all columns of the original input infrared image is completed; Step 11 caches and outputs the corrected image data. 7. The method according to claim 6, wherein in said step 1, the maximum calculation window size 2P+1 and the minimum calculation window size 2Q+1 are determined according to the format and characteristics of the imager, for the size is 2N Each window of +1, where, Q≤N≤P, defines the non-uniformity coefficient Take ψ _σ (k) when Λ is 0.5, 0.4, 0.3, 0.2 and 0.1 respectively as the weighting coefficient, where k∈[1,2N+1]. 8. The method according to claim 6, wherein in said step 5, it is necessary to generate information for calculating an inverse histogram while calculating the cumulative histogram of the current image column _Cj , comprising the following substeps : (5-1) Read the height value corresponding to the gray value of the histogram, and the gray value is 0 in the initial state; (5-2) For the height value obtained for each grayscale value, add the height value to the cumulative height value to obtain a new cumulative height value, and write the new cumulative height value into the address corresponding to the current grayscale value for update Cumulative histogram; (5-3) If the height value is 0, then perform step (5-5), otherwise the new cumulative height value and the current gray value are used as the tag value; (5-4) If the current height value is 1, then fill in 0 for the filling flag of the mark value, otherwise fill in 1; (5-5) If the maximum gray value is reached, then end, otherwise the gray value is increased by 1, and then the steps to (5-1) are executed. 9. The method according to claim 8, wherein said step 6 comprises the following sub-steps: (6-1) When there is a new mark value, read out the new mark value, and fill in the gray value part data content in the address corresponding to the cumulative height value; (6-2) If the filling flag is 0, then perform step (6-3), otherwise fill in the current gray value in the corresponding address area between the current cumulative height value and the previous cumulative height value received; (6-3) If the maximum altitude has been reached, then end; otherwise, continue to execute step (6-1). 10. The method according to any one of claims 6-9, characterized in that, in the step 9, when the window size is 2×N+1, there are 2×N+4 inverse Histogram statistical data output, of which only 2×N+1 inputs are valid inputs at the same time, and the weighting coefficients corresponding to the remaining 3 invalid inputs are zero, and the sliding of the calculation window is realized by cyclic assignment of weighting coefficient registers.