CN104767488B - Frequency doubling device based on crystal oscillator circuit - Google Patents

Abstract

The invention discloses a frequency multiplication device based on a crystal oscillator circuit. In addition to the structure of the existing crystal oscillator circuit, the frequency multiplication device also includes inductance and capacitance capable of realizing frequency selection, and can realize frequency multiplication effect A cascaded circuit of multiple transistors. The frequency multiplier can obtain the frequency output of any multiple of the crystal fundamental frequency by adding appropriate active devices, capacitors and inductances in the crystal oscillator circuit, and the high-frequency time base signal output by the frequency multiplier or The phase noise of the reference clock signal is basically the same as that of the base frequency crystal oscillator, which can meet the requirements of the high-performance system on the phase noise of the time base signal or reference clock signal.

Description

A Frequency Multiplication Device Based on Crystal Oscillator Circuit

technical field

The invention relates to the field of oscillator circuits, more specifically, to a frequency multiplication device based on a crystal oscillator circuit.

Background technique

Oscillator circuits can generate a stable time base or reference clock signal for local oscillator signal generation or system clock in communications. Figure 1 is a circuit structure diagram of a general integrated crystal oscillator, as shown in Figure 1, which includes a P-type transistor M1, an N-type transistor M2, load capacitors C1 and C2, a resistor R0 and a crystal, and the two ends of the crystal are respectively X1 and X2. Its working principle is: the transistor circuit composed of N-type transistor M2 and P-type transistor M1 forms an amplifier through the feedback of resistor R0, and provides the loop composed of active circuit and crystal to meet the gain requirements required by crystal oscillation, that is, Oscillation provides energy, while load capacitors C1 and C2 meet the phase requirements required for crystal oscillation by shifting the phase. Wherein, the connection mode of the N-type transistor M2 and the P-type transistor M1 in the transistor circuit is: the source terminal and the substrate of the P-type transistor M1 are connected to the power supply voltage, the gate terminal is connected to the X1 terminal of the crystal, and the drain terminal is connected to the X2 terminal of the crystal; The source terminal of the N-type transistor M2 is connected to the substrate, the gate terminal is connected to the X1 terminal of the crystal, and the drain terminal is connected to the X2 terminal of the crystal.

The crystal oscillator circuit shown in Figure 1 can only generate the fundamental oscillation signal determined by the characteristics of the crystal itself, and usually can only generate the time base signal or reference clock signal of about 50MHz or below. However, in optical communication and high-speed communication, in order to ensure better communication performance, a time base signal or a reference clock signal with a higher frequency (for example, above 100 MHz) is often required. Due to the high cost of the high-frequency fundamental frequency crystal itself, in the prior art, in order to obtain a higher-frequency reference clock or time-base signal, frequency synthesis is usually used. However, the high-frequency The phase noise of the time base signal or the reference clock signal is relatively large, which cannot meet the requirements of the high performance system for the time base signal or the reference clock signal.

Contents of the invention

In view of this, the present invention provides a frequency multiplication device based on a crystal oscillator circuit to overcome the acquired high-frequency time base signal or reference The problem of high phase noise of the clock signal.

To achieve the above object, the present invention provides the following technical solutions:

A frequency multiplication device based on a crystal oscillator circuit, comprising a crystal, a first resistor, a first capacitor, a second capacitor, a third capacitor, a first inductor and K cascaded transistor circuits; K is a positive value not less than 2 integer;

Wherein, the first end of the first resistor is connected to the first end of the crystal, and the second end is connected to the second end of the crystal; the first end of the first capacitor is connected to the first end of the crystal, and the second end is grounded; The first end of the second capacitor is connected to the second end of the crystal, and the second end is grounded; the first end of the first inductor is connected to the power supply voltage, and the second end is connected to the output end of the frequency multiplier; the third The first end of the capacitor is connected to the power supply voltage, and the second end is connected to the output end of the frequency multiplier; the output end of the frequency multiplier is the Kth transistor circuit with the longest distance from the crystal line, and the P-type transistor The end of the line to which the source is connected;

The transistor circuit includes: a P-type transistor and an N-type transistor; the gate terminals of the P-type transistor and the N-type transistor are connected to the first terminal of the crystal, and the drain terminal is connected to the second terminal of the crystal;

In the active case, each transistor circuit forms an amplifier through the feedback of the first resistor, and K cascaded transistor circuits are about to cascade K groups of amplifiers to realize signal mixing operations and obtain K multiplied signals, so The K-multiplied signal is output through the output terminal of the frequency multiplier.

Optionally, in the first transistor circuit of the K cascaded transistor circuits that is the shortest distance from the crystal line, the source terminal of the P-type transistor is connected to N in the second transistor circuit adjacent to the first transistor circuit. The source terminal of the N-type transistor of the first transistor circuit is grounded.

Optionally, in the Kth transistor circuit that is the longest from the crystal line among the K cascaded transistor circuits, the connection line of the source terminal of the P-type transistor is the output terminal after K times multiplied by the frequency multiplier device The source terminal of the N-type transistor is connected to the source terminal of the P-type transistor in the K-1th transistor circuit adjacent to the Kth transistor circuit.

Optionally, in the K cascaded transistor circuits, the substrates of all N-type transistors are grounded or connected to a low voltage.

Optionally, in the K cascaded transistor circuits, the substrates of all the P-type transistors are connected to the source terminals of the N-type transistors or to a high voltage.

Optionally, among the K cascaded transistor circuits, except for the Kth transistor circuit with the longest distance from the crystal line, the source terminal of the P-type transistor in any transistor circuit L is connected to the L+1th transistor circuit The source terminal of the N-type transistor of the circuit.

Optionally, the first resistor is an adjustable resistor; the first capacitor, the second capacitor, and the third capacitor are adjustable capacitors; and the first inductance is an adjustable inductor.

It can be seen from the above technical solutions that, compared with the prior art, the embodiment of the present invention discloses a frequency multiplication device based on a crystal oscillator circuit. In addition to the structure of the existing crystal oscillator circuit, the frequency multiplication device also has It includes inductance and capacitance that can realize frequency selection, and cascaded multiple transistor circuits that can realize frequency doubling effect. The frequency multiplier can obtain the frequency output of any multiple of the fundamental frequency of the crystal by adding appropriate active devices, capacitors, and inductances to the crystal oscillator circuit, and the high-frequency time base signal output by the frequency multiplier or The phase noise of the reference clock signal is basically the same as that of the base frequency crystal oscillator, which can meet the requirements of the high-performance system on the phase noise of the time base signal or reference clock signal.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention, and those skilled in the art can also obtain other drawings according to the provided drawings without creative work.

Fig. 1 is a kind of general integrated crystal oscillator circuit structural diagram;

FIG. 2 is a circuit structure diagram of a frequency multiplication device based on a crystal oscillator circuit disclosed in an embodiment of the present invention;

FIG. 3 is a schematic structural diagram of a triple frequency multiplication device disclosed in an embodiment of the present invention;

Fig. 4 is a signal transient effect diagram of the crystal oscillator frequency multiplication circuit of the 3 frequency multiplication device shown in Fig. 3;

Fig. 5 is a partial enlarged effect diagram of the signal in Fig. 4;

FIG. 6 is a phase noise effect diagram of the crystal oscillator circuit in the triple frequency multiplication device shown in FIG. 3 .

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

Fig. 2 is a circuit structure diagram of a frequency multiplication device based on a crystal oscillator circuit disclosed in an embodiment of the present invention. Referring to Fig. 2, the frequency multiplication device may include: a crystal X, a first resistor R1, a first capacitor C1, a first The second capacitor C2, the third capacitor C3, the first inductor L1 and K cascaded transistor circuits M.

Wherein, the K is a positive integer not less than 2.

Wherein, the first terminal of the first resistor R1 is connected to the first terminal X1 of the crystal, and the second terminal is connected to the second terminal X2 of the crystal; the first terminal of the first capacitor C1 is connected to the first terminal X1 of the crystal, and the second terminal of the capacitor C1 is connected to the first terminal X1 of the crystal. Both terminals are grounded; the first terminal of the second capacitor C2 is connected to the second terminal X2 of the crystal, and the second terminal is grounded; the first terminal of the first inductor L1 is connected to the power supply voltage VDD, and the second terminal is connected to the frequency multiplier The output terminal Krd of the device; the first terminal of the third capacitor C3 is connected to the power supply voltage VDD, and the second terminal is connected to the output terminal Krd of the frequency multiplication device. The output end of the frequency multiplier is the line end connected to the far end of the P-type transistor in the Kth transistor circuit with the longest distance from the crystal line.

The transistor circuit M includes a P-type transistor and an N-type transistor, the gate terminals of the P-type transistor and the N-type transistor are connected to the first terminal of the crystal, and the drain terminals are connected to the second terminal of the crystal.

In the active case, each transistor circuit forms an amplifier through the feedback of the first resistor, and K cascaded transistor circuits are about to cascade K groups of amplifiers to realize signal mixing operations and obtain K multiplied signals, so The K-multiplied signal is output through the output terminal of the frequency multiplier.

In order to facilitate the understanding of the frequency multiplication device based on the crystal oscillator circuit disclosed in the embodiment of the present invention, the frequency multiplication device including three cascaded transistor circuits M is taken as an example below for introduction. FIG. 3 is a schematic structural diagram of a triple frequency multiplication device disclosed in an embodiment of the present invention. Referring to FIG. 3, the frequency multiplication device shown in FIG. 3 consists of N-type transistors M1, M3 and M5, P-type transistors M2, M4 and M6, Inductor L1, resistor R1, capacitors C1, C2 and C3 and crystal. For clarity of illustration, the substrate connections of the N-type transistors M5 and M3 are omitted, and they are both connected to the ground (GND). Their connection relationship is as follows: one end of the inductor Lx is connected to the power supply voltage (VDD), and the other end is connected to the output terminal 3rd after three times of frequency multiplication; one end of the capacitor C3 is connected to the power supply voltage (VDD), and the other end is connected to the output terminal after three times of frequency multiplication. The output terminal 3rd; the source terminal and the substrate of the P-type transistor M6 are connected to the output terminal 3rd, the gate terminal is connected to the X1 terminal of the crystal, and the drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st); the N-type transistor M5 The source terminal of the P-type transistor M4 is connected to the source terminal and the substrate, the substrate is connected to the ground (GND), the gate terminal is connected to the X1 terminal of the crystal, and the drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st) The source terminal of the P-type transistor M4 and the substrate are connected to the source terminal of the N-type transistor M5, its gate terminal is connected to the X1 terminal of the crystal, and its drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st); the N-type transistor The source terminal of M3 is connected to the source terminal and the substrate of the P-type transistor M2, its substrate is connected to ground (GND), its gate terminal is connected to the X1 terminal of the crystal, and its drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st ); the source terminal of the P-type transistor M2 and the substrate are connected to the source terminal of the N-type transistor M3, its gate terminal is connected to the X1 terminal of the crystal, and its drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st); N-type The source terminal of the transistor M1 is connected to the ground (GND), its gate terminal is connected to the X1 terminal of the crystal, and its drain terminal is connected to the X2 terminal of the crystal (that is, the base frequency output terminal 1st); one end of the resistor R1 is connected to the X1 terminal of the crystal , the other end of which is connected to the X2 end of the crystal (that is, the base frequency output end 1st); one end of the capacitor C1 is connected to the X1 end of the crystal, and the other end is grounded (GND); one end of the capacitor C2 is connected to the X2 end of the crystal (that is, the base frequency output end 1st); frequency output terminal 1st), and the other terminal is grounded (GND); the two ends of the crystal are respectively connected to the X1 terminal and the X2 terminal.

The working principle of the crystal oscillator frequency multiplication circuit of the 3 frequency multiplication device shown in Figure 3 is as follows: Capacitors C1 and C2 provide phase compensation for the crystal oscillation circuit, while M1 and M2, M3 and M4, M5 and M6 form three transistor circuits M , provide bias through the resistor R1 to realize three gain amplifiers, and then realize a crystal oscillator circuit. Since the three sets of gain amplifiers are cascaded (as shown in the three transistor circuits M in Figure 3), it is equivalent to performing a frequency mixing operation on the signal. Since there are three sets of the same transistor circuits M, and the input and output connections of the three sets of transistor circuits M are the same , In fact, the triple frequency of the signal is realized. The 3 times frequency signal is selected through L1 and C3 and output through the 3rd terminal.

Therefore, it can be determined that in the first transistor circuit of the K cascaded transistor circuits that is the shortest to the crystal line, the source terminal of the P-type transistor is connected to the second transistor circuit adjacent to the first transistor circuit The source terminal of the N-type transistor in the first transistor circuit; the source terminal of the N-type transistor in the first transistor circuit is grounded.

Among the K cascaded transistor circuits M, the Kth transistor circuit M with the longest distance from the crystal line, the connection line of the source end of the P-type transistor is the output end of the frequency multiplier after K times of frequency multiplication; N The source terminal of the P-type transistor is connected to the source terminal of the P-type transistor in the K-1th transistor circuit M adjacent to the K-th transistor circuit M.

In the K cascaded transistor circuits M, the substrates of all N-type transistors are grounded or connected to a low voltage.

In the K cascaded transistor circuits, the substrates of all the P-type transistors are connected to the source terminals of the N-type transistors or to a high voltage. The substrates of different P-type transistors can be connected to the source terminals of different N-type transistors. For example, for clear lines, among K cascaded transistor circuits, the P-type transistor circuit in the Kth transistor circuit that is the longest from the crystal line The substrate of the transistor is directly connected to the power supply, and the substrate of the P-type transistor in any other transistor circuit is connected to the source terminal of its adjacent N-type transistor whose circuit is far away from the crystal.

Among the K cascaded transistor circuits M, except for the Kth transistor circuit M with the longest distance from the crystal line, the source terminal of the P-type transistor in any other transistor circuit L is connected to the substrate, and connected to The source terminal of the N-type transistor in the L+1th transistor circuit M adjacent thereto.

It should be noted that in Fig. 3, the frequency multiplication device is only taken as an example. In practical applications, any frequency multiplication device can be designed according to the needs. If you want to obtain the frequency of several times, the frequency multiplication device includes Several transistor circuits M. However, considering the actual circuit technology, the difference in power supply voltage and device parameter characteristics, when realizing the frequency output of a certain frequency multiplication value, it is necessary to adjust the N-type transistor, P-type transistor, resistance, inductance, and capacitance in the frequency multiplication device. Reasonably set and optimize the value of power supply voltage.

Therefore, in the frequency doubling device disclosed in the embodiment of the present invention, the first resistor can be an adjustable resistor; the first capacitor, the second capacitor, and the third capacitor can be adjustable capacitors; the first inductance can be Adjustable inductance.

The adjustment of C3 and L1 can adopt discrete digital control mode or continuous analog control mode; for power supply voltage, parameters of active devices (such as aspect ratio of N-type transistor and P-type transistor), resistor R1, capacitor C1 The adjustment of the resistor C2 can be realized through the collection of circuit performance index parameters, through feedback control, or through off-chip control in a discrete manner.

FIG. 4 is a transient effect diagram of the crystal oscillator frequency multiplication circuit of the triple frequency multiplication device shown in FIG. 3 , and FIG. 5 is a partial enlarged effect diagram of the signal in FIG. 4 . At this moment, the crystal described in Fig. 3 is a 40MHz crystal. In Fig. 4 and Fig. 5, the horizontal axis is the time axis, and the unit is millisecond (ms), and the vertical axis is voltage, and the unit is volt (V), and the upper part is The output waveform of the base frequency signal 1st (signal of 40MHz), the lower part is the output waveform of the triple frequency signal 3rd (signal of 40*3=120MHz). It can be understood from FIG. 5 that the frequency multiplication device disclosed in the embodiment of the present invention can realize relatively accurate triple frequency multiplication. Similarly, based on the technical idea of the present invention, any frequency multiplication result satisfying a certain accuracy can be realized.

FIG. 6 is a phase noise effect diagram of the crystal oscillator circuit in the triple frequency multiplication device shown in FIG. 3 . The phase noise performance of general-purpose crystal oscillators on the market, such as the phase noise performance in the case of 40MHz fundamental frequency, is as follows: -140dBc/Hz@1kHz, -152dBc/Hz@100kHz. Comparing the phase noise data in FIG. 6, it can be seen that the phase noise performance of the triple frequency signal (40×3=120MHz signal) realized by the embodiment of the present invention has reached the phase noise performance of the common fundamental frequency (40MHz signal) crystal oscillator on the market.

In this embodiment, in addition to the structure of the existing crystal oscillator circuit, the frequency multiplication device also includes an inductor and a capacitor that can realize frequency selection, and a plurality of cascaded transistor circuits M that can realize the frequency multiplication effect. The frequency multiplier can obtain the frequency output of any multiple of the fundamental frequency of the crystal by adding appropriate active devices, capacitors, and inductances to the crystal oscillator circuit, and the high-frequency time base signal output by the frequency multiplier or The phase noise of the reference clock signal is basically the same as that of the base frequency crystal oscillator, which can meet the requirements of the high-performance system on the phase noise of the time base signal or reference clock signal.

It should also be noted that in this article, relational terms such as first and second etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that these entities or operations Any such actual relationship or order exists between. Moreover, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that an article or device comprising a set of elements includes not only those elements but also other elements not expressly listed, Or also include elements inherent in the article or device. Without further limitations, an element defined by the phrase "comprising a" does not exclude the presence of additional identical elements in the article or device comprising said element.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (7)

1. A kind of 1. frequency doubling device based on crystal-oscillator circuit, it is characterised in that including crystal, first resistor, the first electric capacity, Second electric capacity, the 3rd electric capacity, the first inductance and the transistor circuit of K cascade；K is the positive integer not less than 2；

   Wherein, the first end of the first end connection crystal of the first resistor, the second end connects the second end of crystal；Described first The first end of the first end connection crystal of electric capacity, the second end ground connection；Second end of the first end connection crystal of second electric capacity, Second end is grounded；The first end connection supply voltage of first inductance, the second end connects the output end of the frequency doubling device；Institute The first end connection supply voltage of the 3rd electric capacity is stated, the second end connects the output end of the frequency doubling device；The frequency doubling device Output end is the line end that is connected with the source of P-type transistor in K transistor circuits；

   The transistor circuit includes：P-type transistor and N-type transistor；The grid end of the P-type transistor and N-type transistor with The first end connection of the crystal, drain terminal are connected with the second end of the crystal；

   In the case of active, each transistor circuit forms amplifier by the feedback of the first resistor, and K cascades Transistor circuit cascades K groups amplifier, realizes the mixing operations of signal, obtains K frequency-doubled signals, the K frequency-doubled signals lead to Cross the output end output of the frequency doubling device.
2. 2. frequency doubling device according to claim 1, it is characterised in that first in the transistor circuit of the K cascade In transistor circuit, the source of P-type transistor connects N-type in the second transistor circuit adjacent with the first transistor circuit The source of transistor；The source ground connection of the N-type transistor of the first transistor circuit.
3. 3. frequency doubling device according to claim 1, it is characterised in that the K in the transistor circuit of the K cascade is brilliant In body pipe circuit, the connecting line of the source of P-type transistor is the output end after described K frequency multiplication of frequency doubling device；N-type transistor Source connects the source of P-type transistor in the K-1 transistor circuits adjacent with the K transistor circuits.
4. 4. frequency doubling device according to claim 1, it is characterised in that all in the transistor circuit of the K cascade The Substrate ground of N-type transistor connects low-voltage.
5. 5. frequency doubling device according to claim 1, it is characterised in that all in the transistor circuit of the K cascade The substrate of P-type transistor connects the source of N-type transistor or connects high voltage.
6. 6. frequency doubling device according to claim 1, it is characterised in that in the transistor circuit of the K cascade, except K Outside transistor circuit, the source of the P-type transistor in any one transistor circuit L is connected to the N-type of L+1 transistor circuits The source of transistor.
7. 7. frequency doubling device according to claim 1, it is characterised in that the first resistor is adjustable resistance；Described first Electric capacity, the second electric capacity and the 3rd electric capacity are tunable capacitor；First inductance is controllable impedance.