CN104766910B - A kind of GaN nano wire and preparation method thereof - Google Patents
A kind of GaN nano wire and preparation method thereof Download PDFInfo
- Publication number
- CN104766910B CN104766910B CN201510066337.7A CN201510066337A CN104766910B CN 104766910 B CN104766910 B CN 104766910B CN 201510066337 A CN201510066337 A CN 201510066337A CN 104766910 B CN104766910 B CN 104766910B
- Authority
- CN
- China
- Prior art keywords
- gan
- nanowire
- preparation
- hexagonal pyramid
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000002070 nanowire Substances 0.000 title claims abstract description 88
- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 17
- 239000012670 alkaline solution Substances 0.000 claims abstract description 9
- 239000010408 film Substances 0.000 claims description 59
- 230000000873 masking effect Effects 0.000 claims description 39
- 239000010409 thin film Substances 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 16
- KWYUFKZDYYNOTN-UHFFFAOYSA-M potassium hydroxide Substances [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 claims description 14
- 150000004767 nitrides Chemical class 0.000 claims description 12
- 239000000243 solution Substances 0.000 claims description 11
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 8
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 238000003491 array Methods 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 27
- 229910052681 coesite Inorganic materials 0.000 description 14
- 229910052906 cristobalite Inorganic materials 0.000 description 14
- 239000000377 silicon dioxide Substances 0.000 description 14
- 235000012239 silicon dioxide Nutrition 0.000 description 14
- 229910052682 stishovite Inorganic materials 0.000 description 14
- 229910052905 tridymite Inorganic materials 0.000 description 14
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 8
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 4
- 230000000737 periodic effect Effects 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000001878 scanning electron micrograph Methods 0.000 description 4
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- -1 indium phosphide compound Chemical class 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008450 motivation Effects 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/817—Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/822—Materials of the light-emitting regions
- H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
- H10H20/825—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
Landscapes
- Led Devices (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
技术领域technical field
本发明涉及半导体器件技术领域,具体涉及一种GaN纳米线及其制备方法,可用于纳米线微电子和光电子器件。The invention relates to the technical field of semiconductor devices, in particular to a GaN nanowire and a preparation method thereof, which can be used in nanowire microelectronics and optoelectronic devices.
背景技术Background technique
由于纳米材料的力、热、电、光、磁等性质,与传统体材料有很大差异,其研究具有丰富的科学内容和重要的科学价值,因而被认为是21世纪的三大科学技术之一。其中,半导体纳米线由于其独特的一维量子结构,被认为是未来微纳器件的基本结构。近年来,半导体纳米线的研究工作取得了很大进展,其应用领域包括集成电路、晶体管、激光器、发光二极管、单光子器件以及太阳能电池等。其中,在众多的半导体材料中,GaN基半导体材料具有较宽的直接带隙,以其优异的物理、化学稳定性,高饱和电子漂移速度,高击穿场强等性能,目前广泛应用于高频、高温、高功率电子器件以及光电子器件等领域,已经成为继第一代锗、硅半导体材料和第二代砷化镓、磷化铟化合物半导体材料之后的第三代半导体材料。因此,GaN纳米线的制备成为人们研究的热点。Because the properties of nanomaterials such as force, heat, electricity, light, and magnetism are very different from traditional bulk materials, their research has rich scientific content and important scientific value, so it is considered to be one of the three major science and technologies in the 21st century. one. Among them, semiconductor nanowires are considered to be the basic structure of future micro-nano devices due to their unique one-dimensional quantum structure. In recent years, the research work of semiconductor nanowires has made great progress, and its application fields include integrated circuits, transistors, lasers, light-emitting diodes, single-photon devices, and solar cells. Among them, among many semiconductor materials, GaN-based semiconductor materials have a wide direct band gap, and are widely used in high It has become the third-generation semiconductor material after the first-generation germanium and silicon semiconductor materials and the second-generation gallium arsenide and indium phosphide compound semiconductor materials. Therefore, the preparation of GaN nanowires has become a research hotspot.
虽然GaN纳米线具有很重要的应用前景,但是GaN纳米线器件的实用化和产业化还亟需解决一系列问题,其中的关键问题是如何实现GaN纳米线的半径、高度,位置的准确调控。因此设计研发一种半径、高度和位置可调控的GaN纳米线制备方法是本发明的创研动机。Although GaN nanowires have very important application prospects, the practical and industrialization of GaN nanowire devices still needs to solve a series of problems. The key issue is how to realize the accurate control of the radius, height and position of GaN nanowires. Therefore, designing and developing a GaN nanowire preparation method whose radius, height and position can be adjusted is the motivation of the present invention.
发明内容Contents of the invention
本发明为了克服GaN纳米线的半径、高度以及生长位置难以控制的问题,首先提出一种GaN纳米线制备方法。In order to overcome the problem that the radius, height and growth position of GaN nanowires are difficult to control, the present invention first proposes a method for preparing GaN nanowires.
本发明的又一目的是提出一种具有实用化和产业化价值的GaN纳米线。Another purpose of the present invention is to propose a GaN nanowire with practical and industrial value.
为了实现上述目的,本发明的技术方案:In order to achieve the above object, technical scheme of the present invention:
一种GaN纳米线的制备方法,包括以下步骤:A method for preparing GaN nanowires, comprising the steps of:
步骤1:通过MOCVD,在衬底上外延生长三族氮化物薄膜;Step 1: epitaxially growing a III-nitride film on the substrate by MOCVD;
步骤2:在上述三族氮化物薄膜上沉积介质层,并把该介质层制备成图形化掩蔽膜;Step 2: Depositing a dielectric layer on the above-mentioned III-nitride thin film, and preparing the dielectric layer into a patterned masking film;
步骤3:在上述图形化的三族氮化物薄膜上通过MOCVD选择性区域生长技术外延生长侧面为{1-100}面,顶面为(0001)面的GaN六角金字塔微结构;Step 3: Epitaxial growth of a GaN hexagonal pyramid microstructure with {1-100} planes on the sides and (0001) planes on the top plane by MOCVD selective area growth technology on the above-mentioned patterned group-III nitride film;
步骤4:通过碱性溶液腐蚀,把GaN六角金字塔微结构的{1-101}面腐蚀掉,最终制备成侧面为{1-100}面,顶面为(0001)面的GaN纳米线。Step 4: Etch the {1-101} plane of the GaN hexagonal pyramid microstructure by etching with an alkaline solution, and finally prepare a GaN nanowire with a {1-100} plane on the side and a (0001) plane on the top.
本制备方法,可以通过控制外延生长GaN六角金字塔微结构的生长参数,改变该GaN六角金字塔微结构的高度和(0001)顶面的大小,从而控制经过碱性溶液腐蚀后形成的GaN纳米线的高度和半径。In this preparation method, the height of the GaN hexagonal pyramid microstructure and the size of the (0001) top surface can be changed by controlling the growth parameters of the epitaxially grown GaN hexagonal pyramid microstructure, thereby controlling the thickness of the GaN nanowires formed after being corroded by an alkaline solution. height and radius.
优选的,所述碱性溶液为KOH或NaOH溶液,其溶液的质量浓度范围为5%-80%。Preferably, the alkaline solution is KOH or NaOH solution, and the mass concentration range of the solution is 5%-80%.
优选的,所述步骤4中采用湿法腐蚀法把GaN六角金字塔微结构腐蚀成GaN纳米线,腐蚀过程的溶液温度范围为20 oC -100 oC。Preferably, in the step 4, wet etching is used to etch the GaN hexagonal pyramid microstructure into GaN nanowires, and the temperature range of the solution during the etching process is 20 ° C-100 ° C.
优选的,所述图形化掩蔽膜的材料为SiO2或SiNx,开孔的图形结构为圆形,圆孔直径范围为1 μm-20 μm。Preferably, the material of the patterned masking film is SiO 2 or SiN x , the pattern structure of the opening is circular, and the diameter of the circular hole is in the range of 1 μm-20 μm.
优选的,所述衬底为Si、sapphire、SiC、GaN、AlN或ZnO衬底。Preferably, the substrate is Si, sapphire, SiC, GaN, AlN or ZnO substrate.
优选的,所述三族氮化物薄膜为AlN薄膜、GaN薄膜、或AlN和GaN薄膜构成的复合层。Preferably, the Group-III nitride thin film is an AlN thin film, a GaN thin film, or a composite layer composed of AlN and GaN thin films.
优选的,通过改变图形化掩蔽膜的具体图形结构,能够控制MOCVD外延生长的GaN六角金字塔结构的位置和排列形式,从而控制最后经过碱性溶液腐蚀后形成的GaN纳米线或纳米线阵列的位置和排列形式。Preferably, by changing the specific pattern structure of the patterned masking film, the position and arrangement form of the GaN hexagonal pyramid structure grown by MOCVD epitaxial growth can be controlled, thereby controlling the position of the GaN nanowire or nanowire array formed after the final corrosion of the alkaline solution and array form.
优选的,通过GaN六角金字塔微结构的高度控制GaN纳米线的高度,通过GaN六角金字塔微结构的(0001)顶面控制GaN纳米线的半径。Preferably, the height of the GaN nanowire is controlled by the height of the GaN hexagonal pyramid microstructure, and the radius of the GaN nanowire is controlled by the (0001) top surface of the GaN hexagonal pyramid microstructure.
一种GaN纳米线,是侧面为{1-100}面,顶面为(0001)面的GaN纳米线,该GaN纳米线底部从上至下依次为图形化掩蔽膜、三族氮化物薄膜和衬底。A GaN nanowire is a GaN nanowire with a {1-100} plane on the side and a (0001) plane on the top. The bottom of the GaN nanowire is a patterned masking film, a group-III nitride film, and substrate.
与现有技术相比,本发明的有益效果为:本发明给出了一种成本低廉、可操作性强的GaN纳米线生长制备工艺,此GaN纳米线的高度、直径、生长位置都可以精确控制,并且可以根据需求实现单根GaN纳米线或GaN纳米线阵列。Compared with the prior art, the beneficial effects of the present invention are: the present invention provides a GaN nanowire growth preparation process with low cost and strong operability, and the height, diameter and growth position of the GaN nanowire can be precisely control, and a single GaN nanowire or GaN nanowire array can be realized according to requirements.
附图说明Description of drawings
图1是本发明提供的GaN纳米线的基本制备流程图。Fig. 1 is a flow chart of the basic preparation of GaN nanowires provided by the present invention.
图2A是本发明实施例1提供的GaN六角金字塔微结构的SEM图。FIG. 2A is an SEM image of the GaN hexagonal pyramid microstructure provided by Embodiment 1 of the present invention.
图2B是本发明实施例1提供的GaN纳米线的SEM图。FIG. 2B is an SEM image of the GaN nanowire provided in Embodiment 1 of the present invention.
图3A是本发明实施例2提供的GaN六角金字塔微结构的SEM图。FIG. 3A is an SEM image of the GaN hexagonal pyramid microstructure provided by Embodiment 2 of the present invention.
图3B是本发明实施例2提供的GaN纳米线的SEM图。FIG. 3B is an SEM image of the GaN nanowire provided in Embodiment 2 of the present invention.
图4是本发明实施例3提供的GaN纳米线阵列的结构示意图。FIG. 4 is a schematic structural diagram of a GaN nanowire array provided by Embodiment 3 of the present invention.
图5是本发明实施例4提供的core/shell结构的纳米线InGaN/GaN LED的截面结构示意图。5 is a schematic cross-sectional structure diagram of a nanowire InGaN/GaN LED with a core/shell structure provided by Embodiment 4 of the present invention.
图6是本发明实施例5提供的棒状结构的纳米线InGaN/GaN LED的截面结构示意图。FIG. 6 is a schematic cross-sectional structure diagram of a rod-shaped nanowire InGaN/GaN LED provided in Embodiment 5 of the present invention.
具体实施方式detailed description
以下所述的具体实施例,对发明的目的、技术方案和有益效果进行了进一步详细说明。所应理解的是,以下所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The specific examples described below further describe the purpose, technical solutions and beneficial effects of the invention in detail. It should be understood that the following descriptions are only specific embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention are Should be included within the protection scope of the present invention.
附图中,1-衬底,2-三族氮化物薄膜,3-图形化掩蔽膜,4-GaN六角金字塔微结构,5-GaN纳米线,6-InGaN/GaN有源层,7-p-GaN覆盖层,8-SiO2覆盖层。In the accompanying drawings, 1-substrate, 2-group III nitride film, 3-patterned masking film, 4-GaN hexagonal pyramid microstructure, 5-GaN nanowire, 6-InGaN/GaN active layer, 7-p -GaN capping layer, 8- SiO2 capping layer.
参照图1,本发明的GaN纳米线的基本制备流程为:Referring to Fig. 1, the basic preparation process of the GaN nanowire of the present invention is:
第一步:通过MOCVD,在衬底上外延生长三族氮化物薄膜;Step 1: epitaxially grow III-nitride films on the substrate by MOCVD;
第二步:在上述三族氮化物薄膜上沉积介质层,并把该介质层制备成图形化掩蔽膜;The second step: depositing a dielectric layer on the above-mentioned III-nitride thin film, and preparing the dielectric layer into a patterned masking film;
第三步:在上述图形化的三族氮化物薄膜上通过MOCVD选择性区域生长技术外延生长出侧面为{1-100}面,顶面为(0001)面的GaN六角金字塔微结构;Step 3: GaN hexagonal pyramid microstructures with {1-100} planes on the sides and (0001) planes on the top planes are epitaxially grown by MOCVD selective region growth technology on the above-mentioned patterned III-nitride films;
第四步:通过碱性溶液腐蚀,把GaN六角金字塔微结构的{1-101}面腐蚀掉,最终制备成侧面为{1-100}面,顶面为(0001)面的GaN纳米线。Step 4: Etch the {1-101} plane of the GaN hexagonal pyramid microstructure by etching with an alkaline solution, and finally prepare a GaN nanowire with a {1-100} plane on the side and a (0001) plane on the top.
基于上述GaN纳米线的基本制备流程给出以下实施例:The following examples are given based on the basic preparation process of the above-mentioned GaN nanowires:
实施例1Example 1
在Si衬底上制备直径小于200 nm,高度约为5 μm的GaN纳米线,本实施例的材料结构从下至上依次为,Si衬底,AlN三族氮化物薄膜,SiO2图形化掩蔽膜,GaN纳米线。即在本实施例中衬底1采用Si衬底,三族氮化物薄膜2采用AlN三族氮化物薄膜,图形化掩蔽膜3采用SiO2图形化掩蔽膜。GaN nanowires with a diameter of less than 200 nm and a height of about 5 μm are prepared on a Si substrate. The material structure of this embodiment is, from bottom to top, Si substrate, AlN group III nitride film, and SiO2 patterned masking film , GaN nanowires. That is, in this embodiment, the substrate 1 is a Si substrate, the III-nitride film 2 is an AlN III-nitride film, and the patterned masking film 3 is a SiO2 patterned masking film.
其制备方法依次包括以下步骤:Its preparation method comprises the following steps in turn:
步骤1:将Si衬底放入MOCVD反应室内,在Si衬底上外延生长厚度为300 nm的AlN三族氮化物薄膜;Step 1: Put the Si substrate into the MOCVD reaction chamber, and epitaxially grow an AlN III-nitride film with a thickness of 300 nm on the Si substrate;
步骤2:通过PECVD,在上述AlN三族氮化物薄膜(生长在Si衬底上的AlN薄膜为外延片)上沉积厚度为100 nm的SiO2介质层,并采用常规的光刻和湿法腐蚀方法,把SiO2介质层制备成周期性孔洞结构的图形化掩蔽膜,此图形化掩蔽膜图样是开孔直径为3 μm的圆形;Step 2: Deposit a SiO2 dielectric layer with a thickness of 100 nm on the above-mentioned AlN III-nitride film (the AlN film grown on the Si substrate is an epitaxial wafer) by PECVD, and use conventional photolithography and wet etching Method, the SiO 2 dielectric layer is prepared into a patterned masking film with a periodic hole structure, and the pattern of the patterned masking film is a circle with a hole diameter of 3 μm;
步骤3:把上述带有图形化掩蔽膜的外延片放入MOCVD反应室内,在1095 oC,300mbar,氢气氛围环境下通入10000 sccm的氨气(NH3)和40 sccm的三甲基镓(TMGa)30分钟,选择性区域生长出GaN六角金字塔微结构,此GaN六角金字塔微结构的侧面为{1-101}面,顶面为(0001)面,高度约为5μm,顶面直径小于200nm,其结构如图2A所示;Step 3: Put the above-mentioned epitaxial wafer with patterned masking film into the MOCVD reaction chamber, and pass 10000 sccm of ammonia gas (NH3) and 40 sccm of trimethylgallium ( TMGa) for 30 minutes, a GaN hexagonal pyramid microstructure is selectively grown. The side of the GaN hexagonal pyramid microstructure is a {1-101} plane, the top plane is a (0001) plane, the height is about 5 μm, and the diameter of the top plane is less than 200 nm. , its structure is shown in Figure 2A;
步骤4:把上述带有GaN六角金字塔微结构的外延片置于质量浓度为30%,温度为50oC的氢氧化钾(KOH)溶液中腐蚀30分钟,把GaN六角金字塔微结构的{1-101}侧面腐蚀掉,形成侧面为{1-100}面,顶面为(0001)面,高度约为5 μm,直径小于200 nm的GaN纳米线,其结构如图2B所示。Step 4: Put the above-mentioned epitaxial wafer with the GaN hexagonal pyramid microstructure in a potassium hydroxide (KOH) solution with a mass concentration of 30% and a temperature of 50 o C for 30 minutes to corrode the GaN hexagonal pyramid microstructure {1 The -101} side is etched away to form a GaN nanowire with a {1-100} plane on the side, a (0001) plane on the top, a height of about 5 μm, and a diameter of less than 200 nm. The structure is shown in Figure 2B.
实施例2Example 2
在Si衬底上制备直径约为500 nm,高度约为4 μm的GaN纳米线,本实施例的材料结构从下至上依次为,Si衬底,AlN/GaN三族氮化物薄膜,SiO2图形化掩蔽膜,GaN纳米线。即在本实施例中衬底1采用Si衬底,三族氮化物薄膜2采用AlN/GaN三族氮化物薄膜,图形化掩蔽膜3采用SiO2图形化掩蔽膜。GaN nanowires with a diameter of about 500 nm and a height of about 4 μm are prepared on a Si substrate. The material structure of this embodiment is, from bottom to top, Si substrate, AlN/GaN group III nitride film, SiO2 pattern masking film, GaN nanowires. That is, in this embodiment, the substrate 1 is a Si substrate, the III-nitride thin film 2 is an AlN/GaN III-nitride thin film, and the patterned masking film 3 is a SiO2 patterned masking film.
其制备方法依次包括以下步骤:Its preparation method comprises the following steps in turn:
步骤1:将Si衬底放入MOCVD反应室内,在Si衬底上依次外延生长厚度为100 nm的AlN外延层和厚度为800 nm的GaN外延层;Step 1: Put the Si substrate into the MOCVD reaction chamber, and epitaxially grow an AlN epitaxial layer with a thickness of 100 nm and a GaN epitaxial layer with a thickness of 800 nm on the Si substrate in sequence;
步骤2:通过PECVD,在上述AlN/GaN三族氮化物薄膜(生长在Si衬底上的AlN/GaN薄膜为外延片)上沉积100 nm的SiO2介质层,并采用常规的光刻和湿法腐蚀方法,把SiO2介质层制备成周期性孔洞结构的图形化掩蔽膜,此图形化掩蔽膜图样是开孔直径为3 μm的圆形;Step 2: Deposit a 100 nm SiO2 dielectric layer on the above-mentioned AlN/GaN group-III nitride film (the AlN/GaN film grown on the Si substrate is an epitaxial wafer) by PECVD, and use conventional photolithography and wet The SiO 2 dielectric layer is prepared into a patterned masking film with a periodic hole structure, and the pattern of the patterned masking film is a circle with a hole diameter of 3 μm;
步骤3:把上述带有图形化掩膜的外延片放入MOCVD反应室内,在1095 oC,250mbar,氢气氛围环境下通入10000 sccm的氨气(NH3)和40 sccm的三甲基镓(TMGa)25分钟,选择性区域生长出GaN六角金字塔微结构,此GaN六角金字塔微结构的侧面为{1-101}面,顶面为(0001)面,高度约为4μm,顶面直径约为500 nm,其结构如图3A所示;Step 3: Put the above-mentioned epitaxial wafer with a patterned mask into the MOCVD reaction chamber, and pass 10000 sccm of ammonia gas (NH3) and 40 sccm of trimethylgallium ( TMGa) for 25 minutes, a GaN hexagonal pyramid microstructure is selectively grown. The side of the GaN hexagonal pyramid microstructure is {1-101} plane, the top plane is (0001) plane, the height is about 4 μm, and the diameter of the top plane is about 500 nm, and its structure is shown in Figure 3A;
步骤4:把上述带有GaN六角金字塔微结构的外延片置于质量浓度为30%,温度为50oC的氢氧化钾(KOH)溶液中腐蚀25分钟,把GaN六角金字塔微结构的{1-101}侧面腐蚀掉,形成侧面为{1-100}面,顶面为(0001)面,高度约为4 μm,直径约为500 nm的GaN纳米线,其结构如图3B所示。Step 4: Put the above-mentioned epitaxial wafer with the GaN hexagonal pyramid microstructure in a potassium hydroxide (KOH) solution with a mass concentration of 30% and a temperature of 50 o C for 25 minutes to corrode the GaN hexagonal pyramid microstructure {1 The -101} side was etched away to form a GaN nanowire with a {1-100} plane on the side, a (0001) plane on the top, a height of about 4 μm, and a diameter of about 500 nm. The structure is shown in Figure 3B.
实施例3Example 3
在Si衬底上制备直径小于200 nm,高度约为5 μm的GaN纳米线阵列。本实施例采用与实施例1基本一致的材料结构,材料结构从下至上依次为,Si衬底,AlN三族氮化物薄膜,SiO2图形化掩蔽膜,GaN纳米线。即在本实施例中衬底1采用Si衬底,三族氮化物薄膜2采用AlN三族氮化物薄膜,图形化掩蔽膜3采用SiO2图形化掩蔽膜。GaN nanowire arrays with a diameter of less than 200 nm and a height of about 5 μm were prepared on a Si substrate. This embodiment adopts the same material structure as that of Embodiment 1, and the material structure from bottom to top is Si substrate, AlN group III nitride thin film, SiO 2 patterned masking film, and GaN nanowire. That is, in this embodiment, the substrate 1 is a Si substrate, the III-nitride film 2 is an AlN III-nitride film, and the patterned masking film 3 is a SiO2 patterned masking film.
具体的制备流程与实施例1基本一致,其中在步骤2制备图形化掩蔽膜3时,把掩蔽膜的图样制备成周期性排布的圆孔,圆孔直径为3 μm,周期为10 μm。因此可以在后续的MOCVD选择性区域生长过程中外延出阵列排布的GaN六角金字塔微结构,并通过后续KOH腐蚀制备成GaN纳米线阵列,如图4。The specific preparation process is basically the same as that in Example 1, wherein when preparing the patterned masking film 3 in step 2, the pattern of the masking film is prepared into periodically arranged circular holes with a diameter of 3 μm and a period of 10 μm. Therefore, the array-arranged GaN hexagonal pyramid microstructure can be epitaxially grown in the subsequent MOCVD selective region growth process, and a GaN nanowire array can be prepared by subsequent KOH etching, as shown in FIG. 4 .
实施例4Example 4
在Si衬底上制备直径约为200 nm,高度约为5 μm的core/shell结构的纳米线InGaN/GaN LED,本实施例的材料结构从下至上依次为,Si衬底,AlN/n-GaN三族氮化物薄膜,SiO2图形化掩蔽膜,n-GaN纳米线,InGaN/GaN有源层,p-GaN覆盖层。即在本实施例中衬底1采用Si衬底,三族氮化物薄膜2采用AlN/n-GaN三族氮化物薄膜,图形化掩蔽膜3采用SiO2图形化掩蔽膜,GaN纳米线5为n-GaN纳米线。A nanowire InGaN/GaN LED with a core/shell structure with a diameter of about 200 nm and a height of about 5 μm is prepared on a Si substrate. The material structure of this embodiment is, from bottom to top, Si substrate, AlN/n- GaN III-nitride film, SiO 2 patterned masking film, n-GaN nanowire, InGaN/GaN active layer, p-GaN capping layer. That is, in this embodiment, the substrate 1 is a Si substrate, the III-nitride thin film 2 is an AlN/n-GaN III-nitride thin film, the patterned masking film 3 is SiO2 patterned masking film, and the GaN nanowire 5 is n-GaN nanowires.
其制备方法依次包括以下步骤:Its preparation method comprises the following steps in turn:
步骤1:将Si衬底放入MOCVD反应室内,在Si衬底上依次外延生长厚度为100 nm的AlN外延层和厚度为800 nm的n-GaN外延层;Step 1: Put the Si substrate into the MOCVD reaction chamber, and epitaxially grow an AlN epitaxial layer with a thickness of 100 nm and an n-GaN epitaxial layer with a thickness of 800 nm on the Si substrate in sequence;
步骤2:通过PECVD,在上述外延片上沉积厚度为100 nm的SiO2介质层,并采用常规的光刻和湿法腐蚀方法,把SiO2介质层制备成周期性孔洞结构的图形化掩蔽膜,此图形化掩蔽膜图样是开孔直径为3 μm的圆形;Step 2: Deposit a SiO2 dielectric layer with a thickness of 100 nm on the above-mentioned epitaxial wafer by PECVD, and use conventional photolithography and wet etching methods to prepare the SiO2 dielectric layer into a patterned masking film with a periodic hole structure, The pattern of the patterned masking film is a circle with an opening diameter of 3 μm;
步骤3:把上述带有图形化掩膜的外延片放入MOCVD反应室内,在1095 oC,250mbar,氢气氛围环境下通入10000 sccm的氨气(NH3)和40 sccm的三甲基镓(TMGa)30分钟,选择性区域生长出n-GaN六角金字塔微结构,此n-GaN六角金字塔微结构的侧面为{1-101}面,顶面为(0001)面,高度约为5 μm,顶面直径约为200 nm;Step 3: Put the above-mentioned epitaxial wafer with a patterned mask into the MOCVD reaction chamber, and pass 10000 sccm of ammonia gas (NH3) and 40 sccm of trimethylgallium ( TMGa) for 30 minutes, the n-GaN hexagonal pyramid microstructure is selectively grown. The side of the n-GaN hexagonal pyramid microstructure is {1-101} plane, the top surface is (0001) plane, and the height is about 5 μm. The diameter of the top surface is about 200 nm;
步骤4:把上述带有n-GaN六角金字塔微结构的外延片置于浓度为30%,温度为50 oC的氢氧化钾(KOH)的溶液中腐蚀30分钟,把{1-101}侧面腐蚀掉,形成侧面为{1-100}面,顶面为(0001)面,高度约为5 μm,直径约为200 nm的n-GaN纳米线;Step 4: Put the above-mentioned epitaxial wafer with n-GaN hexagonal pyramid microstructure in a potassium hydroxide (KOH) solution with a concentration of 30% and a temperature of 50 o C for 30 minutes, and put {1-101} sides Etched away to form n-GaN nanowires with {1-100} planes on the sides, (0001) planes on the top, a height of about 5 μm, and a diameter of about 200 nm;
步骤5:把上述带有n-GaN纳米线的外延片放入MOCVD反应室内,依次在n-GaN纳米线表面外延生长InGaN/GaN有源层和p-GaN覆盖层,制备成core/shell结构的纳米线InGaN/GaN LED,如图5。Step 5: Put the above-mentioned epitaxial wafer with n-GaN nanowires into the MOCVD reaction chamber, and epitaxially grow InGaN/GaN active layer and p-GaN covering layer on the surface of n-GaN nanowires in sequence to prepare a core/shell structure Nanowire InGaN/GaN LED, as shown in Figure 5.
实施例5Example 5
在Si衬底上制备直径约为200 nm,高度约为5 μm的棒状结构的纳米线InGaN/GaNLED,本实施例的材料结构从下至上依次为,Si衬底,AlN/n-GaN三族氮化物薄膜,SiO2图形化掩蔽膜,n-GaN纳米线,SiO2覆盖层,InGaN/GaN有源层6,p-GaN覆盖层7。即在本实施例中衬底1采用Si衬底,三族氮化物薄膜2采用AlN/n-GaN三族氮化物薄膜,图形化掩蔽膜3采用SiO2图形化掩蔽膜,GaN纳米线5为n-GaN纳米线。A nanowire InGaN/GaN LED with a rod-like structure with a diameter of about 200 nm and a height of about 5 μm is prepared on a Si substrate. The material structure of this example is, from bottom to top, Si substrate, AlN/n-GaN family Nitride film, SiO 2 patterned masking film, n-GaN nanowires, SiO 2 capping layer, InGaN/GaN active layer 6, p-GaN capping layer 7. That is, in this embodiment, the substrate 1 is a Si substrate, the III-nitride thin film 2 is an AlN/n-GaN III-nitride thin film, the patterned masking film 3 is SiO2 patterned masking film, and the GaN nanowire 5 is n-GaN nanowires.
其制备方法依次包括以下步骤:Its preparation method comprises the following steps in turn:
步骤1:将Si衬底放入MOCVD反应室内,在Si衬底上依次外延生长厚度为100 nm的AlN外延层和厚度为800 nm的n-GaN外延层;Step 1: Put the Si substrate into the MOCVD reaction chamber, and epitaxially grow an AlN epitaxial layer with a thickness of 100 nm and an n-GaN epitaxial layer with a thickness of 800 nm on the Si substrate in sequence;
步骤2:通过PECVD,在上述外延片上沉积厚度为100 nm的SiO2介质层,并采用常规的光刻和湿法腐蚀方法,把SiO2介质层制备成周期性孔洞结构的图形化掩蔽膜,此图形化掩蔽膜图样是开孔直径为3 μm的圆形;Step 2: Deposit a SiO2 dielectric layer with a thickness of 100 nm on the above-mentioned epitaxial wafer by PECVD, and use conventional photolithography and wet etching methods to prepare the SiO2 dielectric layer into a patterned masking film with a periodic hole structure, The pattern of the patterned masking film is a circle with an opening diameter of 3 μm;
步骤3:把上述带有图形化掩膜的外延片放入MOCVD反应室内,在1095 oC,250mbar,氢气氛围环境下通入10000 sccm的氨气(NH3)和40 sccm的三甲基镓(TMGa)30分钟,选择性区域生长出n-GaN六角金字塔微结构,此n-GaN六角金字塔微结构的侧面为{1-101}面,顶面为(0001)面,高度约为5 μm,顶面直径约为200 nm;Step 3: Put the above-mentioned epitaxial wafer with a patterned mask into the MOCVD reaction chamber, and pass 10000 sccm of ammonia gas (NH3) and 40 sccm of trimethylgallium ( TMGa) for 30 minutes, the n-GaN hexagonal pyramid microstructure is selectively grown. The side of the n-GaN hexagonal pyramid microstructure is {1-101} plane, the top surface is (0001) plane, and the height is about 5 μm. The diameter of the top surface is about 200 nm;
步骤4:把上述n-GaN六角金字塔微结构的外延片置于质量浓度为30%,温度为50 oC的氢氧化钾(KOH)的溶液中腐蚀30分钟,把{1-101}侧面腐蚀掉,形成侧面为{1-100}面,顶面为(0001)面,高度约为5 μm,直径约为200 nm的n-GaN纳米线;Step 4: Put the epitaxial wafer with the above-mentioned n-GaN hexagonal pyramid microstructure in a potassium hydroxide (KOH) solution with a mass concentration of 30% and a temperature of 50 o C for 30 minutes, and etch the {1-101} side to form an n-GaN nanowire with a {1-100} plane on the side, a (0001) plane on the top, a height of about 5 μm, and a diameter of about 200 nm;
步骤5:在n-GaN纳米线表面制备露出其顶部的SiO2覆盖层;Step 5: preparing a SiO 2 capping layer exposing the top of the n-GaN nanowire surface;
步骤6:把上述带有n-GaN纳米线的外延片放入MOCVD反应室内,依次在n-GaN纳米线顶部外延生长InGaN/GaN有源层和p-GaN覆盖层,制备成棒状结构的纳米线InGaN/GaNLED,如图6。Step 6: Put the above-mentioned epitaxial wafer with n-GaN nanowires into the MOCVD reaction chamber, and epitaxially grow the InGaN/GaN active layer and p-GaN capping layer on the top of the n-GaN nanowires in turn to prepare a rod-shaped nanometer Line InGaN/GaN LED, as shown in Figure 6.
实施例6Example 6
在Si衬底上制备直径约为200 nm,高度约为5 μm的core/shell结构的纳米线InGaN/GaN LED阵列。本实施例采用与实施例4基本一致的材料结构,材料结构从下至上依次为,Si衬底,AlN/n-GaN三族氮化物薄膜,SiO2图形化掩蔽膜,n-GaN纳米线,InGaN/GaN有源层,p-GaN覆盖层。具体的制备流程与实施例4基本一致,其中在步骤2制备图形化掩蔽膜时,把掩蔽膜的图样制备成周期性排布的圆孔,圆孔直径为3 μm,周期为10 μm。因此可以在后续的MOCVD选择性区域生长过程中外延出阵列排布的n-GaN六角金字塔微结构,并通过后续KOH腐蚀制备成n-GaN纳米线阵列。最后通过MOCVD依次在n-GaN纳米线阵列上外延生长InGaN/GaN有源层和p-GaN覆盖层,制备成core/shell结构的纳米线InGaN/GaN LED阵列。A nanowire InGaN/GaN LED array with a core/shell structure with a diameter of about 200 nm and a height of about 5 μm was prepared on a Si substrate. This embodiment adopts the same material structure as that of Embodiment 4, and the material structure from bottom to top is Si substrate, AlN/n-GaN group-III nitride thin film, SiO 2 patterned masking film, n-GaN nanowire, InGaN/GaN active layer, p-GaN cladding layer. The specific preparation process is basically the same as that of Example 4, wherein when preparing the patterned masking film in step 2, the pattern of the masking film is prepared as circular holes arranged periodically, the diameter of the circular holes is 3 μm, and the period is 10 μm. Therefore, the array-arranged n-GaN hexagonal pyramid microstructure can be epitaxially grown in the subsequent MOCVD selective region growth process, and the n-GaN nanowire array can be prepared by subsequent KOH etching. Finally, the InGaN/GaN active layer and the p-GaN capping layer are epitaxially grown on the n-GaN nanowire array in sequence by MOCVD to prepare a nanowire InGaN/GaN LED array with a core/shell structure.
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510066337.7A CN104766910B (en) | 2015-02-06 | 2015-02-06 | A kind of GaN nano wire and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510066337.7A CN104766910B (en) | 2015-02-06 | 2015-02-06 | A kind of GaN nano wire and preparation method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104766910A CN104766910A (en) | 2015-07-08 |
CN104766910B true CN104766910B (en) | 2017-07-04 |
Family
ID=53648634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201510066337.7A Expired - Fee Related CN104766910B (en) | 2015-02-06 | 2015-02-06 | A kind of GaN nano wire and preparation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104766910B (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108441943A (en) * | 2018-02-02 | 2018-08-24 | 上海理工大学 | A kind of preparation method of extensive GaN nano wire array |
CN108394857A (en) * | 2018-02-02 | 2018-08-14 | 上海理工大学 | A kind of preparation method of nucleocapsid GaN nano wire array |
CN108364972B (en) * | 2018-04-03 | 2024-05-31 | 中山大学 | Flexible thin film GaN-based nanocolumn LED array micro-display device and its manufacturing method |
JP7320770B2 (en) * | 2018-09-28 | 2023-08-04 | セイコーエプソン株式会社 | Light-emitting device and projector |
CN109994562A (en) * | 2019-04-17 | 2019-07-09 | 华南理工大学 | Nano-pillars on GaAs substrate with ultra-polycrystalline hexagonal pyramid patterning and preparation method |
JP7320794B2 (en) * | 2021-03-15 | 2023-08-04 | セイコーエプソン株式会社 | Light-emitting devices, projectors, and displays |
CN112736173B (en) * | 2021-04-06 | 2021-06-29 | 至芯半导体(杭州)有限公司 | A composite substrate, its preparation method and semiconductor device |
CN112802930B (en) * | 2021-04-15 | 2021-07-06 | 至芯半导体(杭州)有限公司 | Group III nitride substrate preparation method and semiconductor device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103928502A (en) * | 2014-04-23 | 2014-07-16 | 西安电子科技大学 | Polar GaN nanowire material based on m-plane GaN and its fabrication method |
CN104515583A (en) * | 2013-09-29 | 2015-04-15 | 西安思能网络科技有限公司 | Portable electronic scale with sucker and currency detector lamp |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB201021112D0 (en) * | 2010-12-13 | 2011-01-26 | Ntnu Technology Transfer As | Nanowires |
-
2015
- 2015-02-06 CN CN201510066337.7A patent/CN104766910B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104515583A (en) * | 2013-09-29 | 2015-04-15 | 西安思能网络科技有限公司 | Portable electronic scale with sucker and currency detector lamp |
CN103928502A (en) * | 2014-04-23 | 2014-07-16 | 西安电子科技大学 | Polar GaN nanowire material based on m-plane GaN and its fabrication method |
Also Published As
Publication number | Publication date |
---|---|
CN104766910A (en) | 2015-07-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104766910B (en) | A kind of GaN nano wire and preparation method thereof | |
JP3219854U (en) | III-V nitride semiconductor epitaxial wafer and III-V nitride semiconductor device | |
CN102403428B (en) | III group-III nitride nanorod light emitting device and manufacture method thereof | |
CN105810783B (en) | Method for manufacturing light emitting diode and light emitting diode manufactured thereby | |
CN103608937B (en) | Ultra small led and method for manufacturing same | |
TWI464903B (en) | Epitaxial substrate and preparation method thereof, and application of epitaxial substrate as growth epitaxial layer | |
CN103378238B (en) | Light-emitting diode | |
WO2016192434A1 (en) | Method for removing growth substrate by utilizing chemical corrosion | |
CN106229394B (en) | Micro- light emitting diode and its manufacturing method and display | |
CN110808320B (en) | Deep ultraviolet LED structure and fabrication method thereof | |
CN105957801A (en) | Gallium nitride nanocone and gallium nitride nanorod mixed array manufacturing method | |
CN104409577A (en) | Epitaxial growth method for GaN-based LED epitaxial active area basic structure | |
CN103378236A (en) | Epitaxy structural body with microstructure | |
CN110416372A (en) | A preparation method of non-destructive micro-nano structure for micro-LED application | |
CN108574033A (en) | Light emitting diode device with field plate structure and preparation method thereof | |
CN109728087B (en) | Fabrication method of low-ohmic contact GaN-based HEMT based on nanosphere mask | |
CN104576840A (en) | Method for preparing gallium nitride LED (light-emitting diode) on silicon substrate | |
US20130276696A1 (en) | Production method for flat substrate with low defect density | |
TWI398558B (en) | Gallium nitride stereo epitaxial structure and manufacturing method thereof | |
CN106887495B (en) | Epitaxial wafer of light-emitting diode and method of making the same | |
US11450747B2 (en) | Semiconductor structure with an epitaxial layer | |
CN105140364A (en) | GaN light-emitting device and fabrication method thereof | |
CN103258930B (en) | A kind of GaN LED structure and preparation method | |
CN115566121A (en) | AlN composite substrate for growing III group nitride and preparation method | |
CN103107251A (en) | Light emitting diode manufacturing method with hexagonal pyramid p type gallium nitride |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
EXSB | Decision made by sipo to initiate substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170704 |
|
CF01 | Termination of patent right due to non-payment of annual fee |