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CN104753050A - Constant-current protection solid-state power controller and solid-state power control method - Google Patents

Constant-current protection solid-state power controller and solid-state power control method Download PDF

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CN104753050A
CN104753050A CN201510111773.1A CN201510111773A CN104753050A CN 104753050 A CN104753050 A CN 104753050A CN 201510111773 A CN201510111773 A CN 201510111773A CN 104753050 A CN104753050 A CN 104753050A
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CN104753050B (en
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李响
苏建
刘彦民
王诗斌
门良知
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Technology and Engineering Center for Space Utilization of CAS
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Abstract

本发明涉及一种恒流保护固态功率控制器及固态功率控制方法,包括功率场效应管、采样电阻、采样转换电路、悬浮栅驱动电路和FPGA;所述功率场效应管的漏极与母线连接,所述功率场效应管的源极与所述采样电阻的一端连接,所述采样电阻的另一端与负载串联;所述采样转换电路的两个输入端并联在所述采样电阻的两端;所述采样转换电路的一个输出端与所述FPGA相连;所述FPGA与所述采样转换电路的另一个输出端连接,所述FPGA与所述悬浮栅驱动电路连接。本发明采用恒流技术从根本上隔绝了用电器在加、断电过程中对电源母线的干扰;并通过I2T保护技术对用电器负载进行供电输出保护。

The invention relates to a constant current protection solid-state power controller and a solid-state power control method, comprising a power field effect tube, a sampling resistor, a sampling conversion circuit, a floating grid drive circuit and an FPGA; the drain of the power field effect tube is connected to a bus bar , the source of the power FET is connected to one end of the sampling resistor, and the other end of the sampling resistor is connected in series with the load; the two input terminals of the sampling conversion circuit are connected in parallel to both ends of the sampling resistor; One output end of the sampling conversion circuit is connected to the FPGA; the FPGA is connected to the other output end of the sampling conversion circuit, and the FPGA is connected to the floating gate drive circuit. The invention adopts the constant current technology to fundamentally isolate the interference of the electrical appliances on the power supply bus in the process of power-on and power-off; and uses the I2T protection technology to protect the power supply output of the electrical loads.

Description

一种恒流保护固态功率控制器及固态功率控制方法A constant current protection solid-state power controller and solid-state power control method

技术领域technical field

本发明涉及航空、航天等苛刻环境中,5~270V直流配电器、配电过载保护、输入母线保护的恒流保护固态功率控制器及固态功率控制方法。The invention relates to a constant-current protection solid-state power controller and a solid-state power control method for 5-270V direct current distributors, power distribution overload protection, and input busbar protection in harsh environments such as aviation and spaceflight.

背景技术Background technique

传统直流用电器均采用熔电器、机械开关等进行电路保护、加断电源,该种电路设计不可避免存在机械特性差、一致性差、开关寿命有限的弊端,不能满足航空、航天等苛刻环境的使用,固态功率控制器是集继电器的转换功能和断路器的保护功能于一体的固态元器件,是和固态配电系统相配套的控制负载通断的开关装置。它具有无触点、无电弧、无噪声、响应快、电磁干扰小、寿命长、可靠性高以及便于计算机远程控制等优点。Traditional DC appliances use fuses, mechanical switches, etc. for circuit protection and power on and off. This kind of circuit design inevitably has the disadvantages of poor mechanical characteristics, poor consistency, and limited switch life, and cannot meet the harsh environments such as aviation and aerospace. , The solid-state power controller is a solid-state component that integrates the conversion function of the relay and the protection function of the circuit breaker. It is a switching device that controls the on-off of the load that is matched with the solid-state power distribution system. It has the advantages of no contact, no arc, no noise, fast response, small electromagnetic interference, long life, high reliability and convenient computer remote control.

现有SSPC的产品和专利仅仅是进行反时限保护,存在问题为若出现开机随机浪涌则可能误关断,对于母线开机浪涌仅为“躲过”,不能很好抑制。Existing SSPC products and patents are only for inverse time protection. There is a problem that if there is a random power-on surge, it may be turned off by mistake. The power-on surge of the bus is only "dodged" and cannot be well suppressed.

发明内容Contents of the invention

本发明所要解决的技术问题是提供一种应用于5~270V直流用电设备的集电路负载的过流、过耗保护与母线的过载、用电器浪涌抑制于一体的、利用恒流保护算法及反时限保护算法的恒流保护固态功率控制器及固态功率控制方法。The technical problem to be solved by the present invention is to provide a constant current protection algorithm that integrates the over-current and over-consumption protection of the circuit load applied to the 5-270V DC power equipment, the overload of the busbar, and the surge suppression of the electrical appliances. A constant-current protection solid-state power controller and a solid-state power control method based on an inverse time-limit protection algorithm.

本发明解决上述技术问题的技术方案如下:一种恒流保护固态功率控制器,包括功率场效应管、采样电阻、采样转换电路、悬浮栅驱动电路和FPGA;The technical solution of the present invention to solve the above technical problems is as follows: a constant current protection solid-state power controller, including a power field effect transistor, a sampling resistor, a sampling conversion circuit, a floating gate drive circuit and an FPGA;

所述功率场效应管的漏极与母线连接,所述功率场效应管的源极与所述采样电阻的一端连接,所述采样电阻的另一端与负载的一端连接,所述负载的另一端接地,用于驱动所述功率场效应管的悬浮栅驱动电路与所述功率场效应管的栅极连接;The drain of the power field effect transistor is connected to the bus bar, the source of the power field effect transistor is connected to one end of the sampling resistor, the other end of the sampling resistor is connected to one end of the load, and the other end of the load is Grounded, the floating gate drive circuit for driving the power field effect transistor is connected to the gate of the power field effect transistor;

所述采样转换电路的两个输入端并联在所述采样电阻的两端,用于采集采样电阻上的电压信号和电流信号,并将采集到的电压信号和电流信号进行模数转换;The two input terminals of the sampling conversion circuit are connected in parallel at both ends of the sampling resistor, and are used to collect the voltage signal and current signal on the sampling resistor, and perform analog-to-digital conversion on the collected voltage signal and current signal;

所述采样转换电路的一个输出端与所述FPGA相连,用于将经过模数转换后的电压信号和电流信号传递给FPGA;An output terminal of the sampling conversion circuit is connected with the FPGA, and is used to transmit the voltage signal and the current signal after the analog-to-digital conversion to the FPGA;

所述FPGA所述FPGA与所述悬浮栅驱动电路连接,所述FPGA根据经过模数转换后的电压信号和电流信号产生反时限控制信号和恒流控制信号,通过控制所述悬浮栅驱动电路驱动所述功率场效应管对负载进行反时限保护和恒流保护。The FPGA, the FPGA is connected to the floating gate drive circuit, and the FPGA generates an inverse time control signal and a constant current control signal according to the analog-to-digital converted voltage signal and current signal, and controls the floating gate drive circuit to drive The power FET performs inverse time protection and constant current protection on the load.

本发明的有益效果是:采用“恒流保护技术”保护直流供电母线;工作电压轨范围宽,用于5~270V直流母线母线保护;控制冗余度大,可以进行测控、并联冗余。The beneficial effects of the present invention are: the "constant current protection technology" is used to protect the DC power supply bus; the working voltage rail range is wide, and it is used for 5-270V DC bus bus protection; the control redundancy is large, and the measurement and control and parallel redundancy can be performed.

在上述技术方案的基础上,本发明还可以做如下改进。On the basis of the above technical solutions, the present invention can also be improved as follows.

进一步,所述FPGA中包括反时限保护模块、通信模块和恒流保护模块;Further, the FPGA includes an inverse time protection module, a communication module and a constant current protection module;

所述反时限保护模块与所述通信模块连接,所述反时限保护模块对输入的电压信号和电流信号利用反时限保护算法进行计算,得到反时限控制信号,将反时限控制信号发送给悬浮栅驱动电路,并通过通信模块将反时限控制信号发送给上位机;The inverse time protection module is connected to the communication module, and the inverse time protection module uses the inverse time protection algorithm to calculate the input voltage signal and current signal to obtain an inverse time control signal, and sends the inverse time control signal to the floating gate Drive the circuit, and send the inverse time-limit control signal to the host computer through the communication module;

所述恒流保护模块与所述通信模块连接,所述恒流保护模块对输入的电压信号和电流信号利用恒流保护算法进行计算,得到恒流控制信号,将恒流控制信号发送给悬浮栅驱动电路,并通过通信模块将恒流控制信号发送给上位机。The constant current protection module is connected to the communication module, and the constant current protection module calculates the input voltage signal and current signal using a constant current protection algorithm to obtain a constant current control signal, and sends the constant current control signal to the floating gate Drive the circuit, and send the constant current control signal to the host computer through the communication module.

进一步,所述采样保护电路包括采样电路和A/D转换电路;Further, the sampling protection circuit includes a sampling circuit and an A/D conversion circuit;

所述采样电路与所述A/D转换电路连接,采样电路的两个输入端并联在所述采样电阻的两端,采样电路用于采集采样电阻上的电压信号和电流信号,A/D转换电路用于将采集的采样电阻上的电压信号和电流信号进行A/D转换。The sampling circuit is connected with the A/D conversion circuit, and the two input terminals of the sampling circuit are connected in parallel to the two ends of the sampling resistor, and the sampling circuit is used to collect the voltage signal and the current signal on the sampling resistor, and the A/D conversion The circuit is used for A/D conversion of the collected voltage signal and current signal on the sampling resistor.

进一步,一种直流用电器,包括恒流保护固态功率控制器。Further, a DC electrical appliance includes a solid-state power controller for constant current protection.

进一步,一种采用恒流保护固态功率控制器的固态功率控制方法,包括以下步骤:Further, a solid-state power control method using a constant current protection solid-state power controller, comprising the following steps:

步骤1:所述采样转换电路采集采样电阻上的电压信号和电流信号,并将采集到的电压信号和电流信号进行模数转换;Step 1: the sampling conversion circuit collects the voltage signal and current signal on the sampling resistor, and performs analog-to-digital conversion on the collected voltage signal and current signal;

步骤2:当负载发生过流现象时,若当前电流信号的电流值大于预设的恒流值时,执行步骤3,否则,执行步骤4;Step 2: When the load has an overcurrent phenomenon, if the current value of the current current signal is greater than the preset constant current value, perform step 3, otherwise, perform step 4;

步骤3:所述FPGA对负载进行恒流保护和反时限保护,执行步骤5;Step 3: The FPGA performs constant current protection and inverse time protection on the load, and performs step 5;

步骤4:所述FPGA对负载进行反时限保护,执行步骤5;Step 4: The FPGA performs inverse time protection on the load, and performs step 5;

步骤5:结束处理。Step 5: End processing.

进一步,所述FPGA对负载进行恒流保护具体为:所述FPGA根据经过模数转换后的电压信号和电流信号利用恒流保护算法进行计算,产生恒流控制信号,悬浮栅驱动电路根据输入的恒流控制信号驱动功率场效应管,进而对负载进行恒流保护。Further, the constant current protection of the load by the FPGA is specifically: the FPGA performs calculations using a constant current protection algorithm based on the analog-to-digital converted voltage signal and current signal to generate a constant current control signal, and the floating gate drive circuit according to the input The constant current control signal drives the power field effect transistor, and then performs constant current protection for the load.

进一步,所述FPGA对负载进行反时限保护具体为:所述FPGA根据经过模数转换后的电压信号和电流信号产生反时限控制信号,通过控制所述悬浮栅驱动电路驱动所述功率场效应管对负载进行反时限保护。Further, the inverse time protection of the load by the FPGA is specifically: the FPGA generates an inverse time control signal according to the analog-to-digital converted voltage signal and current signal, and drives the power field effect transistor by controlling the floating gate drive circuit Carry out inverse time protection to the load.

进一步,所述步骤5中还包括,若负载仍然处于过流状态,则切断负载。Further, the step 5 also includes, if the load is still in the overcurrent state, then cut off the load.

进一步,所述反时限控制信号中包括反时限参数及开关控制信号。Further, the inverse time control signal includes an inverse time parameter and a switch control signal.

进一步,所述反时限参数通过反时限保护算法计算得出。Further, the inverse time limit parameter is calculated through an inverse time limit protection algorithm.

附图说明Description of drawings

图1为无恒流保护时随机浪涌示意图;Figure 1 is a schematic diagram of random surge without constant current protection;

图2为本发明加入恒流保护后随即浪涌波形示意图;Fig. 2 is a schematic diagram of the surge waveform immediately after the constant current protection is added in the present invention;

图3为本发明恒流、I2T电流时间外特性图;Fig. 3 is constant current of the present invention, I 2 T electric current external characteristic diagram;

图4为本发明恒流保护控制流程图;Fig. 4 is the flow chart of constant current protection control of the present invention;

图5为本发明电路原理结构图。Fig. 5 is a schematic structure diagram of the circuit of the present invention.

附图中,各标号所代表的部件列表如下:In the accompanying drawings, the list of parts represented by each label is as follows:

1、功率场效应管,2、采样电阻,3、采样转换电路,3-1、采样电路,3-2、A/D转换电路,4、悬浮栅驱动电路,5、FPGA,5-1、反时限保护模块,5-2、通信模块,5-3、恒流保护模块。1. Power FET, 2. Sampling resistor, 3. Sampling conversion circuit, 3-1. Sampling circuit, 3-2. A/D conversion circuit, 4. Floating gate drive circuit, 5. FPGA, 5-1, Inverse time protection module, 5-2, communication module, 5-3, constant current protection module.

具体实施方式Detailed ways

以下结合附图对本发明的原理和特征进行描述,所举实例只用于解释本发明,并非用于限定本发明的范围。The principles and features of the present invention are described below in conjunction with the accompanying drawings, and the examples given are only used to explain the present invention, and are not intended to limit the scope of the present invention.

实施例1Example 1

一种恒流保护固态功率控制器,包括功率场效应管1、采样电阻2、采样转换电路3、悬浮栅驱动电路4和FPGA5;A solid-state power controller for constant current protection, comprising a power field effect transistor 1, a sampling resistor 2, a sampling conversion circuit 3, a floating gate drive circuit 4, and an FPGA 5;

所述功率场效应管1的漏极与母线连接,所述功率场效应管1的源极与所述采样电阻2的一端连接,所述采样电阻2的另一端与负载的一端连接,所述负载的另一端接地,用于驱动所述功率场效应管1的悬浮栅驱动电路(4)与所述功率场效应管1的栅极连接;The drain of the power field effect transistor 1 is connected to the bus bar, the source of the power field effect transistor 1 is connected to one end of the sampling resistor 2, and the other end of the sampling resistor 2 is connected to one end of the load. The other end of the load is grounded, and the floating gate drive circuit (4) for driving the power field effect transistor 1 is connected to the grid of the power field effect transistor 1;

所述采样转换电路3的两个输入端并联在所述采样电阻2的两端,用于采集采样电阻2上的电压信号和电流信号,并将采集到的电压信号和电流信号进行模数转换;The two input terminals of the sampling conversion circuit 3 are connected in parallel at both ends of the sampling resistor 2, and are used to collect the voltage signal and current signal on the sampling resistor 2, and perform analog-to-digital conversion on the collected voltage signal and current signal ;

所述采样转换电路3的一个输出端与所述FPGA 5相连,用于将经过模数转换后的电压信号和电流信号传递给FPGA 5;An output terminal of the sampling conversion circuit 3 is connected with the FPGA 5, and is used to deliver the voltage signal and the current signal through the analog-to-digital conversion to the FPGA 5;

所述FPGA 5所述FPGA 5与所述悬浮栅驱动电路4连接,所述FPGA 5根据经过模数转换后的电压信号和电流信号产生反时限控制信号和恒流控制信号,通过控制所述悬浮栅驱动电路4驱动所述功率场效应管1对负载进行反时限保护和恒流保护。The FPGA 5 and the FPGA 5 are connected to the floating gate drive circuit 4, and the FPGA 5 generates an inverse time control signal and a constant current control signal according to the analog-to-digital converted voltage signal and current signal, and controls the floating The gate drive circuit 4 drives the power field effect transistor 1 to perform inverse time protection and constant current protection for the load.

所述FPGA5中包括反时限保护模块5-1、通信模块5-2和恒流保护模块5-3;The FPGA5 includes an inverse time protection module 5-1, a communication module 5-2 and a constant current protection module 5-3;

所述反时限保护模块5-1与所述通信模块5-2连接,所述反时限保护模块5-1对输入的电压信号和电流信号利用反时限保护算法进行计算,得到反时限控制信号,将反时限控制信号发送给悬浮栅驱动电路4,并通过通信模块5-2将反时限控制信号发送给上位机;The inverse time protection module 5-1 is connected to the communication module 5-2, and the inverse time protection module 5-1 calculates the input voltage signal and current signal using an inverse time protection algorithm to obtain an inverse time control signal, sending the inverse time control signal to the floating gate drive circuit 4, and sending the inverse time control signal to the host computer through the communication module 5-2;

所述恒流保护模块5-3与所述通信模块5-2连接,所述恒流保护模块5-3对输入的电压信号和电流信号利用恒流保护算法进行计算,得到恒流控制信号,将恒流控制信号发送给悬浮栅驱动电路4,并通过通信模块5-2将恒流控制信号发送给上位机。The constant current protection module 5-3 is connected to the communication module 5-2, and the constant current protection module 5-3 calculates the input voltage signal and current signal using a constant current protection algorithm to obtain a constant current control signal, Send the constant current control signal to the floating gate drive circuit 4, and send the constant current control signal to the host computer through the communication module 5-2.

所述采样保护电路3包括采样电路3-1和A/D转换电路3-2;The sampling protection circuit 3 includes a sampling circuit 3-1 and an A/D conversion circuit 3-2;

所述采样电路3-1与所述A/D转换电路3-2连接,采样电路3-1的两个输入端并联在所述采样电阻2的两端,采样电路3-1用于采集采样电阻2上的电压信号和电流信号,A/D转换电路3-2用于将采集的采样电阻2上的电压信号和电流信号进行A/D转换。The sampling circuit 3-1 is connected with the A/D conversion circuit 3-2, and the two input terminals of the sampling circuit 3-1 are connected in parallel at the two ends of the sampling resistor 2, and the sampling circuit 3-1 is used for collecting and sampling For the voltage signal and current signal on the resistor 2, the A/D conversion circuit 3-2 is used to perform A/D conversion on the collected voltage signal and current signal on the sampling resistor 2.

一种直流用电器,包括恒流保护固态功率控制器。A DC electrical appliance includes a solid-state power controller for constant current protection.

一种采用恒流保护固态功率控制器的固态功率控制方法,包括以下步骤:A solid-state power control method using a constant current protection solid-state power controller, comprising the following steps:

步骤1:所述采样转换电路3采集采样电阻2上的电压信号和电流信号,并将采集到的电压信号和电流信号进行模数转换;Step 1: the sampling conversion circuit 3 collects the voltage signal and current signal on the sampling resistor 2, and performs analog-to-digital conversion on the collected voltage signal and current signal;

步骤2:当负载发生过流现象时,若当前电流信号的电流值大于预设的恒流值时,执行步骤3,否则,执行步骤4;Step 2: When the load has an overcurrent phenomenon, if the current value of the current current signal is greater than the preset constant current value, perform step 3, otherwise, perform step 4;

步骤3:所述FPGA5对负载进行恒流保护和反时限保护,执行步骤5;Step 3: The FPGA5 performs constant current protection and inverse time protection on the load, and performs step 5;

步骤4:所述FPGA5对负载进行反时限保护,执行步骤5;Step 4: The FPGA5 performs inverse time protection on the load, and performs step 5;

步骤5:结束处理。Step 5: End processing.

所述FPGA5对负载进行恒流保护具体为:所述FPGA5根据经过模数转换后的电压信号和电流信号利用恒流保护算法进行计算,产生恒流控制信号,悬浮栅驱动电路4根据输入的恒流控制信号驱动功率场效应管1,进而对负载进行恒流保护。The FPGA5 performs constant current protection on the load as follows: the FPGA5 uses a constant current protection algorithm to calculate according to the voltage signal and current signal after the analog-to-digital conversion, and generates a constant current control signal, and the floating gate drive circuit 4 according to the input constant current The current control signal drives the power field effect transistor 1, and then performs constant current protection for the load.

所述FPGA5对负载进行反时限保护具体为:所述FPGA5根据经过模数转换后的电压信号和电流信号产生反时限控制信号,通过控制所述悬浮栅驱动电路4驱动所述功率场效应管1对负载进行反时限保护。The inverse time protection of the load by the FPGA5 is specifically: the FPGA5 generates an inverse time control signal according to the analog-to-digital converted voltage signal and current signal, and drives the power field effect transistor 1 by controlling the floating gate drive circuit 4 Carry out inverse time protection to the load.

所述步骤5中还包括,若负载仍然处于过流状态,则切断负载。The step 5 also includes, if the load is still in the overcurrent state, then cut off the load.

所述反时限控制信号中包括反时限参数及开关控制信号。The inverse time control signal includes an inverse time parameter and a switch control signal.

所述反时限参数通过反时限保护算法计算得出。The inverse time limit parameter is calculated through an inverse time limit protection algorithm.

如图1所示,为无恒流保护时随机浪涌示意图;图2为本发明加入恒流保护后随即浪涌波形示意图;CCSSPC兼具了对用电器的过耗保护(反时限保护),还具有母线浪涌保护(恒流保护可以抑制任何情况下的电流浪涌)。As shown in Figure 1, it is a schematic diagram of random surge without constant current protection; Figure 2 is a schematic diagram of surge waveform immediately after the constant current protection is added in the present invention; CCSSPC has both over-consumption protection (inverse time limit protection) for electrical appliances, It also has busbar surge protection (constant current protection can suppress current surge under any circumstances).

CCSSPC主要包括功率Mosfet,检测电阻,AD转换电路,采样电路,悬浮栅驱动电路,反时限保护算法,通信模块。CCSSPC mainly includes power Mosfet, detection resistor, AD conversion circuit, sampling circuit, floating gate drive circuit, inverse time protection algorithm, and communication module.

功率Mosfet作为开关,漏极直接连接母线电流采样电路输入并联在采样电阻两端,经采样和AD转换输出到FPGA和恒流电路,FPGA实现反时限保护算法和与上位机通信的功能;电流信号同时输入恒流模块,形成闭环控制。The power Mosfet is used as a switch, and the drain is directly connected to the bus current sampling circuit input and connected in parallel to both ends of the sampling resistor. After sampling and AD conversion, the output is sent to FPGA and constant current circuit. FPGA realizes the inverse time limit protection algorithm and the function of communicating with the host computer; the current signal At the same time, input the constant current module to form a closed-loop control.

在正常工作时CCSSPC将采样的电压、电流信号通过FPGA和隔离的通信线路传输给上位机。当负载出现异常情况发生过流时,若超过设定恒流值,则启动恒流保护,和反时限保护,恒流一段时间(由反时限的参数决定)若异常未结束则切断负载;若发生过流,但未超过恒流点,则仅启动反时限保护,保护曲线可根据负载状况用户自定义。During normal operation, CCSSPC transmits the sampled voltage and current signals to the host computer through FPGA and isolated communication lines. When the load is abnormal and over-current occurs, if it exceeds the set constant current value, the constant current protection and inverse time protection will be activated, and the constant current will be cut for a period of time (determined by the parameters of the inverse time limit). If the abnormality is not over, the load will be cut off; if When overcurrent occurs, but the constant current point is not exceeded, only the inverse time protection is activated, and the protection curve can be customized according to the load condition.

如图5所示,在CCSSPC中,Mosfet作为主要开关器件,对负载的通断进行控制。Mosfet由悬浮栅驱动电路直接驱动,而驱动电路的通断控制信号由FPGA和恒流保护算法产生。As shown in Figure 5, in CCSSPC, Mosfet is used as the main switching device to control the on-off of the load. Mosfet is directly driven by the floating gate drive circuit, and the on-off control signal of the drive circuit is generated by FPGA and constant current protection algorithm.

I2T保护和恒流保护算法同时对CCSSPC所控制负载进行保护,当负载电流发生过流时,I2T保护即启动,根据过流情况判断动作方式和延时,当过流到超过恒流点时,恒流电路进行恒流保护。其中“I2T”为保护用电器过流、过耗;“恒流”为保护供电母线的过载、用电浪涌。The I 2 T protection and constant current protection algorithms protect the load controlled by CCSSPC at the same time. When the load current is over-current, the I 2 T protection is activated. The action mode and delay are judged according to the over-current situation. When the over-current exceeds the constant When the flow point is reached, the constant current circuit performs constant current protection. Among them, "I 2 T" is to protect electrical appliances from over-current and over-consumption; "Constant current" is to protect the overload and power surge of the power supply bus.

如图4,恒流保护的反馈信号为对采样电阻进行电流采样后经AD转换输入到恒流保护控制电路中,经过控制电路产生控制信号驱动开关管,最终达到恒流。加入恒流保护的CCSSPC电流时间外特性曲线如图3所示。As shown in Figure 4, the feedback signal of the constant current protection is to sample the current of the sampling resistor and input it to the constant current protection control circuit through AD conversion, and the control circuit generates a control signal to drive the switch tube, and finally achieves constant current. The characteristic curve of CCSSPC current outside time with constant current protection is shown in Figure 3.

以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within range.

Claims (10)

1. a constant current protection solid-state power controller, it is characterized in that, comprise power field effect pipe (1), sampling resistor (2), sample conversion circuit (3), suspended gate drive circuit (4) and FPGA (5);
The drain electrode of described power field effect pipe (1) is connected with bus, the source electrode of described power field effect pipe (1) is connected with one end of described sampling resistor (2), the other end of described sampling resistor (2) is connected with one end of load, the other end ground connection of described load, is connected with the grid of described power field effect pipe (1) for driving the suspended gate drive circuit (4) of described power field effect pipe (1);
Two inputs of described sample conversion circuit (3) are connected in parallel on the two ends of described sampling resistor (2), for gathering voltage signal on sampling resistor (2) and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
An output of described sample conversion circuit (3) is connected with described FPGA (5), for the voltage signal after analog-to-digital conversion and current signal are passed to FPGA (5);
Described FPGA (5) described FPGA (5) is connected with described suspended gate drive circuit (4); described FPGA (5) produces inverse time lag control signal and constant-current control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe (1) to carry out inverse time protection and constant current protection to load by controlling described suspended gate drive circuit (4).
2. constant current protection solid-state power controller according to claim 1, it is characterized in that, described FPGA (5) comprises inverse time protection module (5-1), communication module (5-2) and constant current protection module (5-3);
Described inverse time protection module (5-1) is connected with described communication module (5-2), described inverse time protection module (5-1) utilizes inverse time protection algorithm to calculate to the voltage signal of input and current signal, obtain inverse time lag control signal, inverse time lag control signal is sent to suspended gate drive circuit (4), and by communication module (5-2), inverse time lag control signal is sent to host computer;
Described constant current protection module (5-3) is connected with described communication module (5-2); described constant current protection module (5-3) utilizes constant current protection algorism to calculate to the voltage signal of input and current signal; obtain constant-current control signal; constant-current control signal is sent to suspended gate drive circuit (4), and by communication module (5-2), constant-current control signal is sent to host computer.
3. constant current protection solid-state power controller according to claim 1, it is characterized in that, described sampling protective circuit (3) comprises sample circuit (3-1) and A/D change-over circuit (3-2);
Described sample circuit (3-1) is connected with described A/D change-over circuit (3-2), two inputs of sample circuit (3-1) are connected in parallel on the two ends of described sampling resistor (2), sample circuit (3-1) is for gathering voltage signal on sampling resistor (2) and current signal, and A/D change-over circuit (3-2) is for carrying out A/D conversion by the voltage signal on the sampling resistor (2) gathered and current signal.
4. a direct-flow current consumer, is characterized in that, comprise as arbitrary in claims 1 to 3 as described in constant current protection solid-state power controller.
5. adopt described constant current as arbitrary in claims 1 to 3 to protect a solid state power control method for solid-state power controller, it is characterized in that, comprise the following steps:
Step 1: the voltage signal on described sample conversion circuit (3) collection sampling resistor (2) and current signal, and the voltage signal collected and current signal are carried out analog-to-digital conversion;
Step 2: when load generation over-current phenomenon avoidance, if when the current value of current flow signal is greater than default constant current value, performs step 3, otherwise, perform step 4;
Step 3: described FPGA (5) carries out constant current protection and inverse time protection to load, performs step 5;
Step 4: described FPGA (5) carries out inverse time protection to load, performs step 5;
Step 5: end process.
6. solid state power control method according to claim 5; it is characterized in that; described FPGA (5) carries out constant current protection to load and is specially: described FPGA (5) utilizes constant current protection algorism to calculate according to the voltage signal after analog-to-digital conversion and current signal; produce constant-current control signal; suspended gate drive circuit (4) according to the constant-current control signal driving power field effect transistor (1) of input, and then carries out constant current protection to load.
7. solid state power control method according to claim 5; it is characterized in that; described FPGA (5) carries out inverse time protection to load and is specially: described FPGA (5) produces inverse time lag control signal according to the voltage signal after analog-to-digital conversion and current signal, drives described power field effect pipe (1) to carry out inverse time protection to load by controlling described suspended gate drive circuit (4).
8. solid state power control method according to claim 5, is characterized in that, also comprises in described step 5, if load is still in over-current state, then cuts off load.
9. solid state power control method according to claim 5, is characterized in that, described inverse time lag control signal comprises inverse time lag parameter and switch controlling signal.
10. solid state power control method according to claim 9, is characterized in that, described inverse time lag parameter is calculated by inverse time protection algorithm.
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