CN104733317B - The forming method of transistor - Google Patents

Abstract

The invention provides a method for forming a transistor. In the process of forming the source and drain regions of the transistor, grooves are formed between gate structures, and an epitaxial layer is formed in the grooves. In the process of forming the epitaxial layer, the step of forming the epitaxial layer at least includes the following steps: forming a part of the epitaxial layer in the groove by means of epitaxial growth, and reducing the air pressure in the epitaxial chamber after forming the part of the epitaxial layer. The invention can reduce the spherical particle pollutants on the surface of the gate structure after epitaxial growth, and improve the performance of the transistor.

Description

How the transistor is formed

technical field

The invention relates to the field of semiconductors, in particular to a method for forming a transistor.

Background technique

In existing semiconductor devices, the method of using stress layer can improve the carrier mobility of the trench in the semiconductor device. This method stretches or compresses the silicon lattice by physical methods to improve the carrier mobility of CMOS devices. So as to improve the transistor performance.

The source and drain regions of the PMOS transistor in the CMOS device are epitaxially grown silicon germanium in the Σ-shaped groove in the substrate, and apply compressive stress to the channel of the PMOS transistor, while the source and drain regions of the NMOS transistor in the CMOS device are in the substrate Silicon carbide is filled in the U-shaped groove of the NMOS transistor to apply tensile stress to the channel of the NMOS transistor.

Figures 1 and 2 show schematic side views of the process of forming a PMOS transistor in the prior art. In the process of forming a PMOS transistor in the prior art, referring to Figure 1, a plurality of gates 04 are first formed on a silicon substrate 01 The gate structure 06 composed of the gate spacer 03 and the epitaxial barrier layer 05 is used as a mask to etch the substrate 01 to form a Σ-shaped groove 02 .

Referring to Fig. 2, the SiGe layer 08 is epitaxially grown in the Σ-shaped groove 02, and then the cap layer 09 is epitaxially grown. After the epitaxial growth, the reaction gas in the epitaxial chamber cannot be removed in time, causing some SiGe particles 07 to adhere to the epitaxial barrier On the surface of the layer 05 and the gate spacer 03 , the size of the silicon germanium particles 07 will also increase through the process of epitaxial growth, forming spherical particle pollutants. In the scanning electron microscope test after epitaxial growth, it is often found that the surface of the gate structure 06 has spherical particle pollutants attached to it, which affects the performance of the transistor.

During the process of forming NMOS transistors, the spherical particle pollutants will also be produced, affecting the performance of the transistors.

Contents of the invention

The problem to be solved by the invention is to provide a method for forming a transistor, so as to reduce spherical particle pollutants on the surface of the gate structure and improve the performance of the transistor.

In order to solve the above problems, the present invention provides a method for forming a transistor, comprising:

provide the substrate;

forming a gate structure on the substrate;

forming recesses in the substrate between the gate structures;

forming an epitaxial layer in the groove;

Wherein, the step of forming the epitaxial layer includes at least one of the following steps:

forming a part of the epitaxial layer in the groove by means of epitaxial growth;

After part of the epitaxial layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber.

Optionally, the step of forming the epitaxial layer further includes: after reducing the pressure in the epitaxial chamber, introducing a purge gas. Optionally, the transistor is a PMOS, the substrate is a silicon substrate, and the material of the epitaxial layer is silicon germanium.

Optionally, the step of forming an epitaxial layer includes:

Epitaxial growth in the groove to form a seed layer;

After the seed layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber;

forming a bulk silicon germanium layer on the seed layer;

After the bulk silicon germanium layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber;

forming a capping layer over the bulk silicon germanium layer;

After the capping layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber.

Optionally, during the process of forming the epitaxial layer in the groove, the gas used includes silane, hydrogen chloride, dichlorodihydrosilane, diborane, germane and hydrogen.

Optionally, the flow rate of silane, hydrogen chloride, dichlorodihydrosilane, diborane, and germane is in the range of 1 standard condition ml per minute to 1000 standard condition ml per minute, and the flow rate of hydrogen is 0.1 standard condition liter per minute to the range of 50 standard liters per minute.

Optionally, the step of forming part of the epitaxial layer in the groove includes: making the air pressure in the epitaxial chamber range from 1 Torr to 100 Torr; and the temperature in the range from 500 degrees Celsius to 800 degrees Celsius.

Optionally, the step of reducing the air pressure in the epitaxial chamber after forming part of the epitaxial layer includes: reducing the air pressure in the epitaxial chamber from a range of 1 Torr to 100 Torr to a range of 1 Torr to 20 Torr.

Optionally, the step of introducing a purge gas into the epitaxy chamber includes: introducing hydrogen gas into the epitaxy chamber.

Optionally, the flow rate of the hydrogen gas is in the range of 30 standard condition liters per minute to 50 standard condition liters per minute.

Optionally, the time for feeding hydrogen gas is in the range of 1 minute to 2 minutes.

Optionally, the transistor is NMOS, and the epitaxial layer formed in the groove includes a silicon carbide layer.

Optionally, the step of forming an epitaxial layer includes:

forming a bulk silicon carbide layer in the groove;

After the bulk silicon carbide layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber;

forming a capping layer over the bulk silicon carbide layer;

After the capping layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber.

Compared with the prior art, the technical solution of the present invention has the following advantages:

In the process of forming the stress layer of the transistor by means of epitaxial growth, the pressure in the epitaxial chamber is reduced after forming part of the epitaxial layer, so that most of the reactive gas in the epitaxial chamber is discharged, reducing the generation of reactive gas on the surface of the gate structure The probability of spherical particle pollutants; the purification gas is introduced into the epitaxy chamber, and the spherical particle pollutants are taken away from the surface of the gate structure, so that the cleanliness of the surface of the gate structure is improved, and the performance of the transistor is improved.

Further, the purifying gas is hydrogen, and the reducing properties of hydrogen can be used to reduce impurities such as oxides in the epitaxial chamber to water, and further clean the surface of the gate structure.

Description of drawings

1 to 2 are schematic diagrams of a method for forming a transistor in the prior art;

3 is a flowchart of an embodiment of a method for forming a transistor of the present invention;

4 to 11 are side views of various steps of the transistor formed by the method for forming the transistor shown in FIG. 3 .

Detailed ways

During the process of forming the stress layer in the source and drain regions of the transistor, spherical particle pollutants are easily formed on the surface of the gate structure.

Analyzing the formation method of the transistor, the spherical particle contamination is produced during the formation of the epitaxial layer. Specifically, during the process of forming the epitaxial layer, the reaction gas in the epitaxial chamber cannot be removed in time, causing some epitaxial layer material particles to adhere to the surface of the gate structure. During the epitaxial growth process, the epitaxial layer material particles The size also gradually increases with the process of epitaxial growth, and finally forms spherical particle pollutants, which in turn affects the performance of the transistor.

In order to solve the above technical problem, the present invention provides a method for forming a transistor. After forming part of the epitaxial layer, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber. By reducing the air pressure in the epitaxy chamber, most of the reaction gas in the epitaxy chamber can be discharged, reducing the probability of spherical particle pollutants; the purification gas can be introduced into the epitaxy chamber, and the spherical particle pollutants can be taken away from the grid. The surface of the electrode structure can reduce the spherical particle contamination on the surface of the gate structure and improve the performance of the transistor.

Referring to FIG. 3 , a flowchart of an embodiment of a method for forming a transistor of the present invention is shown. This embodiment takes forming a PMOS transistor as an example, but in other embodiments, the method for forming a transistor of the present invention can also be applied to forming an NMOS transistor.

The method for forming the transistor of the present invention generally includes the following steps:

Step S1, providing a substrate;

Step S2, forming a PMOS gate structure on the substrate;

Step S3, forming grooves in the substrate between the PMOS gate structures;

Step S4, forming a seed layer in the epitaxial layer in the groove, reducing the air pressure in the epitaxial chamber after forming the seed layer, and introducing hydrogen gas into the epitaxial chamber;

Step S5, forming a bulk silicon germanium layer in the epitaxial layer on the seed layer, reducing the air pressure in the epitaxial chamber after forming the bulk silicon germanium layer, and introducing hydrogen gas into the epitaxial chamber;

Step S6, forming a cap layer in the epitaxial layer on the bulk germanium silicon layer, reducing the air pressure in the epitaxial chamber after forming the cap layer, and injecting hydrogen gas into the epitaxial chamber.

In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

Referring to FIG. 4 , step S1 is performed to provide a substrate 100 . In this embodiment, the substrate 100 is a silicon substrate. In other embodiments, the substrate 100 may also be a silicon-on-insulator substrate or other semiconductor substrates, which is not limited in the present invention.

Continuing to refer to FIG. 4 , step S2 is performed to form a plurality of PMOS gate structures 101 on the substrate 100, and the PMOS gate structures 101 include: a gate 103, a gate side located on the sidewall of the gate 103 The wall 102 and the epitaxial barrier layer 104 located on the upper surface of the gate 103 . Wherein, the function of the epitaxial barrier layer 104 is to provide a barrier for the gate 103 when the epitaxial layer is selectively epitaxially grown in the subsequent groove, so as to prevent the formation of the epitaxial layer on the gate 103 .

Referring to FIG. 5 , step S3 is performed, using the gate structure 101 as a mask, the substrate 100 is etched, and grooves 105 are formed in the substrate 100 between a plurality of PMOS gate structures 101, so that The groove 105 is used to form the stress layer of the PMOS transistor.

The groove 105 in this embodiment is Σ-shaped, and in other embodiments, the groove 105 can also be in other shapes.

Referring to FIG. 6, step S4 is performed to selectively epitaxially grow a seed layer 107 in the groove 105, the seed layer 107 is a thin germanium silicon layer covering the inner surface of the groove 105, the seed The crystal layer 107 is an intrinsic semiconductor layer, and serves as a base for epitaxial growth of a bulk silicon germanium layer doped with boron ions, which can prevent the diffusion of boron ions in the bulk silicon germanium layer.

Step S4 is carried out in the epitaxial chamber, the air pressure in the epitaxial chamber is in the range of 1 Torr to 100 Torr, and the temperature is in the range of 500°C to 800°C.

In this embodiment, during the epitaxial growth of the seed layer 107 , the gases used include silane, hydrogen chloride, dichlorodihydrosilane, diborane, germane and hydrogen.

Among them, the flow rate of silane, hydrogen chloride, dichlorodihydrosilane, and germane is in the range of 1 standard condition ml per minute to 1000 standard condition ml per minute, and the flow rate of hydrogen gas is in the range of 0.1 standard condition liter per minute to 50 standard condition liter per minute in the range of minutes.

In other embodiments, during the epitaxial growth of the seed layer 107 , the gas used also includes other gases used in the prior art for the epitaxial growth of silicon germanium, which is not limited in the present invention.

Referring to FIG. 7 , after the seed layer 107 is formed, the pressure in the epitaxial chamber is reduced, and a purge gas 108 is introduced into the epitaxial chamber. In this embodiment, the purge gas 108 is hydrogen.

Specifically, reduce the air pressure in the epitaxial chamber to a range of 1 torr to 20 torr, the flow rate of the hydrogen gas 108 is in the range of 30 standard condition liters per minute to 50 standard condition liters per minute, and the time for introducing hydrogen gas is 1 minute to 2 minutes.

Reduce the air pressure in the epitaxial chamber to the range of 1 torr to 20 torr, so that most of the reaction gases silane, hydrogen chloride, dichlorodihydrogen silicon, germane, etc. For 1 minute to 2 minutes, the reaction gas in the epitaxial chamber is further pushed and discharged to reduce the probability of spherical particle pollutants 106 being generated.

In addition, in this embodiment, hydrogen gas is used as the cleaning gas, and the reducing properties of hydrogen gas can be used to reduce impurities such as oxides in the epitaxial chamber to water, and further clean the surface of the gate structure 101 .

Referring to FIG. 8, step S5 is performed, and the bulk germanium silicon layer 109 is selectively epitaxially grown on the surface of the seed layer 107 in the groove 105 and the groove 105 is filled. During the process of epitaxially growing the bulk germanium silicon layer 109 In , the gases used include silane, hydrogen chloride, dichlorodihydrosilane, diborane, germane, and hydrogen. Among them, the flow rate of silane, hydrogen chloride, diborane, dichlorodihydrosilane, and germane is in the range of 1 standard condition milliliter per minute to 1000 standard condition milliliters per minute, and the flow rate of hydrogen gas is in the range of 0.1 standard condition liter per minute to 50 Standard condition liters per minute range.

In this embodiment, the gas used in the epitaxial growth process includes diborane, that is to say, boron ions are in-situ doped during the epitaxial growth process to form a source region and a drain region in the bulk SiGe layer 109 . In other embodiments, boron ions may not be doped during the epitaxial growth process, so after the bulk SiGe layer 109 is formed, ion implantation needs to be performed on the bulk SiGe layer 109 to form the source region and the drain region.

It should be noted that since the seed layer 107 is made of the same material as the bulk silicon germanium layer 109, the boundary between the seed layer 107 and the bulk silicon germanium layer 109 is not obvious, so there is no correction for the seed layer in FIGS. 8 to 11 . 107 is marked, but the seed layer 107 still exists on the inner surface of the groove 105 .

The seed layer 107 and the bulk silicon germanium layer 109 are used as stress layers for forming the source and drain regions of the transistor.

In other embodiments, during the process of epitaxially growing the silicon germanium layer 109 , the gas used also includes other gases used in the prior art for the epitaxial growth of silicon germanium doped with boron ions, which is not limited in the present invention.

In addition, in other embodiments, the source region and the drain region may not be formed by in-situ doping, but boron ion implantation may be performed on the bulk silicon germanium layer 109 after epitaxial growth to form the silicon germanium layer 109 form the source and drain regions.

Referring to FIG. 9 , after the bulk silicon germanium layer 109 is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas 108 is introduced into the epitaxial chamber. In this embodiment, the purge gas 108 is hydrogen, and the time for introducing hydrogen is 1 minute to 2 minutes.

Specifically, the air pressure in the epitaxy chamber is reduced to a range of 1 torr to 20 torr, and the flow rate of the hydrogen gas 108 is in a range of 30 scl/min to 50 scl/min.

Reduce the air pressure in the epitaxy chamber to the range of 1 torr to 20 torr, so that most of the reaction gases in the epitaxy chamber, such as silane, hydrogen chloride, diborane, dichlorodihydrosilane, germane, etc., are discharged. The time for entering the hydrogen gas 108 is 1 minute to 2 minutes to further push and discharge the reaction gas in the epitaxial chamber and reduce the probability of spherical particle pollutants 106 being generated.

In addition, hydrogen gas is used as the cleaning gas to remove the spherical particle pollutants 106 formed by germanium silicon remaining on the surface of the gate spacer 102 and the epitaxial barrier layer 104 after step S4B, away from the surface of the gate spacer 102 and the epitaxial barrier layer 104, The hydrogen gas can also reduce impurities such as oxides in the epitaxial chamber to water, further cleaning the surface of the gate structure 101 .

Referring to FIG. 10, step S6 is performed to epitaxially grow a capping layer 110 on the surface of the bulk germanium layer 109. The material of the capping layer 110 is silicon. The function of the capping layer 110 is to provide a base for the silicide layer at the bottom of the contact hole to be formed later. .

In this embodiment, the capping layer 110 , the bulk SiGe layer 109 and the seed layer 107 constitute the epitaxial layer of the transistor.

During the epitaxial growth of the capping layer 110 , the gas used includes silane, hydrogen chloride, dichlorodihydrosilane, and hydrogen. Wherein, the flow rate of silane, hydrogen chloride, dichlorodihydrosilane, is in the range of 1 standard condition milliliter per minute to 1000 standard condition milliliters per minute, and the flow rate of hydrogen is in the range of 0.1 standard condition liter per minute to 50 standard condition liter per minute within range.

In other embodiments, during the process of epitaxially growing the capping layer 110 , the gas used also includes other gases used in the prior art for epitaxially growing the capping layer 110 , which is not limited in the present invention.

Referring to FIG. 11 , after the cap layer 110 is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas 108 is passed into the epitaxial chamber. In this embodiment, the purge gas 108 is hydrogen gas, and the time for passing the hydrogen gas is from 1 minute to 2 minutes.

Specifically, the air pressure in the epitaxy chamber is reduced to a range of 1 torr to 20 torr, and the flow rate of the hydrogen gas 108 is in a range of 30 scl/min to 50 scl/min.

The gas pressure in the epitaxial chamber is reduced to a range of 1 Torr to 20 Torr, so that most of the reaction gases in the epitaxial chamber, such as silane, hydrogen chloride, dichlorodihydrosilane, etc., are discharged.

In addition, the hydrogen gas 108 is introduced for 1 minute to 2 minutes, to further push and discharge the reaction gas in the epitaxial chamber, and reduce the probability of spherical particle pollutants 106 being generated.

Furthermore, using hydrogen as the purge gas, the spherical particle pollutants 106 formed by germanium silicon remaining on the surface of the gate spacer 102 and the epitaxial barrier layer 104 after step S5 can be taken away from the gate spacer 102 and the epitaxial barrier layer 104 surfaces. The hydrogen gas can also reduce impurities such as oxides in the epitaxial chamber to water, further cleaning the surface of the gate structure 101 .

After steps S4, S5, and S6 in which the air pressure in the epitaxial chamber is reduced and hydrogen gas is introduced into the epitaxial chamber, the spherical particle pollutants 106 located on the surface of the gate sidewall 102 and the epitaxial barrier layer 104 are separated from the epitaxial chamber. Compared with the prior art, the cleanliness of the surface of the gate structure 101 is improved, which improves the performance of the transistor.

To test the effect of the transistor formation method of the present invention, the amount of spherical particle contamination on transistor gate structures in the entire wafer formed by the prior art and the transistor formation method of the present invention was measured.

Specifically, an electron microscope test was performed on the surface of the gate structure formed in the prior art, and the test result showed that the number of spherical particle pollutants on the surface of the gate structure in the entire wafer was 50.

In steps S4, S5, and S6, only the step of reducing the air pressure in the epitaxial chamber is performed without introducing hydrogen gas to form a gate structure, and the surface of the gate structure formed in this way is subjected to an electron microscope test, and the test result is that the entire wafer inner gate The number of spherical particulate contaminants on the surface of the pole structure was 24.

Finally, in steps S4, S5, and S6, the air pressure in the epitaxial chamber is reduced, and hydrogen gas is introduced into the epitaxial chamber to form a gate structure. Electron microscopy is performed on the surface of the gate structure formed in this way. The test result is that the entire wafer The number of spherical particle contaminants on the surface of the inner grid structure is 15.

Tests have shown that the process of reducing the air pressure in the epitaxial chamber in steps S4, S5, and S6 can improve the surface cleanliness of the finally formed gate structure, and the gate structure can be further improved by injecting hydrogen into the epitaxial chamber. Surface cleanliness.

It should be noted that, in this embodiment, the purge gas is hydrogen, and in other embodiments, the purge gas may also be an inert gas or a mixed gas of hydrogen and inert gas.

It should also be noted that, for the sake of saving production capacity, in other embodiments, only the step of reducing the air pressure in the epitaxial chamber may be performed, and it may also play a role in improving the cleanliness of the surface of the gate structure. The epitaxial layer can also be divided into the first epitaxial layer to the Nth epitaxial layer, N is an integer greater than or equal to 2, and the air pressure in the epitaxial chamber is reduced after each layer of the first epitaxial layer to the Nth epitaxial layer is formed And the process of introducing hydrogen.

It should also be noted that this embodiment takes a PMOS transistor as an example for illustration, and the transistor forming method of the present invention can also be applied to forming an NMOS transistor.

The similarities between the method of forming the NMOS transistor and the process of forming the PMOS transistor will not be repeated, and the difference from the process of forming the PMOS transistor is that in the process of forming the NMOS transistor, the groove formed in the substrate is U-shaped, The bulk silicon carbide layer is grown epitaxially in the groove, so that the bulk silicon carbide layer fills the groove, and then the process of reducing the pressure in the epitaxy chamber and introducing a purification gas (such as hydrogen), and then forming on the surface of the bulk silicon carbide layer For the capping layer, after the capping layer is formed, the process of reducing the air pressure in the epitaxial chamber and introducing a purge gas is performed.

Although the present invention is disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, so the protection scope of the present invention should be based on the scope defined in the claims.

Claims (8)

1. A method for forming a transistor, comprising: provide the substrate; forming a gate structure on the substrate; forming recesses in the substrate between the gate structures; forming an epitaxial layer in the groove; The steps of forming the epitaxial layer include: Epitaxial growth in the groove to form a seed layer; in the process of epitaxially growing the seed layer, the gases used include silane, hydrogen chloride, dichlorodihydrosilane, diborane, germane and hydrogen; After the seed layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber; Most of the reaction gases silane, hydrogen chloride, dichlorodihydrogen silicon and germane in the epitaxial chamber are discharged; Forming a bulk germanium silicon layer on the seed layer; in the process of forming the bulk germanium silicon layer, the gases used include silane, hydrogen chloride, dichlorodihydrosilane, diborane, germane, and hydrogen; After the bulk silicon germanium layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber; forming a capping layer over the bulk silicon germanium layer; After the capping layer is formed, the air pressure in the epitaxial chamber is reduced, and a purge gas is introduced into the epitaxial chamber. 2. The forming method according to claim 1, wherein the step of forming an epitaxial layer further comprises: After reducing the air pressure in the epitaxial chamber, a purge gas is introduced. 3. The forming method as claimed in claim 1, characterized in that, the flow rate of silane, hydrogen chloride, dichlorosilane, diborane, and germane ranges from 1 standard condition milliliter per minute to 1000 standard condition milliliters per minute Inside, the flow rate of hydrogen is in the range of 0.1 standard condition liter per minute to 50 standard condition liter per minute. 4. The forming method according to claim 1, wherein the step of forming part of the epitaxial layer in the groove comprises: making the air pressure in the epitaxial chamber range from 1 Torr to 100 Torr, and the temperature at 500 degrees Celsius to a range of 800 degrees Celsius. 5. The forming method according to claim 1, wherein the step of reducing the air pressure in the epitaxial chamber after forming part of the epitaxial layer comprises: reducing the air pressure in the epitaxial chamber from 1 torr to 100 torr to 1 torr to 20 torr range. 6 . The forming method according to claim 2 , wherein the step of introducing a purge gas into the epitaxy chamber comprises: introducing hydrogen gas into the epitaxy chamber. 7 . 7. The forming method according to claim 6, wherein the flow rate of the hydrogen gas is in the range of 30 standard liters per minute to 50 standard conditions liters per minute. 8. The forming method according to claim 6, characterized in that the time for feeding the hydrogen gas is in the range of 1 minute to 2 minutes.