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CN104730779A - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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Publication number
CN104730779A
CN104730779A CN201510184911.9A CN201510184911A CN104730779A CN 104730779 A CN104730779 A CN 104730779A CN 201510184911 A CN201510184911 A CN 201510184911A CN 104730779 A CN104730779 A CN 104730779A
Authority
CN
China
Prior art keywords
film transistor
chock insulator
insulator matter
tft
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510184911.9A
Other languages
Chinese (zh)
Inventor
朱亚文
莫再隆
樊浩原
胡伟
周全国
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201510184911.9A priority Critical patent/CN104730779A/en
Publication of CN104730779A publication Critical patent/CN104730779A/en
Priority to PCT/CN2015/091005 priority patent/WO2016165291A1/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13398Spacer materials; Spacer properties

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention relates to the technical field of display and discloses an array substrate, a display panel and a display device. A liquid crystal panel comprises an array substrate and a color-film substrate which are combined oppositely, and further comprises cushion arranged between the array substrate and the color-film substrate, and the array substrate comprises a thin-film transistor arranged on a substrate base plate. By setting projection of the thin-film transistor on the substrate base plate completely on the projection of the cushion on the substrate base plate, the cushion can protect the thin-film transistor from being irradiated by light rays reflected by the color-film substrate, performance of the thin-film transistor is improved and display quality of images of the display device is also improved.

Description

Array base palte, display panel and display device
Technical field
The present invention relates to display technique field, particularly relate to a kind of array base palte, display panel and display device.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor-Liquid Crystal Display, be called for short TFT-LCD) feature such as to have volume little, low in energy consumption, radiationless, developed rapidly in recent years, dominate in current flat panel display market.The agent structure of liquid crystal display is liquid crystal panel, and as shown in Figure 1, liquid crystal panel comprises the array base palte 10 and color membrane substrates 20 that arrange box, and is filled in the liquid crystal layer 40 between array base palte 10 and color membrane substrates 20.The box of liquid crystal panel is thick to be controlled mainly through chock insulator matter (PS) 30 ' be formed between array base palte 10 and color membrane substrates 20.Wherein, array base palte 10 is formed with data line and grid line (not shown), for limiting multiple pixel cell, each pixel cell comprises thin film transistor (TFT) 1 and pixel electrode 6, the pixel voltage that data line transmits transfers to pixel electrode 6 by thin film transistor (TFT) 1, for the formation of the electric field driving liquid crystal deflecting element, realize display.
Thin film transistor (TFT) 1 is semiconductor element, and its performance is easily subject to the impact of light.Material of the prior art inevitably has reflex to light.Therefore, in TFT-LCD, the light of the material film reflection on color membrane substrates 20 can be irradiated to the thin film transistor (TFT) 1 on array base palte 10, produces light leaky, affects the performance of thin film transistor (TFT) 1, cause the picture such as crosstalk, flicker bad.
Summary of the invention
The invention provides a kind of array base palte, display panel and display device, the light in order to solve color membrane substrates reflection can affect the problem of the performance of thin film transistor (TFT).
For solving the problems of the technologies described above, a kind of array base palte is provided in the embodiment of the present invention, comprise the thin film transistor (TFT) be arranged on underlay substrate, also comprise the chock insulator matter be arranged on thin film transistor (TFT), and the projection of described thin film transistor (TFT) on described underlay substrate falls into the projection of described chock insulator matter on described underlay substrate completely.
Array base palte as above, preferably, described chock insulator matter wraps described thin film transistor (TFT).
Array base palte as above, preferably, described chock insulator matter is made up of light-proof material.
A kind of display panel is also provided in the embodiment of the present invention, comprise the array base palte to box and color membrane substrates, and the chock insulator matter between described array base palte and color membrane substrates, described array base palte comprises the thin film transistor (TFT) be arranged on underlay substrate, the projection of described thin film transistor (TFT) on described underlay substrate falls into the projection of described chock insulator matter on described underlay substrate completely, and the light making described chock insulator matter can stop that described color membrane substrates reflects is irradiated to described thin film transistor (TFT).
Display panel as above, preferably, described chock insulator matter wraps described thin film transistor (TFT).
Display panel as above, preferably, described chock insulator matter is arranged on array base palte, and described chock insulator matter is arranged on color membrane substrates.
Display panel as above, preferably, described color membrane substrates is provided with black matrix, and the projection of described chock insulator matter on described color membrane substrates is completely by described black Matrix cover.
Display panel as above, preferably, described chock insulator matter is made up of light-proof material.
Display panel as above, preferably, the shape of described chock insulator matter is trapezoidal.
Also provide a kind of display device in the embodiment of the present invention, comprise display panel as above.
The beneficial effect of technique scheme of the present invention is as follows:
In technique scheme; liquid crystal panel comprises array base palte to box and color membrane substrates; and the chock insulator matter between described array base palte and color membrane substrates; described array base palte comprises the thin film transistor (TFT) be arranged on underlay substrate; the projection of chock insulator matter on described underlay substrate is fallen into completely by arranging the projection of described thin film transistor (TFT) on described underlay substrate; chock insulator matter can not irradiated by the light that color membrane substrates reflects by protective film transistor; improve the performance of thin film transistor (TFT), improve the picture display quality of display device.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 represents the structural representation of liquid crystal panel in prior art;
Fig. 2 represents the structural representation one of array base palte in the embodiment of the present invention;
Fig. 3 represents the structural representation two of array base palte in the embodiment of the present invention;
Fig. 4 represents the structural representation one of liquid crystal panel in the embodiment of the present invention;
Fig. 5 represents the structural representation two of liquid crystal panel in the embodiment of the present invention;
Fig. 6 represents the structural representation three of liquid crystal panel in the embodiment of the present invention;
Fig. 7 represents the structural representation four of liquid crystal panel in the embodiment of the present invention.
Embodiment
The invention provides a kind of liquid crystal panel, described liquid crystal panel comprises sealing to the color membrane substrates of box and array base palte, and the chock insulator matter between described color membrane substrates and array base palte, described chock insulator matter is for supporting the box of panel thick, and liquid crystal molecule is filled in the seal cavity between described color membrane substrates and array base palte.
Described array base palte comprises the thin film transistor (TFT) be arranged on underlay substrate, the projection of chock insulator matter on described underlay substrate is fallen into completely by arranging the projection of described thin film transistor (TFT) on described underlay substrate, the light making chock insulator matter can stop that color membrane substrates reflects is irradiated to described thin film transistor (TFT), improve the performance of thin film transistor (TFT), improve the picture display quality of display device.
Described chock insulator matter can be arranged on color membrane substrates, also can be arranged on array base palte.
In order to improve the anchorage force of chock insulator matter, the shape that can arrange chock insulator matter in actual fabrication technique is trapezoidal, and namely large top, the bottom of chock insulator matter is little.When chock insulator matter is arranged on color membrane substrates, the end that chock insulator matter and color membrane substrates fixedly contact is bottom, and relative the other end is top.When chock insulator matter is arranged on array base palte, the end that chock insulator matter and array base palte fixedly contact is bottom, and relative the other end is top.
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Shown in composition graphs 2 and Fig. 3, a kind of array base palte 10 is provided in the embodiment of the present invention, is specially thin-film transistor array base-plate.The chock insulator matter 30 that array base palte 10 comprises the first underlay substrate 100, is arranged on the thin film transistor (TFT) 1 on the first underlay substrate 100 and is arranged on thin film transistor (TFT) 1, and the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 falls into the projection of chock insulator matter 30 on the first underlay substrate 100 completely, thus chock insulator matter 30 can stop that the light injected from display side is irradiated to thin film transistor (TFT) 1, prevent thin film transistor (TFT) 1 from producing light leaky, improve the characteristic of thin film transistor (TFT) 1.
Preferably, chock insulator matter 30 wraps thin film transistor (TFT) 1, makes chock insulator matter 30 stop the better effects if of the light irradiate transistor 1 injected from display side, as shown in Figure 3.Be specially, chock insulator matter 30 is arranged on thin film transistor (TFT) 1, wraps thin film transistor (TFT) 1 bottom it.
In technique scheme, the projection of chock insulator matter on underlay substrate is fallen into completely by the projection of thin film transistor (TFT) on underlay substrate arranged on array base palte, chock insulator matter can be stopped, and the light injected from display side is irradiated to thin film transistor (TFT), prevent thin film transistor (TFT) from producing light leaky, improve the characteristic of thin film transistor (TFT).
Wherein, chock insulator matter 30 is preferably made up of light-proof material, has absorption to light.Relative to the chock insulator matter 30 be made up of light transmissive material, improve the barrier effectiveness to light.
In order to protective film transistor 1, usually can arrange protective seam 102 between thin film transistor (TFT) 1 and chock insulator matter 30, namely chock insulator matter 30 is arranged on protective seam 102.Protective seam 102 is insulating material, as silicon nitride, monox or silicon oxynitride, can be individual layer, bilayer or sandwich construction.Particularly, the material of protective seam 102 can be SiNx, SiOx or Si (ON) x.
In a concrete embodiment, protective seam 102 thinner thickness is set, only plays the effect of protective film transistor 1.Chock insulator matter 30 is arranged on protective seam 102, and chock insulator matter 30 wraps thin film transistor (TFT) 1, as shown in Figure 3.
In another particular embodiment of the invention, it is thicker that protective seam 102 thickness is set, not only arrives the effect of protective film transistor 1, also for providing flat surfaces.Chock insulator matter 30 is arranged on protective seam 102, and the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 falls into the projection of chock insulator matter 30 on the first underlay substrate 100 completely, as shown in Figure 2.Because protective seam 102 thickness is thicker, when certain box is thick, the height of chock insulator matter 30 can be reduced, shown in comparison diagram 2 and Fig. 3.
In above-mentioned two embodiments, chock insulator matter 30 is set and is made up of light-proof material.
In the embodiment of the present invention, the shape of chock insulator matter 30 is trapezoidal, and namely large top, the bottom of chock insulator matter 30 is little.
As shown in Figure 3, for bottom gate thin film transistor array base palte, the array base palte in the embodiment of the present invention specifically comprises:
First underlay substrate 100 is transparency carrier, as: glass substrate, quartz base plate, organic resin substrate;
Be arranged on many grid lines on the first underlay substrate 100 and a plurality of data lines (not shown), limit multiple pixel region;
Each pixel region comprises:
Be arranged on the thin film transistor (TFT) 1 on the first underlay substrate 100, thin film transistor (TFT) 1 comprises gate electrode 2, active layer 3, source electrode 4 and drain electrode 5, gate insulation layer 101 is provided with between gate electrode 2 and active layer 3, the material of gate insulation layer 101 can select oxide, nitride or oxides of nitrogen, can be individual layer, bilayer or sandwich construction.Particularly, the material of gate insulation layer 101 can be SiNx, SiOx or Si (ON) x.Source electrode 4 and drain electrode 5 are overlapped on active layer 3;
Pixel electrode 6, one end of pixel electrode 6 is between active layer 3 and drain electrode 5;
The protective seam 102 of cover film transistor 1 and pixel electrode 6, the thinner thickness of protective seam 102;
Be arranged on the chock insulator matter 30 on protective seam 102, the bottom of chock insulator matter 30 wraps thin film transistor (TFT) 1;
Be arranged on the public electrode 7 on protective seam 102, corresponding with the position of pixel electrode 6, public electrode 7 having multiple slit, driving electric field for coordinating to be formed with pixel electrode 6.
Certainly, array base palte 10 also can not comprise public electrode 6, arranges pixel electrode 6 and is positioned on protective seam 102, and by the via hole in protective seam 102 and drain electrode 5 in electrical contact.
Thin film transistor (TFT) 1 in the embodiment of the present invention is not limited to bottom gate thin film transistor, also can be top gate type thin film transistor or coplanar type thin film transistor (TFT).
Based on same inventive concept, shown in composition graphs 4-Fig. 7, a kind of display panel is also provided in the embodiment of the present invention, comprise sealing to the array base palte 10 of box and color membrane substrates 20, and the chock insulator matter 30 between array base palte 10 and color membrane substrates 20, the seal cavity between array base palte 10 and color membrane substrates 20 is filled with layer of liquid crystal molecule 40.Wherein, color membrane substrates 20 is positioned at the side of display frame.
Array base palte 10 comprises the thin film transistor (TFT) 1 be arranged on the first underlay substrate 100, and the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 falls into the projection of chock insulator matter 30 on the first underlay substrate 100 completely, thus chock insulator matter 30 can stop that the light that color membrane substrates 20 reflects is irradiated to thin film transistor (TFT) 1, prevent thin film transistor (TFT) 1 from producing light leaky, improve the characteristic of thin film transistor (TFT) 1.
Color membrane substrates 20 is provided with black matrix 8, the projection of described chock insulator matter 30 on described color membrane substrates 20 is completely by described black Matrix cover.
Wherein, the light that color membrane substrates 20 reflects is specially the second underlay substrate 200 of color membrane substrates 20, and is formed in the light of black matrix 8, filter layer 9 and flatness layer 201 reflection on the second underlay substrate 200.
In technique scheme, the projection of chock insulator matter on array base palte is fallen into completely by arranging the projection of thin film transistor (TFT) on array base palte, thus chock insulator matter can stop that the light that color membrane substrates reflects is irradiated to thin film transistor (TFT), prevent thin film transistor (TFT) from producing light leaky, improve the characteristic of thin film transistor (TFT), improve the display quality of picture.
Preferably, chock insulator matter 30 wraps thin film transistor (TFT) 1, makes chock insulator matter 30 stop the better effects if of the light irradiate transistor 1 that color membrane substrates 20 reflects, shown in composition graphs 4 and Fig. 5.Concrete, when chock insulator matter 30 is arranged on array base palte 10, the bottom of chock insulator matter 30 wraps thin film transistor (TFT) 1, and as shown in Figure 4, wherein, the bottom of chock insulator matter 30 is the end that chock insulator matter 30 fixedly contacts with array base palte 10.When chock insulator matter 30 is arranged on color membrane substrates 20, the top of chock insulator matter 30 wraps thin film transistor (TFT) 1, and as shown in Figure 5, wherein, the top of chock insulator matter 30 is the end of chock insulator matter 30 away from color membrane substrates 20.
Wherein, chock insulator matter 30 is preferably made up of light-proof material, has absorption to light.Relative to the chock insulator matter 30 be made up of light transmissive material, improve the barrier effectiveness to light.
In order to protective film transistor 1, usually can arrange protective seam 102 between thin film transistor (TFT) 1 and chock insulator matter 30, namely chock insulator matter 30 is arranged on protective seam 102.Protective seam 102 is insulating material, as silicon nitride, monox or silicon oxynitride, can be individual layer, bilayer or sandwich construction.Particularly, the material of protective seam 102 can be SiNx, SiOx or Si (ON) x.
In a concrete embodiment, protective seam 102 thinner thickness is set, only plays the effect of protective film transistor 1.Chock insulator matter 30 is made up of light-proof material, is arranged on the protective seam 102 of array base palte 10, and the bottom of chock insulator matter 30 wraps thin film transistor (TFT) 1, as shown in Figure 4.
In this embodiment, chock insulator matter 30 can also be arranged on color membrane substrates 20, and the top of chock insulator matter 30 wraps thin film transistor (TFT) 1, as shown in Figure 5.
In another particular embodiment of the invention, it is thicker that protective seam 102 thickness is set, not only plays the effect of protective film transistor 1, also for providing flat surfaces.Chock insulator matter 30 is made up of light-proof material, is arranged on the protective seam 102 of array base palte 10, and the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 falls into the projection of chock insulator matter 30 on the first underlay substrate 100 completely, as shown in Figure 6.Because protective seam 102 thickness is thicker, when certain box is thick, the height of chock insulator matter 30 can be reduced, shown in comparison diagram 4 and Fig. 6.
In this embodiment, chock insulator matter 30 can also be arranged on color membrane substrates 20, and the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 falls into the projection of chock insulator matter 30 on the first underlay substrate 100 completely, as shown in Figure 7.Those skilled in the art can meaninglessly release, now, the light that chock insulator matter 30 stops that color membrane substrates 20 reflects must be realized be irradiated to thin film transistor (TFT) 1 in order to better, needing, the projection of thin film transistor (TFT) 1 on the first underlay substrate 100 is set and falls into the top projection on first underlay substrate 100 of chock insulator matter 30 away from color membrane substrates 20 completely, as shown in Figure 7.
Because protective seam 102 provides flat surfaces, then the top flat of chock insulator matter 30 can be set, to simplify the manufacture craft of chock insulator matter 30.
Preferably, as shown in Figure 4, chock insulator matter 30 is arranged on array base palte 10, and the bottom arranging chock insulator matter 30 wraps thin film transistor (TFT).Because the surface of color membrane substrates 20 is smooth, effectively can improve the anchorage force of chock insulator matter 30, improve the stability that panel box is thick, alleviate the bad phenomenon of picture inequality, improve the display quality of picture.Simultaneously because the bottom of chock insulator matter 30 is maximum, better can obtain protective film transistor 1 and do not irradiated by the light that color membrane substrates 20 reflects.
As shown in Figure 4, the display panel in the embodiment of the present invention specifically comprises:
Seal the array base palte 10 to box and color membrane substrates 20, the seal cavity between array base palte 10 and color membrane substrates 20 is filled with layer of liquid crystal molecule 40;
Array base palte 10, comprising:
First underlay substrate 100 is transparency carrier, as: glass substrate, quartz base plate, organic resin substrate;
Be arranged on many grid lines and a plurality of data lines (not shown) on the first underlay substrate 100, limit multiple pixel region;
Each pixel region comprises:
Be arranged on the thin film transistor (TFT) 1 on the first underlay substrate 100, thin film transistor (TFT) 1 comprises gate electrode 2, active layer 3, source electrode 4 and drain electrode 5, gate insulation layer 101 is provided with between gate electrode 2 and active layer 3, the material of gate insulation layer 101 can select oxide, nitride or oxides of nitrogen, can be individual layer, bilayer or sandwich construction.Particularly, the material of gate insulation layer 101 can be SiNx, SiOx or Si (ON) x.Source electrode 4 and drain electrode 5 are overlapped on active layer 3;
Pixel electrode 6, one end of pixel electrode 6 is between active layer 3 and drain electrode 5;
The protective seam 102 of cover film transistor 1 and pixel electrode 6, the thinner thickness of protective seam 102;
Be arranged on the chock insulator matter 30 on protective seam 102, between array base palte 10 and color membrane substrates 20, the bottom of chock insulator matter 30 wraps thin film transistor (TFT) 1;
Be arranged on the public electrode 7 on protective seam 102, corresponding with the position of pixel electrode 6, public electrode 7 having multiple slit, driving electric field for coordinating to be formed with pixel electrode 6;
Color membrane substrates 20 comprises:
Second underlay substrate 200 is transparency carrier, as: glass substrate, quartz base plate, organic resin substrate;
Be arranged on the black matrix 8 on the second underlay substrate 200, corresponding with the grid line on array base palte 10 and linear position data, for limiting multiple pixel region;
Be positioned at the filter layer 9 of pixel region, such as: red filter layer, green color filter and blue color filter layer;
Cover the flatness layer 201 of black matrix 8 and filter layer 9.
Wherein, public electrode 6 can also be arranged on color membrane substrates 20, specifically can be arranged on flatness layer 201.And pixel electrode 6 be set be positioned on protective seam 102, by the via hole in protective seam 102 and drain electrode 5 in electrical contact.
Also provide a kind of display device in the embodiment of the present invention, comprise the display panel in the embodiment of the present invention, thus improve quality and the picture display quality of product.
Described display device also comprises backlight, and described display panel comprises array base palte and color membrane substrates, and described backlight is arranged on the array base palte side relative with color membrane substrates, and color membrane substrates is positioned at the side of display frame.
Described display device can be: any product or parts with Presentation Function such as Electronic Paper, mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.
In technique scheme; liquid crystal panel comprises array base palte to box and color membrane substrates; and the chock insulator matter between described array base palte and color membrane substrates; described array base palte comprises the thin film transistor (TFT) be arranged on underlay substrate; the projection of chock insulator matter on described underlay substrate is fallen into completely by arranging the projection of described thin film transistor (TFT) on described underlay substrate; chock insulator matter can not irradiated by the light that color membrane substrates reflects by protective film transistor; improve the performance of thin film transistor (TFT), improve the picture display quality of display device.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and replacement, these improve and replace and also should be considered as protection scope of the present invention.

Claims (10)

1. an array base palte, comprise the thin film transistor (TFT) be arranged on underlay substrate, it is characterized in that, also comprise the chock insulator matter be arranged on thin film transistor (TFT), and the projection of described thin film transistor (TFT) on described underlay substrate falls into the projection of described chock insulator matter on described underlay substrate completely.
2. array base palte according to claim 1, is characterized in that, described chock insulator matter wraps described thin film transistor (TFT).
3. array base palte according to claim 1 and 2, is characterized in that, described chock insulator matter is made up of light-proof material.
4. a display panel, comprise the array base palte to box and color membrane substrates, and the chock insulator matter between described array base palte and color membrane substrates, described array base palte comprises the thin film transistor (TFT) be arranged on underlay substrate, it is characterized in that, the projection of described thin film transistor (TFT) on described underlay substrate falls into the projection of described chock insulator matter on described underlay substrate completely, and the light making described chock insulator matter can stop that described color membrane substrates reflects is irradiated to described thin film transistor (TFT).
5. display panel according to claim 4, is characterized in that, described chock insulator matter wraps described thin film transistor (TFT).
6. display panel according to claim 5, is characterized in that, described chock insulator matter is arranged on array base palte or color membrane substrates.
7. display panel according to claim 4, is characterized in that, described color membrane substrates is provided with black matrix, and the projection of described chock insulator matter on described color membrane substrates is completely by described black Matrix cover.
8. the display panel according to any one of claim 4-7, is characterized in that, described chock insulator matter is made up of light-proof material.
9. the display panel according to any one of claim 4-7, is characterized in that, the shape of described chock insulator matter is trapezoidal.
10. a display device, is characterized in that, comprises the display panel described in any one of claim 4-9.
CN201510184911.9A 2015-04-17 2015-04-17 Array substrate, display panel and display device Pending CN104730779A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201510184911.9A CN104730779A (en) 2015-04-17 2015-04-17 Array substrate, display panel and display device
PCT/CN2015/091005 WO2016165291A1 (en) 2015-04-17 2015-09-29 Array substrate, display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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WO (1) WO2016165291A1 (en)

Cited By (7)

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CN105700219A (en) * 2015-12-18 2016-06-22 厦门天马微电子有限公司 A color filter and a manufacture method therefor, and a display panel
WO2016165291A1 (en) * 2015-04-17 2016-10-20 京东方科技集团股份有限公司 Array substrate, display panel and display device
CN106292102A (en) * 2016-08-12 2017-01-04 京东方科技集团股份有限公司 A kind of display floater and display
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