CN104717497A - JPEG_LS rule coding hardware achieving method based on scanning sequence changing - Google Patents
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Abstract
The invention relates to a JPEG_LS rule coding hardware achieving method based on scanning sequence changing. The method comprises the step of source image scanning, the step of quantization error generating and reconstruction value generating, the step of Columbus coding and the step of code stream outputting. According to the source image scanning, a source image is cached with six lines as a basic unit, a page turning RAM is used for achieving, every six lines serve as one page, writing and coding are alternately carried out on the current page and the next page, and data in the six lines in the cache are alternately coded from top to bottom and from left to right during coding; the quantization error generating and reconstruction value generating step is finished through a six-level assembly line. According to the JPEG_LS rule coding hardware achieving method based on scanning sequence changing, the processing speed is increased to six times of the processing speed of a standard JPEG_LS rule coding hardware achieving method, and a high-definition video can be easily compressed and processed frame by frame on a low-end and cheap FPGA.
Description
Technical field
The present invention relates to the implementation method of JPEG_LS standard on hardware in Image Compression field, particularly relate to a kind of JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency.
Background technology
JPEG_LS is the image near lossless compression standard that ISO/ITU formulates, being widely used in the image compression field of low compression ratio, with reference to shown in Fig. 1, is the schematic diagram of existing JPEG_LS standard scan order, wherein 11 represent the 1st row the 1st column data, and 6100 represent the 6th row the 100th column data.In Fig. 1, grey grid line part represents when encoding to the 3rd row the 5th column data 35, needs to use the 2nd row the 4th column data 24, the 2nd row the 5th column data 25, the reconstruction value of the 2nd row the 6th column data 26 and the reconstruction value of the 3rd row the 4th column data 34.The 1st row the 1st column data 11, the 1st row the 2nd column data 12, the 1st row the 3rd column data 13, the 1st row the 4th column data 14, the 1st row the 5th column data 15, the 1st row the 6th column data 16, the 1st row the 7th column data 17 is read in successively during scanning ... until this journey reads in and completely reads in the 2nd row data more successively, 3rd row data, 4th row data, 5th row data, the 6th row data.During due to its rule encoding, current pixel gradient calculation needs the reconstruction value using a pixel, namely there is the feedback of reconstruction value, therefore cannot realize with streamline, and the calculating of reconstruction value calculates through gradient calculation and quantification, state cache index value again, read for the status data of forecast value revision, predictor calculation and correction, predicated error calculate, quantization error generates and multiple step such as reconstruction value generation, thus it is slow to cause JPEG_LS to compress processing speed.
The conventional coded hardware implementation method of a kind of JPEG_LS is disclosed in the patent " the conventional coded hardware implementation method of JPEG_LS " (number of patent application 201210198818.X) of Xian Electronics Science and Technology University's application.The parameter Real-time Feedback that this patent application will be upgraded by level Four feedback loop, predicated error corrected parameter according to each feedback carries out predicting to prediction intermediate value and revises, to each clock cycle reasonable arrangement deal with data amount, thus reach optimization worst path, improve the object of processing speed.The deficiency of this technical scheme is only for parameter real-time update path, and does not process reconstruction value path, and therefore the method is for no problem during Lossless Compression, can run into reconstruction value path process problem slowly when near can't harm.
Reconstruction value critical path is optimized by the change of reconstruction value computing formula in the patent " the remote sensing image near-lossless compression hardware implementation method based on improving JPEG_LS algorithm " (number of patent application 200910082680.5) of Beijing Space Electromechanical Research Institute's application.But the method exists two problems, one is the twice that the difference of reconstruction value and actual value is less than or equal to NEAR value, and under namely same NEAR value, Enlarging-Errors is the twice of canonical algorithm; Two is that the method has circumvented reconstruction value critical path at coding side, and cannot solve the problem of reconstruction value critical path optimization in decoding end.Therefore this patent is applicable to the occasion of hardware encoding software decode, and is not suitable for encoding and decoding and all uses hard-wired occasion.
Summary of the invention
Because the defect existing for above-mentioned prior art, the object of the invention is to, a kind of JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency is provided, its processing speed is made to bring up to original 6 times, be easy to the process of compression frame by frame realizing HD video on the cheap FPGA of low side, and this invention is equally applicable to decoding end.
To achieve these goals, according to a kind of JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency that the present invention proposes, it comprises source images scanning step, quantization error generates and reconstruction value generation step, Columbus's coding step, code stream exports step, wherein said source images scanning carries out buffer memory to source images by 6 behavior elementary cell, realize with page turning RAM, every 6 behavior one pages, current page and time page are hocketed and writes and coding, by from left to right hocketing coding to the data of row each in 6 row caches from top to down during coding, described quantization error generates and reconstruction value generation step six level production lines realize.。
The present invention also can be applied to the following technical measures to achieve further.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, wherein said six level production lines comprise the following steps: the streamline first order: gradient calculation and gradient quantize, and this level production line completes fundamental forecasting simultaneously; The streamline second level: index value calculates; The streamline third level: status data reads; The streamline fourth stage: predicted value correction and predicated error calculate; Streamline level V: quantization error generates; The 6th grade, streamline: reconstruction value generates.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in the wherein said streamline first order, described gradient calculation is the difference of each neighborhood territory pixel reconstruction value calculating current pixel respectively, namely D1=Rd-Rb is calculated, D2=Rb-Rc, D3=Rc-Ra, wherein D1, D2, D3 represent gradient, and Ra, Rb, Rc, Rd represent the reconstruction value of the field pixel of current pixel Ix; Described gradient is quantified as quantizes to 9 intervals according to 8 gradient threshold values respectively gradient D1, D2, D3, and these 9 intervals represent to positive 4 with negative 4, and quantized result Q1, Q2, Q3 represent; This level production line completes fundamental forecasting simultaneously, generates fundamental forecasting value, namely as Rc >=max (Ra, Rb), and Px_bas=min (Ra, Rb); As Rc≤min (Ra, Rb), Px_bas=max (Ra, Rb); Except above-mentioned situation, Px_bas=Ra+Rb-Rc; Wherein Px_bas represents fundamental forecasting value.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in the wherein said streamline second level, index value Q is the absolute value of 81*Q1+9*Q2+Q3, and the scope of Q is 0 to 364.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in the wherein said streamline third level, index value Q as reading address, reading state value from status data buffer memory, state value wherein for forecast value revision represents with C [Q], and digital independent takies 1 clock cycle.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in the wherein said streamline fourth stage, the state value C [Q] for forecast value revision that the fundamental forecasting value Px_bas exported by the streamline first order and the streamline third level export carries out forecast value revision, predicted value modification method is as follows: when SIGN is+1, if Px_bas+C [Q] >255, then Px=255, otherwise, Px=Px_bas+C [Q]; When SIGN is-1, if Px_bas<C [Q], then Px=0, otherwise, Px=Px_bas-C [Q], wherein SIGN represents that 81*Q1+9*Q2+Q3's is positive and negative, and Px represents predicted value; Predicated error computational methods are as follows: when SIGN is+1, Errval=Ix-Px, and when SIGN is-1, Errval=Px-Ix, wherein Errval represents predicated error, and Ix represents current pixel value.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in wherein said streamline level V, quantization error generation method is as follows: Errval_NEAR=fix [(Errval+NEAR)/(2*NEAR+1)], Errval_NEAR represents the error amount after quantification, and NEAR is compression quality controlling elements; According to the parameter update mode that JPEG_LS standard specifies, upgrade the state value C [Q] being used for forecast value revision, and with index value Q for write address write state data buffer storage.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, in the 6th grade, wherein said streamline, the generation method of reconstruction value is first do multiplication with the error amount after quantification and 2*NEAR+1, then multiplication is done with SIGN, then addition is done with Px, wherein, Rx represents the reconstruction value of current pixel; This reconstruction value Rx feeds back to first order streamline or write reconstruction value buffer memory.
The aforesaid JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency, wherein said the data of row each in the 6 row caches coding that hockets to be realized in accordance with the following methods: from 6 row caches, read in the 1st row M row successively, the 2nd row M-2 row, the 3rd row M-4, the 4th row M-6 arrange, the data of the 5th row M-8 row and the 6th row M-10 row encode, if the columns of image to be encoded is N, then the scope of M is from 1 to N+10; ; When M-2, M-4, M-6, M-8, M-10 have the value being less than or equal to zero to occur, represent that from 6 row caches, not reading in data encodes, 1 clock cycle that interval is corresponding simultaneously; When M, M-2, M-4, M-6, M-8 have the value being greater than N to occur, represent that from 6 row caches, not reading in data encodes, 1 clock cycle that interval is corresponding simultaneously.
The present invention compared with prior art has obvious advantage and beneficial effect.By technique scheme, the JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency of the present invention, at least has following advantages:
One, the JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency of the present invention, processing speed brings up to six times of standard JPEG_LS rule encoding Hardware Implementation, experiment proves on the ECP3-LFE3-17EA device (FPGA) of lattice company, can only the high-definition image of process 5 frame 1920x1080 per second before improvement, and can process 30 frame per second after improving, be therefore easy to the process of compression frame by frame realizing HD video (1080P30) on the cheap FPGA of low side;
Two, the JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency of the present invention, the method is equally applicable to the processing speed improving decoding end.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing JPEG_LS standard scan order.
Fig. 2 be the present invention is based on scanning sequency change JPEG_LS rule encoding Hardware Implementation change after scanning sequency schematic diagram.
Fig. 3 is the schematic flow sheet that the present invention is based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes.
Fig. 4 is the current pixel neighborhood of a point point schematic diagram that the present invention is based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes.
Embodiment
For further setting forth the present invention for the technological means reaching predetermined goal of the invention and take and effect, below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of JPEG_LS rule encoding Hardware Implementation, step, structure, feature and effect thereof the detailed description of changing based on scanning sequency proposed according to the present invention.
With reference to shown in Fig. 3, be the schematic flow sheet that the present invention is based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, the present invention is that the JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency comprises source images scanning step, quantization error generates and reconstruction value generation step, Columbus's coding step, code stream export step.Wherein source images scanning step is realized by 6 row caches, and quantization error generates and reconstruction value generation step is realized by six level production lines, and Columbus's coding step and code stream are exported step and realized by JPEG_LS standard method.
In the present invention, source images scanning step is that source images is carried out to buffer memory by 6 behavior elementary cell and encodes.This step is realized by pair of pages RAM, carries out buffer memory with a pair of pages RAM to data, and every one page deposits 6 row data, page turning after 6 row data are filled with, and page turning signal triggers 6 row codings.Encode to the 2nd page when writing the 1st page, encode when writing the 2nd page to the 1st page, namely hocketing to current page and time page writes and coding.With reference to shown in Fig. 2, be the present invention is based on JPEG_LS rule encoding Hardware Implementation that scanning sequency changes change after scanning sequency schematic diagram.Wherein XX represents that this clock cycle does not read in data from 6 row caches and encodes, and 11 representatives are read in the 1st row the 1st column data 11 and encoded from 6 row caches, and 6100 representatives are read in the 6th row the 100th column data 6100 and encoded from 6 row caches.Grey grid line part represents when encoding to the 3rd row the 5th column data 35, needs to use the reconstruction value of the reconstruction value of the 2nd row the 4th column data 24, the reconstruction value of the 2nd row the 5th column data 25, the reconstruction value of the 2nd row the 6th column data 26 and the 3rd row the 4th column data 34.By from left to right hocketing coding to each column data of row each in 6 row caches from top to down during coding, preferably encode by the order shown in Fig. 2, illustrate the scanning sequency after changing below in conjunction with example, in this example, data are set to 100 row.
Scanning sequency after change from 6 row caches, first reads in the 1st row the 1st column data 11 encode, and 5 clock cycle do not read in data from 6 row caches and encode afterwards;
Secondly from 6 row caches, read in the 1st row the 2nd column data 12 to encode, 5 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 3rd column data 13 successively and the 2nd row the 1st column data 21 is encoded, 4 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 4th column data 14 successively, the 2nd row the 2nd column data 22 is encoded, 4 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 5th column data 15, the 2nd row the 3rd column data 23 and the 3rd row the 1st column data 31 successively encode, 3 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 6th column data 16, the 2nd row the 4th column data 24 and the 3rd row the 2nd column data 32 successively encode, 3 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 7th column data 17, the 2nd row the 5th column data 25, the 3rd row the 3rd column data 33 and the 4th row the 1st column data 41 successively encode, 2 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 8th column data 18, the 2nd row the 6th column data 26, the 3rd row the 4th column data 34 and the 4th row the 2nd column data 42 successively encode, 2 clock cycle do not read in data from 6 row caches and encode afterwards;
From 6 row caches, again read in the 1st row the 9th column data 19, the 2nd row the 7th column data 27, the 3rd row the 5th column data 35, the 4th row the 3rd column data 43 and the 5th row the 1st column data 51 successively encode, 1 clock cycle does not read in data from 6 row caches and encodes afterwards;
From 6 row caches, again read in the 1st row the 10th column data 110, the 2nd row the 8th column data 28, the 3rd row the 6th column data 36, the 4th row the 4th column data 44 and the 5th row the 2nd column data 52 successively encode, 1 clock cycle does not read in data from 6 row caches and encodes afterwards;
From 6 row caches, again read in the 1st row the 11st column data 111, the 2nd row the 9th column data 29, the 3rd row the 7th column data 37, the 4th row the 5th column data 45, the 5th row the 3rd column data 53 and the 6th row the 1st column data 61 successively encode;
From 6 row caches, again read in the 1st row the 12nd column data 112, the 2nd row the 10th column data 210, the 3rd row the 8th column data 38, the 4th row the 6th column data 46, the 5th row the 4th column data 54 and the 6th row the 2nd column data 62 successively encode;
From 6 row caches, again read in the 1st row the 13rd column data 113, the 2nd row the 11st column data 211, the 3rd row the 9th column data 39, the 4th row the 7th column data 47, the 5th row the 5th column data 55 and the 6th row the 3rd column data 63 successively encode;
Successively according to above-mentioned rule each column data of each row is afterwards read in and encoded, until
From 6 row caches, read in the 1st row the 100th column data 1100, the 2nd row the 98th column data 298, the 3rd row the 96th column data 396, the 4th row the 94th column data 494, the 5th row the 92nd column data 592 and the 6th row the 90th column data 690 successively encode;
1 clock cycle does not read in data from 6 row caches and encodes again, reads in the 2nd row the 99th column data 299, the 3rd row the 97th column data 397, the 4th row the 95th column data 495, the 5th row the 93rd column data 593 and the 6th row the 91st column data 691 afterwards successively and encode from 6 row caches;
1 clock cycle does not read in data from 6 row caches and encodes again, reads in the 2nd row the 100th column data 2100, the 3rd row the 98th column data 398, the 4th row the 96th column data 496, the 5th row the 94th column data 594 and the 6th row the 92nd column data 692 afterwards successively and encode from 6 row caches;
2 clock cycle do not read in data from 6 row caches and encode again, read in the 3rd row the 99th column data 399, the 4th row the 97th column data 497, the 5th row the 95th column data 595 and the 6th row the 93rd column data 693 afterwards successively and encode from 6 row caches;
2 clock cycle do not read in data from 6 row caches and encode again, read in the 3rd row the 100th column data 3100, the 4th row the 98th column data 498, the 5th row the 96th column data 596 and the 6th row the 94th column data 694 afterwards successively and encode from 6 row caches;
3 clock cycle do not read in data from 6 row caches and encode again, read in the 4th row the 99th column data 499 afterwards successively, the 5th row the 97th column data 597, the 6th row the 95th column data 695 encode from 6 row caches;
3 clock cycle do not read in data from 6 row caches and encode again, read in the 4th row the 100th column data 4100, the 5th row the 98th column data 598 and the 6th row the 96th column data 696 afterwards successively and encode from 6 row caches;
4 clock cycle do not read in data from 6 row caches and encode again, read in the 5th row the 99th column data 599 afterwards successively, the 6th row the 97th column data 697 is encoded from 6 row caches;
4 clock cycle do not read in data from 6 row caches and encode again, read in the 5th row the 100th column data 5100 afterwards successively, the 6th row the 98th column data 698 is encoded from 6 row caches;
5 clock cycle do not read in data from 6 row caches and encode again, read in the 6th row the 99th column data 699 afterwards successively and encode from 6 row caches;
5 clock cycle do not read in data from 6 row caches and encode again, read in the 6th row the 100th column data 6100 afterwards successively and encode from 6 row caches;
So far, to the end of scan of source images.
In the present invention, quantization error generation and reconstruction value generation step six level production lines realize.With reference to shown in Fig. 3, be the schematic flow sheet that the present invention is based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, wherein, the thick frame part of grey is six steps of six level production lines; With reference to shown in Fig. 4, it is the current pixel neighborhood of a point point schematic diagram that the present invention is based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes.
The streamline first order, gradient calculation and quantification: three gradients calculate simultaneously, respectively carry out 1 8bit subtraction and select 1 logic 1 time 9.
Gradient calculation mode is as follows: D1=Rd-Rb, D2=Rb-Rc, D3=Rc-Ra, uses the sign bit of 1 bit and the absolute value representation of 8 bits when realizing respectively; Wherein Ra, Rb, Rc, Rd are the reconstruction value of the field pixel of current pixel Ix, and D1, D2, D3 represent three gradients respectively;
The Ra=Rc when calculating the 1st arranges; When calculating other row, Ra is the reconstruction value of its left neighborhood territory pixel that six level production lines export; When calculating the 1st row of every 6 row, from reconstruction value buffer memory, reading in the reconstruction value Rb of lastrow, Rc, Rd, namely go up the reconstruction value of the 6th row of 6 row; During current 6 behavior first 6 row, the reconstruction value of lastrow is defaulted as full 0; When calculating the 2 to the 6 row of every 6 row, the reconstruction value that Rb, Rc, Rd are respectively its corresponding neighborhood territory pixel that six level production lines export is deposited 13,7,1 clock cycle and is obtained; When calculating the 6th row, the reconstruction value of this row write reconstruction value buffer memory is convenient to use when calculating next 6 row.
Gradient quantizes according to 8 gradient threshold values, gradient to be quantized to 9 intervals exactly, and these 9 intervals represent to positive 4 with negative 4, and quantized result Q1, Q2, Q3 represent, preferred gradient quantization method is as follows:
Wherein, i=1 23, the sign bit of Q1, Q2, Q3 represents with Q1s, Q2s, Q3s, the absolute value of Q1, Q2, Q3 represents with Q1d, Q2d, Q3d of 3bit, NEAR is compression quality controlling elements, T1, T2, T3 are gradient thresholding constant, meet T1<T2<T3, and NEAR ,-NEAR, T1 ,-T1, T2 ,-T2, T3 ,-T3 form 8 gradient threshold values jointly.
Carry out the calculating of fundamental forecasting value, perform 1 8bit addition, 1 8bit subtraction, compare for 1 time and 1 one-out-three logic, preferred computational methods are as follows simultaneously:
Wherein Px_bas represents fundamental forecasting value.
The streamline second level, index value calculates: by carrying out three sub-additions or subtraction, 1 one-out-three logic and selecting for 1 time four a logic to obtain index value Q.
Index value Q equals the absolute value of 81*Q1+9*Q2+Q3, and wherein the scope of Q is 0 ~ 364, represents with 9bit; Preferred 81*Q1 Q1d & " 000 " & Q1d+ " 00 " & Q1d & " 0000 " represent, 9*Q2 with " 000 " & Q2d & Q2d represents, the sign bit of 81*Q1+9*Q2+Q3 represents with SIGN, and computational methods are as follows:
The streamline third level, status data reads: index value Q as reading address, reading state value from status data buffer memory, and the state value wherein for forecast value revision represents with C [Q], and data cached RAM realizes, and takies 1 clock cycle herein.
The streamline fourth stage, predicted value correction and predicated error calculate: carry out 1 8bit addition or subtraction and 2 alternative logics.
The state value C [Q] for forecast value revision that the fundamental forecasting value Px_bas exported by the streamline first order and the streamline third level export carries out forecast value revision, and preferred predicted value modification method is as follows:
Wherein Px represents predicted value.
Predicated error calculates, and perform 1 8bit subtraction and 1 alternative logic, preferred computational methods are as follows:
Wherein Errval represents predicated error, and Ix represents current pixel value.
Streamline level V, predicated error quantizes: carry out 1 8bit addition and 1 8bit division.
With 8 divided by 8 divider realize, result rounds, and computational methods are as follows:
Errval_NEAR=fix((Errval+NEAR)/(2*NEAR+1))
Wherein Errval_NEAR represents predicated error quantized value, and NEAR is compression quality controlling elements, and after compression quality setting, 2*NEAR+1 is constant, does not take computing time.
The status data simultaneously carried out upgrades and buffer memory write processes by canonical algorithm.
The 6th grade, streamline, reconstruction value generates: carry out 1 8bit multiplication and 1 8bit addition, namely first does multiplication with the error amount after quantification and 2*NEAR+1, then does multiplication with SIGN, then do addition with Px, as follows:
Rx=Px+SIGN*Errval_NEAR*(2*NEAR+1))
Rx represents the reconstruction value of current pixel; This reconstruction value Rx feeds back to first order streamline or write reconstruction value buffer memory.
In the present invention, Columbus's coding step and code stream output step process by JPEG_LS canonical algorithm, and therefore the present invention does not set forth.
This method is applied on the ECP3-LFE3-17EA device (FPGA) of lattice company, can only the high-definition image of process 5 frame 1920x1080 per second before improvement, and can process 30 frame per second after improving, processing speed brings up to six times of standard JPEG_LS rule encoding Hardware Implementation, and therefore the method is easy to the process of compression frame by frame realizing HD video (1080P30) on the cheap FPGA of low side; In addition, the method is also applicable to decoding end.
Although the present invention discloses as above with preferred embodiment, so and be not used to limit scope of the invention process, the simple equivalence change done according to claims of the present invention and description with modify, still belong in the scope of technical solution of the present invention.
Claims (9)
1., based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, comprise source images scanning step, quantization error generates and reconstruction value generation step, Columbus's coding step, code stream export step, it is characterized in that:
Described source images scanning carries out buffer memory to source images by 6 behavior elementary cell, realize with page turning RAM, every 6 behavior one pages, to hocket write and coding to current page and time page, to hocket coding during coding by the data from left to right respectively arranged row each in 6 row caches from top to down;
Described quantization error generates and reconstruction value generation step six level production lines realize.
2., as claimed in claim 1 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that described six level production lines comprise the following steps:
The streamline first order: gradient calculation and gradient quantize, and this level production line completes fundamental forecasting simultaneously;
The streamline second level: index value calculates;
The streamline third level: status data reads;
The streamline fourth stage: predicted value correction and predicated error calculate;
Streamline level V: quantization error generates;
The 6th grade, streamline: reconstruction value generates.
3. as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that in the described streamline first order, described gradient calculation is the difference of each neighborhood territory pixel reconstruction value calculating current pixel respectively, namely D1=Rd-Rb is calculated, D2=Rb-Rc, D3=Rc-Ra, wherein D1, D2, D3 represent gradient, and Ra, Rb, Rc, Rd represent the reconstruction value of the field pixel of current pixel Ix;
Described gradient is quantified as quantizes to 9 intervals according to 8 gradient threshold values respectively gradient D1, D2, D3, and these 9 intervals represent to positive 4 with negative 4, and quantized result Q1, Q2, Q3 represent;
This level production line completes fundamental forecasting simultaneously, generates fundamental forecasting value, namely as Rc >=max (Ra, Rb), and Px_bas=min (Ra, Rb); As Rc≤min (Ra, Rb), Px_bas=max (Ra, Rb); Except above-mentioned situation, Px_bas=Ra+Rb-Rc; Wherein Px_bas represents fundamental forecasting value.
4., as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that, in the described streamline second level, index value Q is the absolute value of 81*Q1+9*Q2+Q3, the scope of Q is 0 to 364.
5. as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that in the described streamline third level, index value Q as reading address, reading state value from status data buffer memory, state value wherein for forecast value revision represents with C [Q], and digital independent takies 1 clock cycle.
6. as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that in the described streamline fourth stage, the state value C [Q] for forecast value revision that the fundamental forecasting value Px_bas exported by the streamline first order and the streamline third level export carries out forecast value revision, predicted value modification method is as follows: when SIGN is+1, if Px_bas+C [Q] >255, then Px=255, otherwise, Px=Px_bas+C [Q]; When SIGN is-1, if Px_bas<C [Q], then Px=0, otherwise, Px=Px_bas-C [Q], wherein SIGN represents that 81*Q1+9*Q2+Q3's is positive and negative, and Px represents predicted value;
Predicated error computational methods are as follows: when SIGN is+1, Errval=Ix-Px, and when SIGN is-1, Errval=Px-Ix, wherein Errval represents predicated error, and Ix represents current pixel value.
7. as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that in described streamline level V, quantization error generation method is as follows: Errval_NEAR=fix [(Errval+NEAR)/(2*NEAR+1)], Errval_NEAR represents the error amount after quantification, and NEAR is compression quality controlling elements;
According to the parameter update mode that JPEG_LS standard specifies, upgrade the state value C [Q] being used for forecast value revision, and with index value Q for write address write state data buffer storage.
8. as claimed in claim 2 based on the JPEG_LS rule encoding Hardware Implementation that scanning sequency changes, it is characterized in that in the 6th grade, described streamline, the generation method of reconstruction value is first do multiplication with the error amount after quantification and 2*NEAR+1, then multiplication is done with SIGN, then addition is done with Px, wherein, Rx represents the reconstruction value of current pixel; This reconstruction value Rx feeds back to first order streamline or write reconstruction value buffer memory.
9. the JPEG_LS rule encoding Hardware Implementation changed based on scanning sequency as described in any one of claim 1 to 8, is characterized in that described realizing in the following order the data of row each in the 6 row caches coding that hockets:
From 6 row caches, read in the 1st row M row, the 2nd row M-2 row, the 3rd row M-4 successively, the 4th row M-6 arranges, the 5th row M-8 arranges and the data of the 6th row M-10 row are encoded, if the columns of image to be encoded is N, then the scope of M is from 1 to N+10;
When M-2, M-4, M-6, M-8, M-10 have the value being less than or equal to zero to occur, represent that from 6 row caches, not reading in data encodes, 1 clock cycle that interval is corresponding simultaneously;
When M, M-2, M-4, M-6, M-8 have the value being greater than N to occur, represent that from 6 row caches, not reading in data encodes, 1 clock cycle that interval is corresponding simultaneously.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105657427A (en) * | 2016-01-25 | 2016-06-08 | 成都国铁电气设备有限公司 | High-definition image compression method and system suitable for catenary |
| CN105898305A (en) * | 2016-04-12 | 2016-08-24 | 上海兆芯集成电路有限公司 | Image compression and decompression method based on JPEG-LS |
| CN107181943A (en) * | 2017-04-18 | 2017-09-19 | 华中科技大学 | A kind of satellite sequence Lossless Image Compression Algorithm method and system based on Mixed Entropy Coding |
| CN110447222A (en) * | 2017-03-27 | 2019-11-12 | 索尼公司 | Image-forming component and imaging device and method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101132531A (en) * | 2006-08-21 | 2008-02-27 | 美国西门子医疗解决公司 | Fast JPEG-LS based compression method for medical images |
| US20090135921A1 (en) * | 2007-11-28 | 2009-05-28 | Shawmin Lei | Two-Dimensional DPCM with PCM Escape Mode |
| CN101534373A (en) * | 2009-04-24 | 2009-09-16 | 北京空间机电研究所 | Hardware Implementation Method of Near Lossless Compression of Remote Sensing Image Based on Improved JPEG-LS Algorithm |
| CN102724506A (en) * | 2012-06-06 | 2012-10-10 | 西安电子科技大学 | JPEG (joint photographic experts group)_LS (laser system) general coding hardware implementation method |
| CN102970531A (en) * | 2012-10-19 | 2013-03-13 | 西安电子科技大学 | Method for implementing near-lossless image compression encoder hardware based on joint photographic experts group lossless and near-lossless compression of continuous-tone still image (JPEG-LS) |
-
2013
- 2013-12-13 CN CN201310685220.8A patent/CN104717497A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101132531A (en) * | 2006-08-21 | 2008-02-27 | 美国西门子医疗解决公司 | Fast JPEG-LS based compression method for medical images |
| US20090135921A1 (en) * | 2007-11-28 | 2009-05-28 | Shawmin Lei | Two-Dimensional DPCM with PCM Escape Mode |
| CN101534373A (en) * | 2009-04-24 | 2009-09-16 | 北京空间机电研究所 | Hardware Implementation Method of Near Lossless Compression of Remote Sensing Image Based on Improved JPEG-LS Algorithm |
| CN102724506A (en) * | 2012-06-06 | 2012-10-10 | 西安电子科技大学 | JPEG (joint photographic experts group)_LS (laser system) general coding hardware implementation method |
| CN102970531A (en) * | 2012-10-19 | 2013-03-13 | 西安电子科技大学 | Method for implementing near-lossless image compression encoder hardware based on joint photographic experts group lossless and near-lossless compression of continuous-tone still image (JPEG-LS) |
Non-Patent Citations (2)
| Title |
|---|
| 崔倩: "JPEG-LS码率控制算法研究", 《中国优秀硕士学位论文全文数据库-信息科技辑》 * |
| 王海荣: "JPEG-LS多路并行译码算法的硬件实现", 《中国优秀硕士学位论文全文数据库-信息科技辑》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105657427A (en) * | 2016-01-25 | 2016-06-08 | 成都国铁电气设备有限公司 | High-definition image compression method and system suitable for catenary |
| CN105898305A (en) * | 2016-04-12 | 2016-08-24 | 上海兆芯集成电路有限公司 | Image compression and decompression method based on JPEG-LS |
| CN105898305B (en) * | 2016-04-12 | 2019-02-15 | 上海兆芯集成电路有限公司 | Compression of images and decompression method based on lossless Joint Photographic Experts Group's format |
| CN110447222A (en) * | 2017-03-27 | 2019-11-12 | 索尼公司 | Image-forming component and imaging device and method |
| CN107181943A (en) * | 2017-04-18 | 2017-09-19 | 华中科技大学 | A kind of satellite sequence Lossless Image Compression Algorithm method and system based on Mixed Entropy Coding |
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