CN104698970A - signal processing device applied to time-varying signal - Google Patents

Abstract

The invention discloses a signal processing device applied to time-varying signals, which comprises: an adder for receiving a first input signal and an integrated signal and generating a first output signal, wherein the first output signal is equal to the first input signal and subtracted from the integrated signal; and a weight integrator receiving the first output signal and generating the integrated signal; wherein the weight integrator further comprises: a weight function generator for receiving the first output signal and generating a weight function when the first output signal passes near a zero crossing point; a multiplier for multiplying the weighting function by the first output signal; and an accumulator connected to the multiplier for accumulating the result of the weight function multiplied by the first output signal and generating the integral signal accordingly. The invention can eliminate the DC offset in the photoelectric signal.

Description

Signal processing device for time-varying signals

technical field

The present invention relates to a signal processing device, and in particular to a signal processing device used in a servo motor system (servomotor system) for time-varying signals.

Background technique

As we all know, the servo motor system can accurately control the rotation speed of the servo motor, and has the ability to accelerate, decelerate, and reverse quickly. That is, since the servo motor system has the capability of precise position control and speed control, it has been widely used in various automation industries and precision machining fields. For example, a robotic arm, or a mechanical working platform, etc.

Please refer to FIG. 1A , which shows a schematic diagram of a servo motor system. The servo motor system includes: a command device 110 , a micro controller (micro controller) 120 , a servo motor 130 , and an optical encoder (optical encoder) 140 .

The command device 110 outputs command pulses according to the user's operation to control the rotation speed and steering of the servo motor 130 . Furthermore, the photoelectric encoder 140 generates feedback pulses to the microcontroller 120 according to the rotation speed and direction of the servo motor 130 . The microcontroller 120 generates a driving pulse to the servo motor 130 according to the command pulse and the feedback pulse.

Wherein, the photoelectric encoder 140 can convert the displacement on the shaft of the servo motor 130 into a feedback pulse, and according to the feedback pulse output by the photoelectric encoder 140 , the microcontroller 120 can know the rotation speed, direction, and position of the servo motor 130 .

Taking a rotary optical encoder as an example, the photoelectric encoder 140 includes a light source 142 , a photo detector 146 , and a disk 148 . The turntable 148 is coupled to the rotating shaft of the servo motor 130 and can rotate with the servo motor 130 . Furthermore, light from the light emitter 142 is received by the light detector 146 after passing through a grating on the turntable 148 . According to the shape of the grating on the turntable 148, the photodetector 146 can generate two photoelectronic signals (photoelectronic signal) A, B. The internal circuit of the photoelectric encoder 140 can also generate a feedback pulse to the microcontroller 120 according to the two photoelectric signals A and B.

Please refer to FIG. 1B , which shows a schematic diagram of photoelectric signals A and B. Referring to FIG. Generally speaking, the higher the frequency of the two photoelectric signals A, B, the faster the rotation speed of the servo motor 130; and the phase difference of 90 degrees will be maintained between the two photoelectric signals A, B. For example, when the phase of the B photoelectric signal is 90 degrees ahead of the phase of the A photoelectric signal, the servo motor rotates in the first direction (for example, clockwise); when the phase of the A photoelectric signal is 90 degrees ahead of the phase of the B photoelectric signal, the servo motor Rotate in a second direction (eg, counterclockwise).

As shown in FIG. 1B , during the time interval I, the frequencies of the two photoelectric signals A and B are getting higher and higher, and the phase of the B photoelectric signal is ahead of the phase of the A photoelectric signal by 90 degrees, so the servo motor 130 rotates in the first direction And the speed is getting faster and faster. In the time interval II, the frequencies of the two photoelectric signals A and B are getting lower and lower, and the phase of the B photoelectric signal is ahead of the phase of the A photoelectric signal by 90 degrees, so the servo motor 130 rotates in the first direction and the speed becomes slower and slower until it stops spinning.

In time interval III, the frequency of the two photoelectric signals A and B is getting higher and higher, and the phase of the A photoelectric signal is 90 degrees ahead of the phase of the B photoelectric signal, so the servo motor 130 rotates in the second direction and the speed becomes faster and faster . In the time interval IV, the frequencies of the two photoelectric signals A and B are getting lower and lower, and the phase of the A photoelectric signal is ahead of the phase of the B photoelectric signal by 90 degrees, so the servo motor 130 rotates in the second direction and the speed becomes slower and slower until it stops spinning.

Since the acceleration, deceleration or reverse rotation of the servo motor 130 will cause changes in the frequency and phase of the two photoelectric signals A and B, the two photoelectric signals A and B are both time-varying signals. Furthermore, due to temperature or environmental factors during the photoelectric conversion process, the two photoelectric signals A and B will have a DC offset (DC offset), amplitude attenuation, and the phase difference will not be maintained at 90 degrees. The problem is that the feedback pulse cannot represent the correct position and rotational speed of the servo motor 130 .

Contents of the invention

In view of the problems existing in the prior art, the object of the present invention is to provide a signal processing device applied to time-varying signals, including: a first adder, receiving a first input signal and a first integrated signal, and generating a a first output signal, wherein the first output signal is equal to the first input signal minus the first integrated signal; and a first weighted integrator, receiving the first output signal and generating the first integrated signal; wherein, the The first weight integrator also includes: a first weight function generator that receives the first output signal and generates a first weight function when the first output signal passes through a zero-crossing point; a first multiplier, multiplying the first weight function by the first output signal; and a first accumulator connected to the first multiplier for accumulating the result of multiplying the first weight function by the first output signal, and according to The first integrated signal is generated.

The object of the present invention is to also provide a signal processing device applied to time-varying signals, which receives a first input signal and a second input signal, and directly uses the first input signal as a first output signal, and the signal processing The device includes: a first adjustable gain amplifier, adjusting the gain of the first adjustable gain amplifier according to a first integral signal, receiving the first input signal and generating the first input signal after gain adjustment; a first an adder that subtracts the gain-adjusted first input signal from the second input signal to generate a second output signal; and a weight correlator that receives the first output signal and the second output signal and generates the first Integral signal; wherein, the weight correlator includes: a weight function generator, receiving the first output signal and the second output signal, and when the first output signal and the second output signal pass through a zero-crossing point A weight function is generated; a first multiplier multiplies the first output signal by the second output signal to generate a first result; a second multiplier multiplies the weight function by the first result to generate a a second result; and a first accumulator connected to the second multiplier for accumulating the second result and generating the first integral signal accordingly.

The purpose of the present invention is to also provide a signal processing device applied to time-varying signals, which receives a first input signal and a second input signal. The signal processing device includes: a first adjustable gain amplifier, according to a first Integrating the signal to adjust the gain of the first adjustable gain amplifier, receiving the first input signal and generating a first output signal; a first magnitude detector, receiving the first output signal, generating a first magnitude signal; The first adder subtracts the first magnitude signal from a reference value to generate a first sampled signal; and a first weighted integrator receives the first input signal, the second input signal and the first sampled signal , and generate the first integral signal; wherein, the first weight integrator includes: a first weight function generator that receives the first input signal and the second input signal, and generates the first input signal and the second input signal A first weight function is generated when two input signals pass through a zero-crossing point; a first multiplier multiplies the first sampled signal by the first weight function; and a first accumulator is connected to the first multiplier The device is used for accumulating the result of multiplying the first sampling signal by the first weighting function, and generating the first integrated signal accordingly.

The beneficial effect of the present invention is that a signal processing device applied to time-varying signals of the present invention is applied to two time-varying photoelectric signals output by a photoelectric encoder in a servo motor system. Moreover, using the present invention, the DC offset in the photoelectric signal can be eliminated, the phase difference between the two photoelectric signals can be fixed, and the amplitude of the two photoelectric signals can be maintained.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:

Description of drawings

FIG. 1A shows a schematic diagram of a servo motor system.

FIG. 1B shows a schematic diagram of photoelectric signals A and B.

FIG. 2 shows a signal processing device of the present invention applied to time-varying signals.

3A to 3C are schematic diagrams of the DC offset adjustment circuit and related signals.

4A to 4C are schematic diagrams of the phase adjustment circuit and its related signals.

5A to 5B are schematic diagrams of the amplitude adjustment circuit and its related signals.

Wherein, the reference signs are explained as follows:

110: command device

120: microcontroller

130: Servo motor

140: Photoelectric encoder

142: Optical transmitter

146: Light detector

148: turntable

210: DC offset adjustment unit

220: Phase adjustment unit

230: Amplitude adjustment unit

300: DC offset adjustment circuit

310: Type 1 Weighted Integrator

312, 482, 561: Accumulator

316, 471～472, 541: multiplier

318, 461, 551: Weight function generator

320, 420, 531: adder

410, 511: adjustable gain amplifier

450: Weight Correlator

500: Amplitude adjustment circuit

521: Size detector

580: Type II Weighted Integrator

Detailed ways

Please refer to FIG. 2 , which shows a signal processing device applied to time-varying signals according to the present invention. The signal processing device of the present invention can be used in a photoelectric encoder to receive the time-varying photoelectric signals Ain and Bin output by the photodetector. The signal processing device includes: a DC offset (DC offset) adjustment unit 210 , a phase adjustment unit 220 , and an amplitude adjustment unit 230 . Wherein, the DC offset adjustment unit 210 receives the first photoelectric signal Ain and the second photoelectric signal Bin, and after eliminating the DC offset in the first photoelectric signal Ain and the second photoelectric signal Bin, outputs the first adjustment signal A1 and the second photoelectric signal A1. Adjust signal B1. Furthermore, the phase adjustment unit 220 receives the first adjustment signal A1 and the second adjustment signal B1, and controls the phase difference between the first adjustment signal A1 and the second adjustment signal B1 to be maintained at a fixed 90 degrees, and then outputs the third adjustment. The signal A2 and the fourth adjustment signal B2. Moreover, the amplitude adjustment unit 230 receives the third adjustment signal A2 and the fourth adjustment signal B2, and controls the amplitudes of the third adjustment signal A2 and the fourth adjustment signal B2 to be a fixed value, and outputs the first output signal Aout and the second output signal Aout. Output signal Bout. The action principles of all adjustment units are introduced in sequence below.

Please refer to FIG. 3A to FIG. 3C , which are schematic diagrams of the DC offset adjustment circuit and related signals. Wherein, the DC offset adjustment unit 210 may be composed of two DC offset adjustment circuits 300, which respectively use the first photoelectric signal Ain and the second photoelectric signal Bin as the input signal Xin.

As shown in FIG. 3A , the DC offset adjustment circuit 300 includes an adder 320 and a first type weighting integrator (first type weighting integrator) 310 . The adder 320 subtracts the integral signal Xw from the input signal Xin to generate an output signal Xo. Furthermore, the output signal Xo is input to the first-type weight integrator 310 to generate the integrated signal Xw.

The first type weight integrator 310 includes a multiplier 316 , a weighting function generator 318 and an accumulator 312 . According to an embodiment of the present invention, when the output signal Xo passes near a zero crossing point, the weight function generator 318 outputs a weight function. Furthermore, the multiplier 316 inputs the result of multiplying the output signal Xo by the weight function into the accumulator 312 . The accumulator 312 accumulates the result of the multiplier 316 and becomes the integrated signal Xw.

Furthermore, since the DC offset adjustment unit 210 is composed of two DC offset adjustment circuits, another embodiment of the input of the weight function generator 318 can be provided by the output signal of another DC offset adjustment circuit.

Furthermore, another embodiment of the input of the weight function generator 318 can be provided by output signals of two DC offset adjustment circuits simultaneously.

According to an embodiment of the present invention, the weighting function may be a pulse train function. 3B and 3C below use the pulse sequence function as the weight function to illustrate the operating principle of the DC offset adjustment unit 210 .

As shown in FIG. 3B , at each zero-crossing point of the output signal Xo, the weight function generator 318 outputs a pulse sequence function. Furthermore, the multiplier 316 multiplies the value of the output signal Xo by the pulse train function, that is, the area shown by the dotted line in FIG. 3B . That is, the negative period of the output signal Xo multiplied by the pulse sequence function results in negative values of n1, n2, n3...; the positive period of the output signal Xo multiplied by the pulse sequence function results in positive values of p1, p2, p3... .

In practical application, the multiplier 316 can be implemented by a programmable counter (programmable counter), that is, when each zero-cross point of the output signal Xo of the DC offset adjustment circuit starts counting to a predetermined number, the accumulator 312 stops. add up.

Assume that the input signal Xin has a positive DC offset, so the output signal Xo also has a positive DC offset dc. Since the output signal Xo has a positive DC offset dc, the areas of p1, p2, p3 are greater than the areas of n1, n2, n3. Therefore, after the accumulator 312 accumulates the result output from the multiplier 316 , a positive integrated signal Xw is generated. Therefore, as shown in FIG. 3B , the DC offset dc of the positive value of the output signal Xo will become smaller and smaller.

As shown in FIG. 3C , when the DC offset dc of the output signal Xo is eliminated (ie, the DC offset dc is reduced to 0), the areas of p1 , p2 , p3 are equal to the areas of n1 , n2 , n3 . At this time, after the adder 320 subtracts the integral signal Xw from the input signal Xin, an output signal Xo with the DC offset dc eliminated will be generated.

Similarly, when the input signal Xin has a negative DC offset, the output signal Xo also has a negative DC offset dc. At this time, the accumulator 312 will generate a negative integration signal Xw, and make the DC offset dc of the output signal Xo gradually increase from a negative value to zero.

In other words, after the first photoelectric signal Ain is input to the DC offset adjustment circuit 300, its output signal Xo is the first adjustment signal A1 with the DC offset dc eliminated; similarly, the second photoelectric signal Bin is input to the DC offset The shift adjustment circuit 300, the output signal Xo is the second adjustment signal B1 with the DC offset dc eliminated.

Furthermore, according to another embodiment of the present invention, the weight function may also be a natural exponential decay function. Furthermore, those skilled in the art should know that subtraction is also a kind of addition. That is, the adder can also perform subtraction.

Please refer to FIG. 4A , which is a schematic diagram of the phase adjustment unit. The phase adjustment unit 220 includes an adjustable gain amplifier 410 , an adder 420 , and a weighting correlator 450 . Wherein, the phase difference between the first input signal Pin and the second input signal Qin is about 90 degrees. Moreover, the first input signal Pin is identical to the first output signal Po, and the phase difference between the first output signal Po and the second output signal Qo is 90 degrees. Wherein, the first adjustment signal A1 and the second adjustment signal B1 output by the aforementioned DC offset adjustment unit 210 can be used as the first input signal Pin and the second input signal Qin of the phase adjustment unit 220 . Alternatively, the second adjustment signal B1 and the first adjustment signal A1 can serve as the first input signal Pin and the second input signal Qin of the phase adjustment unit 220 . The first output signal Po and the second output signal Qo of the phase adjustment unit 220 can be regarded as the third adjustment signal A2 and the fourth adjustment signal B2 .

Furthermore, the weight correlator 450 outputs an integral signal Iw for adjusting the gain value (gain) of the adjustable gain amplifier 410 . After receiving the first input signal Pin, the adjustable gain amplifier 410 generates a gain-adjusted first input signal Pin; and, the adder 420 subtracts the gain-adjusted first input signal Pin from the second input signal Qin to form a second Output signal Qo.

The weight correlator 450 includes a weight function generator 461 , two multipliers 471 , 472 , and an accumulator 482 .

According to an embodiment of the present invention, when the first output signal Po and the second output signal Qo pass near the zero crossing point, the weight function generator 461 outputs a weight function. Furthermore, the first multiplier 471 can generate a first result of multiplying the first output signal Po by the second output signal Qo; the second multiplier 472 can generate a second result of multiplying the first result by the weight function , the accumulator 482 accumulates the second result output by the second multiplier 472 and becomes the integrated signal Iw.

For example, assuming that the phase difference between the first input signal Pin and the second input signal Qin is not 90 degrees, the first input signal Pin and the second input signal Qin can be expressed as Asin(ωt) and Bcos(ωt+θ ). That is, the difference between the first input signal Pin and the second input signal Qin is (90+θ) degrees. Furthermore, the second input signal Qin can be expressed as: Qin=Bcos(ωt+θ)=Bcosθcos(ωt)−Bsinθsin(ωt). Obviously, after the component [Bsinθsin(ωt)] in the second input signal Qin is eliminated, the phase difference between the second output signal Qo and the first output signal Po is 90 degrees.

Therefore, the weight correlator 450 obtains the integral signal Iw for controlling the gain of the adjustable gain amplifier 410 according to the phase relationship between the first output signal Po and the second output signal Qo. Moreover, the first adder 420 subtracts the gain-adjusted first input signal Pin from the second input signal Qin to become the second output signal Qo, and the phase difference between the second output signal Qo and the first output signal Po is is 90 degrees.

The following embodiment in FIG. 4B uses the pulse sequence function as the weight function to illustrate the operation principle of the phase adjustment unit 220 . As shown in FIG. 4B , the weight function generator 461 outputs a pulse sequence function near each zero-crossing point of the first output signal Po and the second output signal Qo. Furthermore, the second result after the second multiplier 472 multiplies the pulse sequence function by the first result is the area shown by the shaded part in FIG. 4B .

Moreover, the accumulator 482 accumulates the second result output by the second multiplier 472 and becomes the integral signal Iw for controlling the gain value (gain) of the adjustable gain amplifier 410 . Therefore, the phase of the second output signal Qo can be gradually adjusted to achieve a phase difference of 90 degrees between the second output signal Qo and the first output signal Po.

Similarly, in practical applications, the above-mentioned second multiplier 472 can be realized by a programmable counter, that is, it starts counting at each zero-crossing point of the first output signal Po and the second output signal Qo to a predetermined number, and then stops The accumulator 482 accumulates. That is, the number of the first result input to the accumulator is controlled. Furthermore, switching the front and back of the square multipliers 471 and 472 does not affect the spirit of the present invention.

Moreover, according to another embodiment of the present invention, the weight function may also be a natural exponential decay function as shown in FIG. 4C . The object of the present invention can also be achieved.

Please refer to FIG. 5A , which is a schematic diagram of an amplitude adjustment circuit. Wherein, the amplitude adjustment unit 230 may be composed of two amplitude adjustment circuits 500 . The amplitude adjustment circuit 500 includes an adjustable gain amplifier 511 , a magnitude detector 521 , an adder 531 and a second type weighting integrator 580 . Moreover, the output signal Mo of the amplitude adjustment circuit 500 can adjust the amplitude of the first input signal Min to a fixed value.

In other words, when the third adjustment signal A2 and the fourth adjustment signal B2 output by the phase offset adjustment unit 220 are used as the first input signal Min and the second input signal Nin of the amplitude adjustment circuit 500 , the third adjustment signal A2 The amplitude will be adjusted to this fixed value. Alternatively, when the fourth adjustment signal B2 and the third adjustment signal A2 can serve as the first input signal Min and the second input signal Nin of the amplitude adjustment circuit 500 , the amplitude of the fourth adjustment signal B2 will be adjusted to the fixed value.

Furthermore, the second-type weight integrator 580 outputs the integrated signal Ix for adjusting the gain value (gain) of the adjustable gain amplifier 511 . Therefore, the adjustable gain amplifier 511 generates an output signal Mo after receiving the first input signal Min.

Moreover, the output signal Mo passes through the magnitude detector 521 to output a magnitude signal m1 , and the adder 531 subtracts the magnitude signal m1 from a reference value ref1 to generate a sampled signal m2 and input it to the second-type weight integrator 580 .

The second-type weight integrator 580 includes a weight function generator 551 , a multiplier 541 and an accumulator 561 .

According to an embodiment of the present invention, the weight function generator 551 outputs a weight function W when the first input signal Min and the second input signal Nin pass near the zero crossing point. Moreover, the multiplier 541 can generate the result of multiplying the sampled signal m2 by the weight function W; and the accumulator 561 accumulates the output result of the multiplier 541, so that the accumulator 561 outputs the integrated signal Ix.

According to an embodiment of the present invention, the size detector 521 may be implemented by using a squarer or an absolute valuer. Wherein, the squarer calculates the square of the output signal Mo, and the absolute valuer calculates the absolute value of the output signal Mo.

The following embodiment in FIG. 5B uses the pulse sequence function as the weight function to illustrate the operating principle of the amplitude adjustment unit 230 . As shown in FIG. 5B , the weight function generator 551 outputs a pulse sequence function W at each zero-crossing point of the first input signal Min and the second input signal Nin. Furthermore, a multiplier 541 multiplies the pulse sequence function W by the value of the sampled signal m2, which is the distance between the magnitude signal m1 and the reference value ref1.

Moreover, the accumulator 561 accumulates the result output by the multiplier 541 and becomes an integrated signal Ix for controlling the gain value (gain) of an adjustable gain amplifier 511 . Therefore, the amplitude of the output signal Mo can be gradually adjusted and maintained at the fixed value.

Moreover, according to another embodiment of the present invention, the weight function can also be replaced by a natural exponential decay function, which can also achieve the purpose of the present invention.

In other words, the amplitude of the first output signal Aout output by the amplitude adjustment unit 230 can be maintained at the fixed value, and similarly the amplitude of the second output signal Bout can also be maintained at the fixed value.

Moreover, according to another embodiment of the present invention, the input of the weight function generator can also be replaced by the first output signal Aout and the second output signal Bout.

Furthermore, the present invention can also select one of the DC offset adjustment unit 210, the phase adjustment unit 220, and the amplitude adjustment unit 230, or one of them according to the signal quality of the first photoelectric signal Ain and the second photoelectric signal Bin. Second, as a signal processing device.

For example, assuming that there is no DC offset between the photoelectric signal Ain and the second photoelectric signal Bin, the signal processing device can be composed of the phase adjustment unit 220 and the amplitude adjustment unit 230 . Alternatively, the phase and amplitude of the photoelectric signal Ain and the second photoelectric signal Bin do not need to be adjusted again, and only the DC offset adjustment unit 210 is used to form the signal processing device. Certainly, the signal processing device of the present invention may also have other combinations, which will not be repeated here.

Furthermore, in the present invention, the weight function is generated when the signal passes through the zero-crossing point, but the present invention is not limited to this. Those skilled in this field can use the same method to generate the weight function after a short fixed time delay after the signal passes through the zero-crossing point, and the effect of the present invention can also be achieved. That is, the weight function only needs to be generated around the zero-crossing point of the signal.

It can be seen from the above description that the advantage of the present invention is to provide a signal processing device for the two time-varying photoelectric signals output by the photoelectric encoder in the servo motor system. Moreover, using the present invention, the DC offset in the photoelectric signal can be eliminated, the phase difference between the two photoelectric signals can be fixed, and the amplitude of the two photoelectric signals can be maintained.

In summary, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art to which the present invention belongs may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims (30)

1. A signal processing device applied to time-varying signals, comprising: A first adder receives a first input signal and a first integrated signal, and generates a first output signal, wherein the first output signal is equal to the first input signal minus the first integrated signal; and a first weighted integrator, receiving the first output signal and generating the first integrated signal; Wherein, the first weight integrator also includes: a first weight function generator, receiving the first output signal, and generating a first weight function when the first output signal passes near a zero-crossing point; a first multiplier for multiplying the first weight function by the first output signal; and A first accumulator, connected to the first multiplier, is used for accumulating the result of multiplying the first output signal by the first weight function, and generating the first integrated signal accordingly. 2. The signal processing device as claimed in claim 1, wherein the first weight function is a pulse sequence function or a natural exponential decay function. 3. The signal processing device according to claim 1, wherein the first multiplier can be a programmable counter to control the number of the first output signal input to the accumulator. 4. The signal processing device according to claim 1, further comprising: A second adder receives a second input signal and a second integrated signal, and generates a second output signal, wherein the second output signal is equal to the second input signal minus the second integrated signal; and a second weighted integrator, receiving the second output signal and generating the second integrated signal; Wherein, the second weight integrator also includes: a second weight function generator, receiving the second output signal, and generating a second weight function when the second output signal passes near the zero-crossing point; a second multiplier for multiplying the second weight function by the second output signal; and a second accumulator, connected to the second multiplier, and accumulating the result of multiplying the second weight function by the second output signal, and generating the second integral signal accordingly; Wherein, the first input signal and the second input signal are generated by a photoelectric encoder. 5. The signal processing device as claimed in claim 4, wherein the signal processing device generates the first output signal after eliminating a DC offset of the first input signal, and after eliminating the DC offset of the second input signal The second output signal is generated. 6. The signal processing device as claimed in claim 4, wherein an input of the first weight function generator can be obtained from the second output signal. 7. The signal processing device as claimed in claim 4, wherein an input of the first weight function generator can be obtained from the first output signal and the second output signal. 8. The signal processing device as claimed in claim 4, wherein an input of the second weight function generator can be obtained from the first output signal. 9. The signal processing device as claimed in claim 4, wherein an input of the second weight function generator can be obtained from the first output signal and the second output signal. 10. The signal processing device as claimed in claim 4, further comprising a phase adjustment unit, the first output signal is directly used as a third output signal, and the phase adjustment unit comprises: A first adjustable gain amplifier, adjusting the gain of the first adjustable gain amplifier according to a third integral signal, receiving the first output signal and generating the first output signal after gain adjustment; a third adder, subtracting the first output signal after gain adjustment from the second output signal to generate a fourth output signal; and A weighted correlator receives the third output signal and the fourth output signal and generates the third integrated signal. 11. The signal processing device according to claim 10, wherein the phase adjustment unit adjusts the phase relationship between the first output signal and the second output signal, so that the phase relationship between the third output signal and the fourth output signal The phase difference is 90 degrees. 12. The signal processing device according to claim 10, further comprising an amplitude adjustment unit, comprising: A second adjustable gain amplifier, adjusting the gain of the second adjustable gain amplifier according to a fourth integral signal, receiving the third output signal and generating a fifth output signal; A first magnitude detector, which generates a first magnitude signal after receiving the fifth output signal; A fourth adder subtracts the first magnitude signal from a reference value to generate a first sampled signal; and A third weighted integrator receives the third output signal, the fourth output signal and the first sampled signal, and generates the fourth integrated signal. 13. The signal processing apparatus according to claim 12, further comprising: a third adjustable gain amplifier, adjusting the gain of the third adjustable gain amplifier according to a fifth integrated signal, receiving the fourth output signal and generating a sixth output signal; a second magnitude detector, which generates a second magnitude signal after receiving the sixth output signal; A fifth adder subtracts the second magnitude signal from the reference value to generate a second sampled signal; and A fourth weighted integrator receives the third output signal, the fourth output signal and the second sampled signal, and generates the fifth integrated signal. 14. The signal processing device according to claim 13, wherein the first size detector and the second size detector are a squarer or an absolute valuer. 15. The signal processing device according to claim 13 , wherein the amplitude adjustment unit adjusts the amplitudes of the third output signal and the fourth output signal so that the fifth output signal and the sixth output signal have the same amplitude . 16. A signal processing device applied to time-varying signals, receiving a first input signal and a second input signal, and directly using the first input signal as a first output signal, the signal processing device comprising: A first adjustable gain amplifier, adjusting the gain of the first adjustable gain amplifier according to a first integral signal, receiving the first input signal and generating the first input signal after gain adjustment; a first adder that subtracts the gain-adjusted first input signal from the second input signal to generate a second output signal; and a weighted correlator, receiving the first output signal and the second output signal and generating the first integrated signal; Wherein, the weight correlator includes: a weight function generator, receiving the first output signal and the second output signal, and generating a weight function when the first output signal and the second output signal pass near a zero-crossing point; a first multiplier for multiplying the first output signal by the second output signal to generate a first result; a second multiplier for multiplying the weight function by the first result to generate a second result; and A first accumulator, connected to the second multiplier, is used for accumulating the second result and generating the first integrated signal accordingly. 17. The signal processing device as claimed in claim 16, wherein the weight function is a pulse sequence function or a natural exponential decay function. 18. The signal processing device as claimed in claim 16, wherein the second multiplier can be a programmable counter to control the number of the first result input to the accumulator. 19. The signal processing device as claimed in claim 16, wherein the first input signal and the second input signal are generated by a photoelectric encoder, and the signal processing device adjusts the first input signal and the second The phase relationship between the input signals is such that the phase difference between the first output signal and the second output signal is 90 degrees. 20. The signal processing device according to claim 16, further comprising an amplitude adjustment unit comprising: a second adjustable gain amplifier, adjusting the gain of the second adjustable gain amplifier according to a second integral signal, receiving the first output signal and generating a third output signal; a first magnitude detector, which generates a first magnitude signal after receiving the third output signal; A second adder subtracts the first magnitude signal from a reference value to generate a first sampled signal; and A first weighted integrator receives the first output signal, the second output signal and the first sampled signal, and generates the second integrated signal. 21. The signal processing device as claimed in claim 20, further comprising: a third adjustable gain amplifier, adjusting the gain of the third adjustable gain amplifier according to a third integrated signal, receiving the second output signal and generating a fourth output signal; a second magnitude detector, which generates a second magnitude signal after receiving the fourth output signal; A third adder, subtracting the second magnitude signal from the reference value to generate a second sampling signal; A second weighted integrator receives the first output signal, the second output signal and the second sampling signal, and generates the third integrated signal. 22. The signal processing device as claimed in claim 21, wherein the first size detector and the second size detector are a squarer or an absolute valuer. 23. The signal processing device according to claim 21 , wherein the amplitude adjusting unit adjusts the amplitudes of the first output signal and the second output signal so that the third output signal and the fourth output signal have the same amplitude . 24. A signal processing device applied to time-varying signals, receiving a first input signal and a second input signal, the signal processing device comprising: A first adjustable gain amplifier, adjusting the gain of the first adjustable gain amplifier according to a first integral signal, receiving the first input signal and generating a first output signal; a first magnitude detector, receiving the first output signal, and generating a first magnitude signal; A first adder subtracts the first magnitude signal from a reference value to generate a first sampled signal; and a first weighted integrator, receiving the first input signal, the second input signal and the first sampled signal, and generating the first integrated signal; Wherein, the first weight integrator includes: a first weight function generator, receiving the first input signal and the second input signal, and generating a first weight function when the first input signal and the second input signal pass near a zero-crossing point; a first multiplier for multiplying the first sampled signal by the first weighting function; and A first accumulator, connected to the first multiplier, is used for accumulating the result of multiplying the first sampling signal by the first weighting function, and generating the first integrated signal accordingly. 25. The signal processing device as claimed in claim 24, further comprising: a second adjustable gain amplifier, adjusting the gain of the second adjustable gain amplifier according to a second integration signal, receiving the second input signal and generating a second output signal; A second magnitude detector, receiving the second output signal, generates a second magnitude signal; A second adder subtracts the second magnitude signal from the reference value to generate a second sampling signal; a second weighted integrator, receiving the first input signal, the second input signal and the second sampled signal, and generating the second integrated signal; Wherein, the second weight integrator includes: a second weight function generator, receiving the first input signal and the second input signal, and generating a second weight function when the first input signal and the second input signal pass near a zero-crossing point; a second multiplier for multiplying the second sampled signal by the second weighting function; and A second accumulator, connected to the second multiplier, is used for accumulating the result of multiplying the second sampling signal by the second weighting function, and generating the second integrated signal accordingly. 26. The signal processing device as claimed in claim 25, wherein the first weight function and the second weight function are a pulse sequence function or a natural exponential decay function. 27. The signal processing device as claimed in claim 25, wherein the input of the first weight function generator and the second weight function generator can be the first output signal and the second output signal. 28. The signal processing device as claimed in claim 25, wherein the first multiplier and the second multiplier can be a programmable counter to control the input of the first sampling signal and the second sampling signal to the first The number of accumulators and the second accumulator. 29. The signal processing device as claimed in claim 25, wherein the first size detector and the second size detector are a squarer or an absolute valuer. 30. The signal processing device as claimed in claim 25, wherein the first input signal and the second input signal are generated by a photoelectric encoder, and the signal processing device adjusts the first input signal and the second input signal The amplitude of the signal is such that the first output signal and the second output signal have the same amplitude.