CN104681908A - Ultra-miniature multilayer chip balun - Google Patents

Abstract

The invention discloses an ultra-miniature multilayer chip balun, wherein an internal circuit layer comprises first to seventh circuit layers; the first circuit layer comprises four mutually insulated conductive metal sheets which are electrically connected with a bonding pad respectively; the second circuit layer comprises two mutually insulated flaky metal sheets; the third circuit layer comprises two mutually insulated flaky metal sheets; the flaky metal sheets in the second layer are arranged corresponding to the insulated metal sheets in the third layer so as to form two capacitors; the flaky metal sheets in the second layer and the flaky metal sheets in the third layer are electrically connected with the bonding pad respectively through a conducting post; the fourth to seventh circuit layers comprise two mutually insulated dual rectangular-shaped metal sheets respectively; the metal sheets in the fourth to seventh layers are connected end to end respectively in sequence through the conducting post to form two inductors; ends of the dual rectangular-shaped metal sheets in two inductors are electrically connected with the bonding pad respectively.

Description

A kind of superminiature lamination sheet type Ba Lun

Technical field

The present invention discloses a kind of superminiature lamination sheet type Ba Lun, particularly one and can be used in LTE-4G communicating mobile devices Circuits System.

Background technology

Along with the fast development of mobile communication technology, there is 4G-LTE, use simultaneously easily, add a lot of frequency range.The RF Components used in 4G-LTE mobile terminal also gets more and more, and all proposes more and more higher requirement to transmission speed and reliability.Method relatively more conventional at present meets these requirements by being equipped with corresponding radio frequency front and back end matching module in such devices.Ba Lun and band pass filter are current, the technological means that those skilled in the art commonly use, and Ba Lun is passive component balance end signal and uneven end signal can changed each other, is used widely in all kinds of radio circuit is as RFIC.Along with the raising of people's living standard, the requirement of people is also more and more higher, its miniaturized and low energy consumption is required for electronic product, and Ba Lun of the prior art mostly be discrete elements overlap joint form, volume is larger, energy consumption is high, thus limits the further miniaturization of electronic product, more and more can not meet the needs of people.

Summary of the invention

During for the above-mentioned 4G mobile terminal of the prior art mentioned, need to use Ba Lun to ensure transmission speed and reliability, the Ba Lun of conventional art is discrete elements overlap joint, the shortcomings such as volume is large, energy consumption is high, the invention provides a kind of new superminiature lamination sheet type barron structure, Ba Lun is realized in a superminiature laminated construction, then utilizes LTCC technique to fire and form.

The technical scheme that the present invention solves the employing of its technical problem is: a kind of superminiature lamination sheet type Ba Lun comprises matrix, is arranged on the terminal stud of surrounding outside matrix and is arranged on the circuit layer of intrinsic silicon, and the circuit layer of described intrinsic silicon is laminated construction,

Described circuit layer ground floor is the pin position pad that lamination sheet type Ba Lun is connected with external circuit;

Described circuit layer second, three layers is two intersection sheet sheet metals insulated each other, and the sheet metal sheet of two same size areas in the second layer and third layer forms cross capacitance, is connected by pillar with the inductance coil of third layer simultaneously;

Described circuit layer the 4th layer is " returning " font sheet metal of two mutually insulateds, is connected respectively by pillar with the second layer and third layer, and is connected with the pin position pad of ground floor;

Described circuit layer layer 5 is the three-back-shaped sheet metal of two mutually insulateds, is connected by the three-back-shaped sheet metal of a post with the 4th layer;

Described circuit layer layer 6 is the three-back-shaped sheet metal of two mutually insulateds, is connected with the three-back-shaped sheet metal of layer 5 by a post;

Described circuit layer layer 7 is the three-back-shaped sheet metal of two mutually insulateds, be connected with the three-back-shaped sheet metal of layer 6 by a post, and be connected with the second/tri-layer capacitance by conductive posts, and be connected with the pin position pad of ground floor, form intersection inductor loop;

Described matrix four sides are conductive posts respectively, be connected, and be connected with layer capacitance and spiral inductance with the pin position pad of ground floor;

Described matrix corner is provided with four terminal studs.

Described matrix is cuboid.

Each angle of described matrix is respectively equipped with a terminal stud.

Described body upper surface is provided with hand designations.

The invention has the beneficial effects as follows: the present invention adopts LTCC technique (LTCC), and circuit is placed in ceramic body, more accurate circuit trace requirement can be met.Its internal circuit is laminated type arrangement, and its volume is little, electrical property is good.Ba Lun of the present invention is functional, low insertion loss in band, phase difference 180 degree, the maximum 1dB of amplitude difference.Volume of the present invention is little, energy consumption is low, for the further miniaturization of application product provides possibility.

Below in conjunction with the drawings and specific embodiments, the present invention will be further described.

Accompanying drawing explanation

Fig. 1 is external overall structural representation of the present invention.

Fig. 2 is internal structure schematic diagram of the present invention.

Fig. 3 is ground floor circuit diagram of the present invention.

Fig. 4 is second layer circuit diagram of the present invention.

Fig. 5 is third layer circuit diagram of the present invention.

Fig. 6 is the present invention's the 4th layer of circuit diagram.

Fig. 7 is layer 5 circuit diagram of the present invention.

Fig. 8 is layer 6 circuit diagram of the present invention.

Fig. 9 is layer 7 circuit diagram of the present invention.

Figure 10 is equivalent circuit diagram of the present invention;

Figure 11 is the insertion loss curve (Insertion Loss) of electrical property curve of the present invention.

Figure 12 is the return loss plot (Return Loss) of electrical property curve of the present invention.

Figure 13 is the unbalance in phase curve (Phase Imbalance) of electrical property curve of the present invention.

Figure 14 is the amplitude imbalance curve (Amplitude Imbalance) of electrical property curve of the present invention

In figure, 1-lamination sheet type Ba Lun ceramic matrix, 2-superminiature lamination Ba Lun internal helicoid inductance L 1, 3-superminiature lamination Ba Lun internal helicoid inductance L 2, 4a-first conductor pin, 4b-second conductor pin, 4c-the 3rd conductor pin, 4d-the 4th conductor pin, 5a-first bottom land pin position is the first port, 5b-second bottom land pin position is the second port, 5c-the 3rd bottom land pin position is the 3rd port, 5d-the 4th bottom land pin position is the 4th port, the 6a-second layer first sheet metal, the 6b-second layer second sheet metal, 7a-third layer first sheet metal, 7b-third layer second sheet metal, 8-superminiature lamination Ba Lun internal helicoid inductance L 1 tie point post, 9-superminiature lamination Ba Lun internal helicoid inductance L 2 tie point post,

Embodiment

The present embodiment is the preferred embodiment for the present invention, and other its principles all are identical with the present embodiment or approximate with basic structure, all within scope.

In laminated process, by regulating the length of each electric capacity substrate and the wide size adjusting electric capacity, its parallel plate capacitor formula is:

$C=8.854\×{10}^{-6}\frac{{\mathrm{\ϵ}}_{r}A(n-1)}{d}\left(\mathrm{pF}\right)$

Wherein A is the area of battery lead plate, and unit is square micron; D is the distance between two battery lead plates, and unit is all micron.

Inductance adopts coil inductance form, and adjusted the size of inductance value by regulating course spacing and area coil, its coil inductance formula is:

$L={\mathrm{\μ}}_0{\mathrm{\μ}}_{r}N\frac{\mathrm{lw}}{h}$

Wherein N is the number of turns of coil, and h is the height of coil, and λ is the length of coil, and w is the width of coil, μ ₀and μ _rthe relative permeability of magnetic permeability in air and medium respectively.

Fig. 3 is the equivalent circuit diagram of invention, and circuit comprises two electric capacity C1/C2 and two inductance L 1/L2.In balun circuit, electric capacity C1 one end connects the 5a of bottom land by the first conductive pole 4a, be uneven port one of the present invention, the electric capacity C1 other end is connected with grounded inductor L2 and bottom land 5c by the 3rd conductive pole 4c, is balance ports 3 of the present invention; Inductance L 2 other end is connected with bottom land 5b by the 4th conductive pole 4b, is grounding ports of the present invention; Inductance L 1 one end connects bottom land 5a by the first conductive pole 4a, be uneven port one of the present invention, inductance L 1 other end is connected with bottom land 5d by the 4th conductive pole 4d, be balance ports 2 of the present invention, another the 4th conductive pole 4d that passes through is connected with one end of electric capacity C1, the other end of electric capacity C1 is connected with bottom land 5b by conductive pole 4b, is grounding ports of the present invention and connects;

Main body of the present invention is matrix 2, and it is with low damage dielectric ceramic material Al ₂o ₃for primary raw material, add glass SiO in addition ₂with a small amount of boric acid, after Homogeneous phase mixing and high-temperature firing, forming the white powdery solids that particle diameter is 1.5um; By low-loss dielectric ceramics material powder and adhesive, dispersant, solvent, by a certain percentage after mixing and ball milling, forms casting slurry; Print electrode after pattern superposes from level to level after overmolding stream film and form circuit structure; Through accurate cutting and separating independent part, form the superminiature lamination barron structure of monolithic structure; Finally sinter porcelain into, improve product reliability.

In the present embodiment, matrix 2 is in cuboid, and length, width and height size is respectively 1.0mm x 0.5mm x0.4mm, and imperial sizing is 0402, is the lamination Ba Lun that industry is minimum;

The present invention's each circuit layer inner is lamination sheet type arrangement, and its silk-screen printing technique by precision forms each metal level inner, forms inner conductor pin by casting molding processes.Describe in detail below in conjunction with accompanying drawing 1 pair of the present embodiment inner. layers:

Circuit layer ground floor is the conductive metal sheet of four mutually insulateds, for the pin position that lamination Ba Lun is connected with external circuit;

The circuit layer second layer is two sheet metal sheet 6a and 6b insulated each other, electric capacity C1 and C2 is formed respectively with mutually insulated sheet metal 7a and 7b in the second layer, be connected with bottom land 5d and 5a by conductive pole 4d with 4a, and the 4th layer is connected with inductance L 1 two ends of layer 7 simultaneously;

Circuit layer third layer is two sheet metal sheet 7a and 7b insulated each other, electric capacity C1 and C2 is formed respectively with mutually insulated sheet metal 6a and 6b in the second layer, be connected with bottom land 5b and 5c by conductive pole 4b with 4c, and the 4th layer is connected with inductance L 2 two ends of layer 7 simultaneously;

4th layer is three-back-shaped sheet metal 2a and 3a of two mutually insulateds, is connected with 9 respectively by conductor pin 8 with three-back-shaped sheet metal 2b and 3b of two mutually insulateds of layer 5;

Layer 5 is three-back-shaped sheet metal 2b and 3b of two mutually insulateds, is connected with 9 respectively by conductor pin 8 with three-back-shaped sheet metal 2a and 3a of two mutually insulateds of the 4th layer, and three-back-shaped sheet metal 2c with 3c of two of layer 6 mutually insulateds is connected;

Layer 6 is three-back-shaped sheet metal 2c and 3c of two mutually insulateds, is connected with 9 respectively by conductor pin 8 with three-back-shaped sheet metal 2b and 3b of two mutually insulateds of the 4th layer, and three-back-shaped sheet metal 2d with 3d of two of layer 6 mutually insulateds is connected;

Layer 7 is three-back-shaped sheet metal 2d and 3d of two mutually insulateds, is connected, and is connected with conductive pole 4a with 4b respectively by conductor pin 8 with 9 with three-back-shaped sheet metal 2c and 3c of two mutually insulateds of the 4th layer, forms the loop of inductance L 1 and L2;

Insertion loss of the present invention and return loss plot (S-Parameters); Insertion loss curve calculation formula:

$\mathrm{IL}=-10\log ({\left|S_{12}\right|}^2+{\left|S_{13}\right|}^2)-10\log \left(\frac{{\left|S_{12}\right|}^2+{\left|S_{13}\right|}^2+2\left|S_{12}\right|\left|S_{13}\right|\cos \mathrm{\θ}}{{\left|S_{12}\right|}^2+{\left|S_{13}\right|}^2+2\left|S_{12}\right|\left|S_{13}\right|}\right)$

Figure 11 insertion loss in the frequency range 2.3GHz ~ 2.7GHz of 4G-LTE frequency range Band38/40/41 is little.

Figure 12 is return loss in the frequency range 2.3GHz ~ 2.7GHz of 4G-LTE frequency range Band38/40/41, and return loss is less, shows that signal is less through the reflection loss of device of the present invention;

The computing formula of the unbalance in phase between balance ports is as follows:

Figure 13 is the phase difference of two balance ports of the present invention, reaches 180 ° ± 10 ° scopes of standard; The power output phase place describing two balance ports is contrary.

The computing formula of the amplitude imbalance between balance ports is as follows:

$\mathrm{Amplititnde\; Imbalance}=20\log \left(\frac{S_{12}}{S_{13}}\right)$

Figure 14 is the amplitude difference of two balance ports of the present invention, reaches the scope of the 2dB max. of standard; Illustrate that the power output difference of two balance ports is very little

The present invention can be widely used in the device ends such as mobile phone, laptop computer, digital camera and printer.

Claims (3)

1. a superminiature lamination sheet type Ba Lun, described Ba Lun comprise matrix and are arranged on the circuit layer in matrix, it is characterized in that: be provided with four pads outside described matrix, be electrically connected respectively with the circuit layer of inside, described circuit layer comprises:

Ground floor circuit layer is the conductive metal sheet of four mutually insulateds, and four conductive metal sheets are electrically connected with a pad respectively;

Second layer circuit layer is two sheet metal sheets insulated each other;

Third layer circuit layer is two sheet metal sheets insulated each other, sheet metal sheet in the second layer is corresponding with the insulated metal sheet in third layer to be arranged, form two electric capacity, in the sheet metal sheet in the second layer and third layer, sheet metal sheet is electrically connected with pad by conductive pole respectively by one;

4th layer, comprise the three-back-shaped sheet metal of two mutually insulateds in layer 5, layer 6 and layer 7 circuit layer respectively, 4th layer, layer 5, layer 6 and the sheet metal in layer 7 be connected in turn respectively by conductor pin head and the tail, form two inductance, the three-back-shaped sheet metal termination in two inductance is electrically connected with a pad respectively.

2. superminiature lamination sheet type Ba Lun according to claim 1, is characterized in that: the corner place of described matrix is respectively equipped with a conductive pole, and four conductive poles are electrically connected with a pad respectively.

3. superminiature lamination sheet type Ba Lun according to claim 1 and 2, is characterized in that: described outer surface of matrix is provided with flag bit.