CN104637966A - Semiconductor device and method of manufacturing same - Google Patents

Abstract

The present invention relates to a semiconductor device and a method of manufacturing the same. To provide a semiconductor device of a photoelectric conversion element having high sensitivity, producing less blurring phenomenon, and providing highly reliable images. A semiconductor device has a semiconductor substrate, a first p-type epitaxial layer, a second p-type epitaxial layer, and a first photoelectric conversion element. A first p-type epitaxial layer is formed on the main surface of the semiconductor substrate. The second p-type epitaxial layer is formed to cover the upper surface of the first p-type epitaxial layer. The first photoelectric conversion element is formed in the second p-type epitaxial layer. The first and second p-type epitaxial layers are each made of silicon, and the first p-type epitaxial layer has a higher p-type impurity concentration than the second p-type epitaxial layer.

Description

Semiconductor device and manufacturing method thereof

Related Application Cross Reference

The disclosure of Japanese Patent Application No. 2013-232371 filed on Nov. 8, 2013 including specification, drawings and abstract is hereby incorporated by reference in its entirety.

technical field

The present invention relates to a semiconductor device and a method of manufacturing the device, and in particular, to a semiconductor device having a photoelectric conversion element and a method of manufacturing the device.

Background technique

Semiconductor imaging devices such as CCD (Charge Coupled Device) image sensors and CMOS (Complementary Metal Oxide Semiconductor) image sensors need to have a high S/N ratio in order to provide high image quality. This means that an increase in S (signal) requires a high saturation signal level and high sensitivity to optical signals, while a reduction in N (noise) requires a low dark current value.

In the above-mentioned semiconductor imaging device, improvement in the efficiency of collecting electrons obtained by photoelectric conversion of incident light in the photoelectric conversion element requires enhancement of sensitivity to input signals. In particular, optical signals in the long wavelength region may still penetrate the pixel region and cause photoelectric conversion with difficulty, which degrades the efficiency of the photoelectric conversion element for collecting light.

In addition, when light supplied to one photoelectric conversion element and penetrating at the depth of the pixel region is photoelectrically converted when it reaches, for example, the substrate of the semiconductor imaging device, for example, there is leakage of photoelectrically converted electrons through the substrate into adjacent photoelectric cells adjacent to the one photoelectric conversion element. Possibilities in another photoelectric conversion element of the conversion element. Also when an optical signal level exceeding the saturation signal level is input, there is a possibility that electrons leak into another photoelectric conversion element adjacent to the one photoelectric conversion element to which the optical signal is input. Such leakage of electrons, so-called blurring, degrades, if any, the electron detection sensitivity of the one photoelectric conversion element, and for detection of excess electrons, an increase in the noise of the detection signal leads to a decrease in the S/N ratio .

Techniques for suppressing this phenomenon are disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2008-91781 (Patent Document 1), Japanese Unexamined Patent Application Publication No. 2007-13177 (Patent Document 2), and Japanese Unexamined Patent Application Publication No. In Publication No. 2008-98601 (Patent Document 3).

[Patent Document]

[Patent Document 1] Japanese Unexamined Patent Application Publication No. 2008-91781

[Patent Document 2] Japanese Unexamined Patent Application Publication No. 2007-13177

[Patent Document 3] Japanese Unexamined Patent Application Publication No. 2008-98601

Contents of the invention

Photoelectric conversion efficiency can be improved by increasing the depth of a region in which photoelectric conversion for supplying electrons collectable by the photoelectric conversion element is desired to occur. In each of the above-mentioned patent documents, by forming the above-mentioned region as an epitaxial layer, the depth of the region can be increased compared with formation by ion implantation technology. In this way, the depth of the region where photoelectric conversion is desired to occur can be increased. However, each of the above-mentioned documents has the following problems.

In Patent Document 1, an n-type semiconductor layer formed on a p-type semiconductor substrate has a photoelectric conversion portion. In this case, holes as minority carriers in the n-type semiconductor layer move to the photoelectric conversion portion, but the mobility of the holes is smaller than that of electrons and the probability of recombination during movement is high. Therefore, the sensitivity of the electric signal of the photoelectric conversion part will be reduced.

In Patent Document 2, a silicon substrate has a silicon germanium epitaxial layer thereon. Formation of a thin film made of a material different from that of the substrate accelerates growth and recombination at the interface between them, generates leakage current, and degrades the S/N ratio of the CMOS image sensor.

In Patent Document 3, only a single p-type epitaxial layer is formed on a substrate. In this case, an increase in the depth of the epitaxial layer improves the conversion ratio of light incident from the red filter into the epitaxial layer, but there is a possibility that another problem such as deterioration of blur suppression effect cannot be overcome.

Additional problems and novel features of the present invention will be apparent from the description and drawings herein.

A semiconductor device according to one embodiment of the present invention has: a semiconductor substrate, a first p-type epitaxial layer, a second p-type epitaxial layer, and a first photoelectric conversion element. The semiconductor substrate has a first p-type epitaxial layer on its main surface. The second p-type epitaxial layer covers the first p-type epitaxial layer. There is a first photoelectric conversion element in the second p-type epitaxial layer. The first and second p-type epitaxial layers are each made of silicon and the first p-type epitaxial layer has a higher p-type impurity concentration than the second p-type epitaxial layer.

A semiconductor device according to another embodiment has: a semiconductor substrate, a buried impurity layer, a p-type epitaxial layer, and a first photoelectric conversion element. A semiconductor substrate has a buried impurity layer therein. The buried impurity layer has a p-type epitaxial layer thereon. The p-type epitaxial layer has the first photoelectric conversion element therein. The buried impurity layer and the p-type epitaxial layer are each made of silicon and the buried impurity layer has a higher p-type impurity concentration than the p-type epitaxial layer.

A method of manufacturing a semiconductor device according to one embodiment includes the steps of: providing a semiconductor substrate having a main surface, forming a first p-type epitaxial layer on the main surface, forming a second p-type epitaxial layer so as to cover the first p-type epitaxial layer The upper surface of the upper surface, and the first photoelectric conversion element is formed in the second p-type epitaxial layer. The first and second p-type epitaxial layers are each made of silicon and the first p-type epitaxial layer has a higher p-type impurity concentration than the second p-type epitaxial layer.

According to one embodiment of the present invention, the second p-type epitaxial layer enables the photoelectric conversion element to detect electrons that have been obtained through photoelectric conversion in a deeper region, thereby driving the first photoelectric conversion element with high sensitivity, and at the same time, the first p The epitaxial layer is used as a barrier layer to reduce blurring. This leads to an improvement of the S/N ratio and thereby obtains an image with improved reliability.

Although in this other embodiment of the present invention, the first p-type epitaxial layer of this one embodiment is replaced by a buried impurity layer, and the second p-type epitaxial layer of this one embodiment is replaced by a p-type epitaxial layer, the Another embodiment basically has advantages similar to the one embodiment.

In the semiconductor device manufactured by the manufacturing method according to this one embodiment of the present invention, the second p-type epitaxial layer enables the photoelectric conversion element to detect electrons generated by photoelectric conversion that has occurred in a deeper region, thereby with high sensitivity The first photoelectric conversion element is driven, and at the same time, the first type epitaxial layer serves as a barrier layer for reducing the blurring phenomenon. Therefore, a semiconductor device having an improved S/N ratio and capable of providing highly reliable images can be provided.

Description of drawings

1 is a schematic plan view showing a semiconductor device in the form of a wafer according to one embodiment;

Fig. 2 is the schematic diagram of the region II enclosed by the dotted line of Fig. 1;

3 is a schematic plan view showing the configuration of a pixel portion of FIG. 2;

4 is a schematic cross-sectional view showing the configuration of a pixel portion of the first embodiment;

5 is a schematic cross-sectional view showing a first step of the method of manufacturing the semiconductor device according to the first embodiment;

6 is a schematic cross-sectional view showing a second step of the method of manufacturing the semiconductor device according to the first embodiment;

7 is a schematic cross-sectional view showing a third step of the method of manufacturing the semiconductor device according to the first embodiment;

8 is a schematic cross-sectional view showing a fourth step of the method of manufacturing the semiconductor device according to the first embodiment;

9 is a schematic cross-sectional view showing a fifth step of the method of manufacturing the semiconductor device according to the first embodiment;

10 is a schematic sectional view showing a sixth step of the method of manufacturing the semiconductor device according to the first embodiment;

11 is a schematic cross-sectional view showing the configuration of a pixel portion in a comparative example of the first embodiment;

12 is a graph showing the relationship between the depth at which photoelectric conversion occurs and electron collection efficiency by wavelength of light;

13 is a graph showing collection efficiencies of electrons from red light and green light in the first embodiment and a comparative example;

14 is a graph showing the relationship between the film thickness of the second p-type epitaxial layer and the internal quantum efficiency;

15 is a graph showing the relationship between the film thickness of the second p-type epitaxial layer, internal quantum efficiency and electron crosstalk by the presence or absence of defects formed in the substrate;

16 is a schematic cross-sectional view showing the configuration of a pixel portion in the second embodiment;

17 is a schematic cross-sectional view showing a first step of a method of manufacturing a semiconductor device according to a second embodiment;

18 is a schematic cross-sectional view showing a second step of the method of manufacturing the semiconductor device according to the second embodiment;

19 is a schematic cross-sectional view showing a third step of the method of manufacturing the semiconductor device according to the second embodiment;

20 is a schematic cross-sectional view showing a fourth step of the method of manufacturing the semiconductor device according to the second embodiment;

21 is a schematic cross-sectional view showing a fifth step of the method of manufacturing the semiconductor device according to the second embodiment;

22 is a schematic cross-sectional view showing the configuration of a pixel portion of the third embodiment;

23 is a schematic sectional view showing a first step of a method of manufacturing a semiconductor device according to a third embodiment;

24 is a schematic sectional view showing a second step of the method of manufacturing the semiconductor device according to the third embodiment;

25 is a schematic cross-sectional view showing a third step of the method of manufacturing the semiconductor device according to the third embodiment;

26 is a schematic sectional view showing a fourth step of the method of manufacturing the semiconductor device according to the third embodiment;

27 is a schematic cross-sectional view showing the configuration of a pixel portion in the fourth embodiment;

28 is a schematic sectional view showing a first step of a method of manufacturing a semiconductor device according to a fourth embodiment;

29 is a schematic cross-sectional view showing a second step of the method of manufacturing the semiconductor device according to the fourth embodiment;

30 is a schematic cross-sectional view showing the configuration of a pixel portion in the fifth embodiment;

31 is a schematic cross-sectional view showing the configuration of a pixel portion in the sixth embodiment;

32 is a schematic cross-sectional view showing the configuration of a pixel portion in the seventh embodiment;

33 is a schematic sectional view showing a step of a method of manufacturing a semiconductor device according to a seventh embodiment;

34 is a schematic cross-sectional view showing the configuration of a pixel portion in the eighth embodiment;

35 is a schematic cross-sectional view showing the configuration of a pixel portion in the ninth embodiment;

36 is a schematic sectional view showing a first step of a method of manufacturing a semiconductor device according to a ninth embodiment;

37 is a schematic cross-sectional view showing a second step of the method of manufacturing the semiconductor device according to the ninth embodiment;

38 is a schematic cross-sectional view showing a third step of the method of manufacturing the semiconductor device according to the ninth embodiment;

39 is a schematic cross-sectional view showing the configuration of a pixel portion in the tenth embodiment;

40 is a schematic cross-sectional view showing a first step of the method of manufacturing the semiconductor device according to the tenth embodiment;

41 is a schematic sectional view showing a second step of the method of manufacturing the semiconductor device according to the tenth embodiment;

42 is a schematic cross-sectional view showing a third step of the method of manufacturing the semiconductor device according to the tenth embodiment;

43 is a schematic cross-sectional view showing the configuration of a pixel portion in the eleventh embodiment;

44 is a schematic cross-sectional view showing the first step of the method of manufacturing the semiconductor device according to the eleventh embodiment;

45 is a schematic sectional view showing a second step of the method of manufacturing the semiconductor device according to the eleventh embodiment; and

FIG. 46 is a schematic cross-sectional view showing a configuration outline of a pixel portion of a semiconductor device according to one embodiment.

Detailed ways

An embodiment will be described below with reference to some drawings.

(first embodiment)

First, an arrangement of an element formation region on a main surface of a semiconductor substrate of a semiconductor device according to an embodiment will be described with reference to FIGS. 1 to 3 .

As shown in FIG. 1, a semiconductor device is formed on a semiconductor wafer SCW having a semiconductor substrate SUB as a base. The semiconductor wafer SCW has a plurality of chip regions IMC in which a plurality of semiconductor imaging devices are to be formed. The chip regions IMC each have a rectangular planar shape and they are arranged in a matrix. There is a scribe region DLR between the chip regions IMC.

As shown in FIG. 2, the chip regions IMC each have a pixel portion and a peripheral circuit portion. The pixel portion is located at the center of the chip region IMC and the peripheral circuit portion is located in an area surrounding the pixel portion.

As shown in FIG. 3 , the pixel section mainly has a transfer transistor TMI, an amplification transistor AMI, and a selection transistor SMI, and for example, a plurality of so-called solid-state imaging devices constituted by them are arranged in a matrix. In FIG. 3, a plurality of transistors TMI are arranged in a matrix. Although the numbers of the amplification transistors AMI and the selection transistors SMI are only one, respectively, instead, a plurality of amplification transistors AMI or a plurality of selection transistors SMI may be arranged in a matrix.

The transfer transistor TMI has a transfer gate Tx, a photodiode PD and a capacitance region FD. The transfer gate Tx is a region serving as a gate electrode of the transfer transistor TMI. The photodiode PD is a photoelectric conversion element for converting incident light into an electrical signal, that is, charges such as electrons, by photoelectric conversion. The photodiode PD is partly a region for supplying charges when it receives light, so when the entire transfer transistor TMI is regarded as a MOS (Metal Oxide Semiconductor) transistor, the photodiode PD corresponds to a source region of the transistor. Capacitance region FD corresponds to a drain region of a conventional MOS transistor because it converts charges supplied from photodiode PD into electrical signals (voltage) and transfers them to another transistor (eg, amplification transistor AMI to be described later). The transfer transistor TMI as a whole is thus regarded as a transistor having a configuration similar to that of a MOS transistor.

The amplification transistor AMI is a MOS transistor for amplifying signal charges obtained by photoelectric conversion at the photodiode PD. The transfer transistor TMI is a MOS transistor for transferring signal charges accumulated after conversion at the photodiode PD to the amplification transistor AMI. The selection transistor SMI is a MOS transistor for selecting any one of row selection lines to which pixels arranged in a matrix are coupled and selecting a pixel to be coupled to the row selection line.

A trench isolation TI as an isolation region is formed so as to surround the respective transistors TMI, AMI, SMI (including the active region ACR in which the amplification transistor AMI and the selection transistor SMI are to be formed).

Referring to FIG. 4 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

FIG. 4 is a schematic cross-sectional view of a portion taken along line IV-IV of FIG. 3 . As shown in FIG. 4 , a transfer transistor TMI including the photodiode PD shown in FIG. 3 is formed on the main surface SI of the p-type substrate PSB1 corresponding to the semiconductor substrate SUB of FIG. 1 . The p-type substrate PSB1 is, for example, a p-type substrate made of silicon.

The p-type substrate PSB1 has on its main surface S1 a first p-type epitaxial layer PE1 formed by so-called epitaxial growth. The first p-type epitaxial layer PE1 has an upper surface covered with a second epitaxial layer PE2 formed by so-called epitaxial growth. In FIG. 4 , particularly on the left side, the second epitaxial layer PE2 is formed so as to cover the upper surface of the first p-type epitaxial layer PE1 . Each of the first epitaxial layer PE1 and the second epitaxial layer PE2 is made of silicon. The first p-type epitaxial layer PE1 has a higher p-type impurity concentration than the second p-type epitaxial layer PE2. Especially in this embodiment, the first p-type epitaxial layer PE1 may have a p-type impurity concentration higher than that of the p-type substrate PSB1. The second epitaxial layer PE2 has a thickness greater than that of the first epitaxial layer PE1.

The second epitaxial layer PE2 has two pixel regions, ie, a first pixel region RPx and a second pixel region GPx arranged along the direction of the main surface S1 of the p-type substrate PSB1. The first pixel region RPx and the second pixel region GPx are surrounded by the trench isolation TI in a shallow region, especially relatively close to the surface of the second p-type epitaxial layer PE2. This means that the first pixel region RPx and the second pixel region GPx are electrically insulated from each other by the trench isolation TI sandwiched therebetween.

The first pixel region RPx and the second pixel region GPx respectively have transfer transistors TMI at the surface (upper side of FIG. 4 ) of the second p-type epitaxial layer PE2. The transfer transistor TMI of the first pixel region RPx mainly has a photodiode PD1 (first photoelectric conversion element), a capacitor region FD, a gate insulating film GI, and a transfer gate Tx.

The photodiode PD1 exists right below the p-type region SPR formed in the surface of the second p-type epitaxial layer PE2. In other words, the photodiode PD1 is buried in the second p-type epitaxial layer PE2. The capacitive region FD is arranged in the surface of the second epitaxial layer PE2 at a distance from the photodiode PD1. The transfer gate Tx is located on the surface of the second epitaxial layer PE2 via the gate insulating film GI in the region sandwiched between the photodiode PD1 and the capacitance region FD.

The surface p-type region SPR is a region formed right above the photodiode PD1 and having a higher p-type impurity concentration than the second p-type epitaxial layer PE2. The guard ring GR is formed on the surface of the second p-type epitaxial layer PE2 and at the same time on the side of the photodiode PD1 (trench isolation TI) and has a p-type impurity concentration higher than that of the second p-type epitaxial layer PE2. area. Each of these regions SPR and GR is formed to suppress the expansion of the depletion layer near the photodiode PD1 and the recombination (disappearance) of photoelectrons.

The transfer transistor TM1 of the second pixel region GPx has a configuration substantially similar to that of the transfer transistor TMI of the first pixel region RPx, except that a photodiode PD2 (second photoelectric conversion element) is formed instead of the photodiode PD1 constituting the transfer transistor TMI. . Like the photodiode PD1, the photodiode PD2 is thus buried in the second p-type epitaxial layer PE2.

The photodiodes PD1 and PD2, and the capacitance region FD are each formed as an n-type impurity region in the second p-type epitaxial layer PE2, and they function as a source region and a drain region of an n-type MOS transistor, respectively. The photodiode PD1 is a device having a function of photoelectrically converting light incident thereon. The conversion of incident light into electrons (photoelectric conversion) itself does not need to occur in the photodiode PD1 as an n-type impurity region, and as will be described later, it may occur in a layer such as the p-type epitaxial layer PE2 or the p-type substrate PSB1. in other areas. However, the n-type impurity region has a role of collecting electrons converted by light, so the terms "photodiode PD1" and "photodiode PD2" used herein are defined to mean regions collecting electrons formed by photoelectric conversion.

In FIG. 3 , both the photodiode PD1 and the photodiode PD2 of FIG. 4 are referred to as "photodiode PD". The photodiode PD1 and the photodiode PD2 are different from each other in the average wavelength of light incident thereon.

More specifically, the photodiode PD1 is provided with an unillustrated red filter, so it receives the light irradiated on the photodiode PD1 as red light through the red filter. Similarly, the photodiode PD2 is equipped with, for example, an unshown green filter, so it receives the light irradiated on the photodiode PD2 as green light through the green filter. Photodiode PD2 may be provided with a blue filter instead of a green filter.

Therefore, the light that the photodiode PD1 can receive is red light, and it has a relatively long average wavelength (the longest wavelength in visible light). On the other hand, photodiode PD2 receives light (green or blue light) having an average wavelength shorter than that of light that photodiode PD1 can accept. Because the first pixel region RPx and the second pixel region GPx are arranged in the direction along the main surface S1 of the p-type substrate PSB1, the photodiode PD1 and the photodiode PD2 are arranged in the direction along the main surface SB1 of the p-type substrate PSB1 layout.

In the second pixel region GPx, the photodiode PD2 has a first injection region PJ1 (first p-type impurity region) thereunder and in the second epitaxial layer PE2. First implantation region PJ1 is formed by so-called ion implantation technique so as to cover the upper surface (and thus be in contact with the upper surface of first p-type epitaxial layer PE1), and has a higher p-type impurity concentration than second p-type epitaxial layer PE2.

On the other hand, as described above, the first pixel region RPx including the photodiode PD1 and the second pixel region GPx including the photodiode PD2 have a trench for electrically insulating these regions from each other at the boundary region therebetween. Slot isolation TI. The trench isolation TI in the second p-type epitaxial layer PE2 has a second implantation region PJ2 (second p-type impurity region) directly below the trench isolation. The second implantation region PJ2 is formed by a so-called ion implantation technique. The second implantation region PJ2 has a p-type impurity concentration higher than that of the second p-type epitaxial layer PE2.

The first injection region PJ1 formed in the second pixel region GPx preferably extends to a boundary portion between the first pixel region RPx and the second pixel region GPx with respect to a horizontal direction in the drawing. In this case, the second implantation region PJ2 is formed so as to reach the upper surface of the first implantation region PJ1 at the boundary portion (so that the second implantation region is in contact with the first implantation region PJ1 on the upper surface of the first implantation region PJ1 ). Also, the second implantation region PJ2 is preferably formed so as to be in contact with the trench isolation TI directly above at the uppermost portion. In other words, the second injection region PJ2 is preferably formed at a boundary portion between the first pixel region RPx and the second pixel region GPx so as to couple the first injection region PJ1 and the trench isolation TI to each other while being sandwiched therebetween. .

But it is preferable that the first injection region PJ1 is formed only in the second pixel region GPx and at a boundary portion between the first pixel region RPx and the second pixel region GPx, and is not formed in the first pixel region RPx. Since the first injection region PJ1 is formed on the lowermost side (on the side of the p-type substrate PSB1) of the second p-type epitaxial layer PE2 in the second pixel region GPx, the second p-type epitaxial layer PE2 in the second pixel region GPx The thickness of the p-type epitaxial layer PE2 is obviously smaller than the thickness of the second p-type epitaxial layer PE2 in the first pixel region RPx.

By setting the p-type impurity concentration of the second p-type epitaxial layer PE2 to be lower than the impurity concentrations of the first p-type epitaxial layer PE1 and the first and second implanted regions PJ1 and PJ2, the internal residual defect density can be controlled as much as possible. probably low. On the other hand, the defect density in the p-type substrate PSB1 is controlled as high as possible. Therefore, the residual defect density in the p-type substrate PSB1 is higher than the defect density of the second p-type epitaxial layer PE2.

The p-type substrate PSB1 has a mixture of minute defect(s) D1 and extended defect D2a. The term "defect density" refers to the density of both the minute defects D1 and the extended defects D2a or only the extended defects D2a.

Controlling the defect density in the p-type substrate PSB1 so that the lifetime of electrons serving as minority carriers in the p-type substrate PSB1 is sufficiently shorter than the carrier lifetime of electrons in the p-type epitaxial layer PE2, for example, more than 10 ns but not greater than 500 ns .

Microdefects D1 are formed by heat treatment causing the growth of microscopic oxide precipitation nuclei called "BMD" (bulk microdefects) in the p-type substrate PSB1. The extended defect D2a is formed by heat-treating the p-type substrate PSB1 while introducing an impurity element such as argon or silicon into the p-type substrate PSB1 by an ion implantation technique. They are defects (second extended defects) due to the impurity elements thus introduced.

Referring to FIGS. 5 to 10 , a method of manufacturing the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described. In FIGS. 5 to 10 , area processing similar to that of FIG. 4 is shown.

As shown in FIG. 5 , first, a p-type substrate PSB1 that is a p-type substrate made of, for example, silicon and has a main surface S1 is provided. The p-type substrate PSB1 has a p-type impurity concentration, for example, a boron concentration of preferably 5E14 cm ⁻³ or more but not more than 1E16 cm ⁻³ . The p-type substrate PSB1 is formed so as to have a p-type impurity concentration equal to the impurity concentration in the second p-type epitaxial layer PE2 to be described later. By heat-treating the p-type substrate PSB1 by a generally known method, the oxygen in the p-type substrate PSB1 forms tiny defect nuclei Dc1 , such as nuclei for forming BMD. A plurality of minute defect nuclei Dc1 thus formed are dispersed in the p-type substrate PSB1.

As shown in FIG. 6, an impurity element such as silicon or argon is introduced into p-type substrate PSB1 from above main surface S1 of p-type substrate PSB1 by employing a conventional ion implantation technique. Subsequently, the p-type substrate PSB1 is heat-treated again by a generally known method, so that introduced impurity elements such as silicon or argon are embedded in the substrate as extended defects D2a such as dislocation loops. The microdefect nuclei Dc1 are grown into microdefects D1 by such heat treatment.

The dose of impurity elements introduced by the ion implantation technique is preferably an amount sufficient to form extended defects, for example, more than 5E14 cm ⁻² .

As shown in FIG. 7 , a first p-type epitaxial layer PE1 made of silicon is formed on main surface S1 of p-type substrate PSB1 (so as to be in contact with the upper surface of main surface S1 ) by typical epitaxial growth. The first p-type epitaxial layer PE1 contains, for example, boron as a p-type impurity. The concentration of boron is preferably set to, for example, 4E17 cm ^-3 or more but not more than 1E20 cm ^-3 . The thickness of the first p-type epitaxial layer PE1 is preferably set to be 0.5 μm or more but not more than 3 μm, more preferably 1 μm or more but not more than 2 μm.

As shown in FIG. 8, the second p-type epitaxial layer PE2 made of silicon is formed so as to cover the upper surface of the first p-type epitaxial layer PE1. The second p-type epitaxial layer PE2 also contains, for example, a p-type impurity of boron. The concentration of boron is preferably set to, for example, 5E14 cm ^-3 or more but not more than 1E16 cm ^-3 . It is preferably set to be equal to the concentration of boron contained in the p-substrate PSB1. Although the thickness of the second p-type epitaxial layer PE2 determines the collection sensitivity of hole electrons from the red light collected by the photodiode PD1 and changes according to the design scheme of the semiconductor imaging device, in the visible light with an IR (infrared) cut filter inserted In the case of an image sensor, it is basically preferably set to 2 μm or more but not more than 6 μm, more preferably 3 μm or more but not more than 5 μm.

The above-mentioned formation of the tiny defects D1 and the implant-induced defects D2a makes the defect density of the p-type substrate PSB1 higher than the defect density of the second p-type epitaxial layer PE2.

Subsequently, shallow grooves are formed in the upper surface of the second p-type epitaxial layer PE2. The term "shallow groove" as used herein refers to a groove shallow enough not to reach the first p-type epitaxial layer PE1 under the second p-type epitaxial layer PE2. It is preferable to form a trench having a depth of, for example, 150 nm or more but not more than 400 nm. Grooves are formed in regions respectively surrounding the first pixel region RPx and the second pixel region GPx (regions in which trench isolations TI are to be formed) in plan view.

Subsequently, the groove is filled with an insulating film such as a silicon oxide film, for example, by employing typical CVD (Chemical Vapor Deposition). The insulating film on the second p-type epitaxial layer PE2 is removed by CMP (Chemical Mechanical Polishing). In this way, trench isolation TI is formed.

As shown in FIG. 9, a mask pattern of a photoresist PHR (photoreceptor) is formed only in the first pixel region RPx surrounded by the trench isolation TI by employing a typical photolithography method. Such a mask pattern may be formed so as to include a portion of a boundary portion between the first pixel region RPx and the second pixel region GPx.

Subsequently, by using a mask pattern of photoresist PHR, a first implantation region PJ1 is formed by typical ion implantation so as to cover in the second p-type epitaxial layer PE2 and to form a photodiode PD2 in the second pixel region GPx The upper surface of the first p-type epitaxial layer PE1 under the region. In other words, the first implantation region PJ1 is formed in the lowermost portion of the second p-type epitaxial layer PE2 (on the p-type substrate PSB1 side) so as to have a higher p-type impurity concentration than the second p-type epitaxial layer PE2. As an example, when the second p-type epitaxial layer PE2 has a thickness of 4 μm, boron impurities are implanted at an energy of 2.3 MeV and a dose of 2E13 cm ⁻² .

As shown in FIG. 10, only in the first pixel region RPx and the second pixel region GPx each surrounded by the trench isolation TI, a mask pattern of a photoresist PHR (photoreceptor) is formed using a typical photolithography method. In this case, for example, boron is then introduced directly under the trench isolation TI by typical ion implantation techniques. Therefore, the second injection region PJ2 is formed between the first pixel region RPx (the region where the photodiode PD1 is to be formed) and the second pixel region GPx (the region where the photodiode PD2 is to be formed) in the second p-type epitaxial layer PE2 at the boundary between.

The boron to be introduced is provided to penetrate the trench isolation TI and reach the second p-type epitaxial layer PE2 directly below. For the introduction of boron, multi-stage implantation is preferably used. More specifically, the energy is changed stepwise, for example, between 200keV and 2.0MeV while introducing boron as an impurity. This makes it possible to form the second implantation region PJ2 having a higher p-type impurity concentration than the second p-type epitaxial layer PE2 while bringing the second implantation region PJ2 into contact with the first implantation region PJ1 at the lowermost portion of the second implantation region. Also, a second implantation region PJ2 may also be formed to contact the trench isolation TI at the uppermost portion of the region. Implantation is followed by removal of the photoresist PHR of FIG. 10 .

As shown in FIG. 4, by a typical photolithography method and by implanting p-type impurity elements into the bottom of the trench isolation TI and the sides of the trench isolation TI to form on the respective sides of the photodiodes PD1 and PD2 to be formed Guard ring GR.

Subsequently, a gate insulating film GI and a transfer gate Tx are formed at desired positions, respectively. More specifically, a gate insulating film GI is formed on the upper surface of the second p-type epitaxial layer PE2 by thermal oxidation treatment. A polysilicon film or the like to be a transfer gate Tx is deposited on the gate insulating film GI as a gate electrode. Subsequently, the gate insulating film GI and polysilicon and the like are patterned into the gate insulating film GI and the transfer gate Tx as shown in FIG. 4 .

Subsequently, in a region on the left side of the transfer gate Tx of FIG. 4, an n-type impurity region is formed using a typical photolithography method and ion implantation technique. Therefore, the photodiode PD1 is formed in the first pixel region RPx and the photodiode PD2 is formed in the second pixel region GPx, so they are arranged in the direction along the main surface S1 of the p-type substrate PSB1 on the second p-type epitaxial layer In PE2. Therefore, the first and second pixel regions RPx and GPx have a capacitance region FD in a region on the right side of the transfer gate Tx of FIG. 4 . Photodiodes PD1 and PD2 are formed at positions adjacent to the guard ring GR.

Although filters are not illustrated, the first pixel region RPx is provided with a red filter and the second pixel region GPx is provided with a green or blue filter. The photodiode PD2 receives light having an average wavelength shorter than that of the photodiode PD1.

The photodiodes PD1 and PD2 have n-type impurity regions directly thereon formed by employing typical photolithography methods and ion implantation techniques, and thus have surface p-type regions SPR.

Finally, heat treatment is performed using a generally known method to form a structure as shown in FIG. 4 . Subsequently, effects and advantages of the present embodiment will be described with reference to the comparative example of FIG. 11 and the graphs of FIGS. 12 to 15 .

As shown in FIG. 11 , the configurations of a photodiode PD of a semiconductor imaging device constituting a semiconductor device as a comparative example and a transfer gate TMI including the photodiode PD have the following differences. Specifically, in FIG. 11, the n-type substrate NSB is used instead of the p-type substrate PSB1 (but the p-type substrate PSB1 is allowed to be used). Instead of the first p-type epitaxial layer PE1 of FIG. 4 , the first implantation region PJ1 is formed by ion implantation technology. Instead of the second p-type epitaxial layer PE2 of FIG. 4 , the first implantation region PJ1 has thereon a third implantation region PJ3 formed by an ion implantation technique, and the third implantation region PJ3 has photodiodes PD1 and PD2 etc. therein. The second implantation region PJ2 is formed using an ion implantation technique at the boundary between the first pixel region RPx and the second pixel region GPx so as to reach the first implantation region PJ1.

In this embodiment, the p-type epitaxial layers PE1 and PE2 are formed by epitaxial growth. On the other hand, in the comparative example, the implanted regions PJ1 and PJ3 corresponding to them were respectively formed using the ion implantation technique, but they were made of silicon similar to the present embodiment.

As shown in Figure 12, the light wavelength (nm) incident on the photodiode is plotted along the abscissa, while the light absorption ratio (arbitrary unit is adopted on the ordinate) is plotted by the photodiode in the semiconductor imaging device on the ordinate. Absorption ratio of electrons generated by photoelectric conversion of received light. It should be noted that the photodiodes are formed in silicon.

It is apparent from FIG. 12 that when the collection region extends from the formation surface to a deep position (4 μm) compared to the collection region extending from the surface of the photodiode to a shallow region (2 μm), passing through the (R (red) ) electrons generated by photoelectric conversion of light are collected by photodiodes at a very high rate. On the other hand, when electrons generated by photoelectric conversion of (G (green)) light having a short wavelength are collected, in the collection region extending from the surface only to a shallower position and in the collection region extending from the surface to a deeper position There is no big difference between. In both cases described above, electrons can be collected by the photodiode at a relatively high rate compared with electrons generated by light having a long wavelength.

In short, it is desired that a photodiode that receives light having a particularly long wavelength, ie, red light, easily collects electrons generated by photoelectric conversion at a deep position from the surface of the semiconductor imaging device. In other words, a photodiode for red light is expected to have high sensitivity to electrons generated by photoelectric conversion at a deep position from the surface of the semiconductor imaging device.

Long-wavelength light may penetrate deeper into a semiconductor imaging device than short-wavelength light. A configuration that allows collection of electrons at a deeper position by photoelectric conversion can improve the sensitivity of the photodiode to long-wavelength light.

When the ion implantation technique is used to form the p-type region PJ3 in which the photodiode PD1 receiving long-wavelength light is formed as shown in FIG. A thin film is formed in a deeper region by ion implantation technology, but it depends on the thickness or width of the region thus formed), because ion implantation technology is not suitable for forming an impurity region extending from the surface to a relatively deep region.

Therefore, as shown in FIG. 4, p-type region PE2 is formed by epitaxial growth instead of p-type region PJ3. Since the thickness of the second p-type epitaxial layer PE2 formed by epitaxial growth is freely controlled relative to the p-type region PJ3 formed by ion implantation technology, a p-type impurity region extending from the surface to a relatively deep region can be formed. This means that the second p-type epitaxial layer PE2 in FIG. 4 can extend to a deeper position than the third implantation region PJ3 in FIG. 11 . Electrons generated by photoelectric conversion that have occurred in a particularly deep region of the p-type impurity region PE2 can therefore be collected with high sensitivity by the photodiode PD1. Therefore, the photodiode PD1 may have enhanced sensitivity with respect to electrons.

In addition, since the p-type epitaxial layer PE2 is formed by epitaxial growth, the density of residual defects contained in the p-type epitaxial layer PE2 can be made smaller than that contained in regions correspondingly formed by ion implantation techniques. This allows the photodiode PD1 to collect electrons generated in the p-type epitaxial layer PE2 at a higher rate.

In FIG. 13, the histogram shows electrons generated by photoelectric conversion of red light (having a wavelength of 635 nm) and electrons generated by photoelectric conversion in the comparative example shown in FIG. 11 and the semiconductor imaging device of the present embodiment shown in FIG. The internal quantum efficiency (arbitrary units on the ordinate) of each of the electrons generated by the photoelectric conversion of green light (with a wavelength of 530 nm). The term "internal quantum efficiency" as used herein refers to the collection ratio of electrons obtained by conversion collected by a photodiode.

It is particularly apparent from FIG. 13 that, as in this embodiment, by forming the second p-type epitaxial layer PE2 having a depth deeper than that of the third injection region PJ3 of the comparative example, photoelectric conversion by red light can be greatly improved. The resulting electron collection efficiency. The collection efficiency of electrons generated by photoelectric conversion of green light is also slightly improved.

It can also be apparent from FIG. 14 that, as shown in the graph of FIG. 14 , the thickness (μm) of the second p-type epitaxial layer PE2 is plotted along the abscissa and the thickness (μm) of the second p-type epitaxial layer PE2 is plotted along the ordinate such as that produced by photoelectric conversion of red light. The internal quantum efficiency of the electrons (the ordinate is in arbitrary units). FIG. 14 suggests that the collection efficiency of electrons increases as the thickness (μm) of the second p-type epitaxial layer PE2 increases.

The long-wavelength red light may penetrate deeper into the film and the substrate, so photoelectric conversion may occur in the semiconductor substrate SUB under the second p-type epitaxial layer PE2. When this semiconductor substrate SUB is an n-type substrate NSB, for example, the same as the comparative example of FIG. The electrons generated because the n-type substrate has the property of easily collecting electrons compared with the p-type substrate. This causes a decrease in the rate of electrons collected by the photodiode PD1, resulting in deterioration of the sensitivity of the photodiode PD1 to electrons.

For example, as in the present embodiment of FIG. 4 , a p-type substrate PSB1 is used, so it is possible to suppress collection of electrons by such a substrate and enhance sensitivity to electrons generated by photoelectric conversion that has occurred in the substrate.

The p-type substrate PSB1 is formed directly below the first pixel region RPx and the second pixel region GPx, so for example, in the p-type substrate PSB1 directly below the first pixel region RPx, light that has been received by the photodiode PD1 generates The electrons easily enter the second pixel region GPx adjacent thereto. Subsequently, electrons generated by light incident on the photodiode PD1 may be collected by the photodiode PD2. This phenomenon is called "electron crosstalk", and it causes deterioration of the electron detection sensitivity of the photodiodes PD1 and PD2 and color mixing. This means that merely substituting the p-type substrate PSB1 for the n-type substrate NSB increases electron crosstalk in the p-type substrate PSB1 , which leads to degradation of electron detection sensitivity and color mixing of photodiodes PD1 and PD2 .

Also, when an optical signal at a level exceeding the saturation signal level is input, there is a possibility of a blur phenomenon that causes photoelectrons not to be collected by a photodiode that should collect them but by another photodiode adjacent thereto.

Thickening the second p-type epitaxial layer PE2 to increase the internal quantum efficiency of the photodiode PD1 increases the possibility of electron crosstalk.

In FIG. 15 , the abscissa of this graph, similar to that of the graph of FIG. 14 , shows the film thickness. In each solid line of the graph shown with a solid line in FIG. 15 , the internal quantum efficiency of, for example, electrons generated by red light is plotted along the ordinate (the ordinate is in arbitrary units). In the respective lines of the graph shown with dotted lines in FIG. 15 , the electron crosstalk, ie the collection ratio of electrons resulting, for example, from photoelectric conversion of red light in an undesired photodiode is plotted along the ordinate.

The graph shown with solid lines and squares in FIG. 15 is the same as the graph of FIG. 14 , while the graph shown with dashed lines and squares in FIG. 15 shows electronic crosstalk in a situation similar to the graph of FIG. 14 incidence rate. They were drawn "without dislocation loops", meaning that no injection-induced defect D2a was intentionally formed. An increase in the thickness of the second p-type epitaxial layer PE2 to increase the internal quantum efficiency tends to increase the occurrence ratio of electron crosstalk, which is assumed to be caused by an increase in the occurrence ratio of photoelectric conversion in the p-type substrate PSB1 in the deeper region .

In this embodiment, by using the method shown in FIGS. 5 and 6, the semiconductor substrate SUB is converted into a p-type substrate PSB1, that is, a substrate containing p-type impurities, and at the same time, the p-type substrate PSB1 is made The defect density of is higher than the defect density of the second p-type epitaxial layer PE2. More specifically, many microscopic defects D1 such as implantation-induced defects D2a of dislocation loops and oxygen-derived BMDs are preliminarily formed in the p-type substrate PSB1. Subsequently, the electrons generated in the p-type substrate PSB1 are recombined due to these defects and disappear in the p-type substrate PSB1, thereby greatly reducing the carrier lifetime of the electrons. This makes it possible to reduce the possibility of electrons generated in the p-type substrate PSB1 causing electron crosstalk. Therefore, electrons generated in the p-type substrate PSB1 can be effectively eliminated by recombination due to the intentionally formed defects D1 and D2.

Referring again to FIG. 15 , when implantation-induced defects D2a such as dislocation loops are intentionally formed in the p-type substrate PSB1 (“dislocation loops” in the graph), the occurrence of electronic crosstalk is reduced compared to when no defects are formed. ratio. When the oxygen concentration in the substrate is controlled, the occurrence ratio of electron crosstalk is further reduced, and thus also the composite defect density D2b formed in the substrate by the minute defect D1 to be described later ("substrate" in the graph) is controlled. Life Control").

In short, in this embodiment, electrons generated by photoelectric conversion in the second p-type epitaxial layer PE2 are efficiently collected by allowing the photodiode PD1 to efficiently collect electrons generated by photoelectric conversion in the second p-type epitaxial layer PE2, and conversely, allowing electrons generated by photoelectric conversion in the p-type substrate PSB1 The rapid disappearance of the electrons can achieve the two purposes of the trade-off relationship, that is, high internal quantum efficiency and low electron crosstalk.

In this embodiment, the first p-type epitaxial layer PE1 is sandwiched between the p-type substrate PSB1 and the second p-type epitaxial layer PE2, and the first p-type epitaxial layer PE1 serves as the p-type substrate PSB1 and the second p-type epitaxial layer PE1. Type epitaxial layer PE2 between the boundary portion. In addition, the first p-type epitaxial layer PE1 has a higher p-type impurity concentration than the second p-type epitaxial layer PE2. The first p-type epitaxial layer PE1 thus functions as a potential barrier for suppressing electrons generated in the p-type substrate PSB1 from entering the second p-type epitaxial layer PE2.

This also applies to the first implantation region PJ1 and the second implantation region PJ2 having the p-type impurity concentration set higher than that of the second p-type epitaxial layer PE2. For example, the first injection region PJ1 functions as a barrier for suppressing entry of electrons from the p-type substrate PSB1 into the second p-type epitaxial layer PE2 in the second pixel region GPx. The second injection region PJ2 functions as a potential barrier for suppressing movement of electrons that have been obtained through photoelectric conversion between the first pixel region RPx and the second pixel region GPx in the second p-type epitaxial layer PE2.

The second implantation region PJ2 is in contact with the first implantation region PJ1 at the upper surface thereof, so that in regions where the first implantation region PJ1 and the second implantation region PJ2 adjoin each other, these regions are connected to each other and no space is formed between these regions ( no injection region is formed). The second p-type epitaxial layer PE2 of each of the first pixel region RPx and the second pixel region GPx is completely surrounded by the injection regions PJ1 and PJ2 below the epitaxial layer, so the injection regions PJ1 and PJ2 suppress electron crosstalk, enabling further The sensitivity of the photodiode PD1 for collecting electrons obtained by photoelectric conversion of the photodiode PD1 is increased.

Assuming that the second implantation region PJ2 is in contact with the trench isolation TI at its upper surface, the second p-type epitaxial layer PE2 of the first pixel region RPx and the second pixel region GPx is completely formed by the implantation region at the upper and lower parts of the epitaxial layer. PJ1 and PJ2 surround. This further enhances the electronic crosstalk suppression effect of the injection regions PJ1 and PJ2.

Although the first injection region PJ1 is formed to cover the upper surface of the first p-type epitaxial layer PE1 in the second pixel region GPx, the first injection region PJ1 is not formed in the first pixel region RPx. This means that in a pixel region having a photoelectric conversion element such as a photodiode PD1 receiving a relatively long wavelength, the first injection region PJ1 covering the upper surface of the first p-type epitaxial layer PE1 is not formed. Therefore, the apparent thickness of the second p-type epitaxial layer PE2 in the second pixel region GPx is smaller than that in the first pixel region RPx. The photodiode PD2 of the second pixel region GPx capable of receiving short-wavelength light can collect electrons obtained by photoelectric conversion in a shallow region at a high rate, and thus no functional problem occurs.

In this embodiment, the first p-type epitaxial layer PE1 and the second p-type epitaxial layer PE2 are made of the same material, namely silicon, so the possibility of leakage current at the interface between them can be reduced.

(second embodiment)

First, with reference to FIG. 16 , configurations of a photodiode PD constituting a semiconductor imaging device as a semiconductor device of the present embodiment and a transfer transistor TMI including the photodiode PD will be described in detail.

Fig. 16 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 16, this embodiment has a configuration basically similar to that of the first embodiment shown in FIG. 4, but differs from the first embodiment in the following points.

Specifically, in this embodiment, the first p-type epitaxial layer PE1 is composed of a plurality of different p-type epitaxial layers. From the p-type substrate PSB1 side, it has a stacked film sequentially composed of heavily doped p-type epitaxial layer PE1a, lightly doped p-type epitaxial layer PE1b and heavily doped p-type epitaxial layer PE1c. The p-type impurity concentration in the heavily doped p-type epitaxial layer PE1a and the heavily doped p-type epitaxial layer PE1c is higher than the p-type impurity concentration in the second p-type epitaxial layer PE2. For example, it is substantially equal to the p-type impurity concentration in the first p-type epitaxial layer PE1 of the first embodiment. The p-type impurity concentration in the lightly doped p-type epitaxial layer PE1b is substantially equal to the p-type impurity concentration in the second p-type epitaxial layer PE2.

The heavily doped p-type epitaxial layer PE1a (substrate-adjacent layer) disposed on the side closest to the p-type substrate PSB1 has composite defects D2b (first extended defects). The composite defect D2b is due to the p-type impurity in the heavily doped p-type epitaxial layer PE1a, such as boron in the heavily doped p-type epitaxial layer PE1a, diffused from the p-type substrate PSB1 adjacent to the heavily doped p-type epitaxial layer PE1a Formed by a reaction between oxygen precipitation nuclei (for example, those constituting minute defects D1) entering the p-type epitaxial layer PE1a.

In short, from the viewpoint of containing a high concentration of p-type impurities (boron) for forming composite defects D2b and contributing to bonding with oxygen nuclei in the p-type substrate PSB1 as much as possible, the heavy The doped p-type epitaxial layer PE1a is formed at a position adjacent to the p-type substrate PSB1.

Among the layers constituting the first p-type epitaxial layer PE1, the oxygen concentration in the heavily doped p-type epitaxial layer PE1a disposed on the side closest to the p-type substrate PSB1 is higher than that of the heavily doped p-type epitaxial layer PE1a. Oxygen concentration in layers constituting the first p-type epitaxial layer PE1.

The heavily doped p-type epitaxial layer PE1c as the uppermost layer has a role similar to that of the first p-type epitaxial layer PE1 in the first embodiment. Specifically, it separates the p-type substrate PSB1 and the second p-type epitaxial layer PE2 and is arranged to suppress free movement of electrons between them. The lightly doped p-type epitaxial layer PE1b sandwiched between the p-type epitaxial layer PE1a and the p-type epitaxial layer PE1c functions as a buffer layer therebetween.

The configuration of this embodiment other than the above-described epitaxial layer is basically similar to that of the first embodiment shown in FIG. 4 , and thus the same components are denoted by the same reference symbols and repeated explanations are omitted.

Referring to FIGS. 17 to 21 , a method of manufacturing the photodiode PD constituting the semiconductor imaging device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described. 17 to 21 show processing of the same area as in FIG. 16 .

As shown in FIG. 17, a first p-type epitaxial layer PE1 including a plurality of layers is formed on the main surface of the p-type substrate PSB1 as provided in the first embodiment by typical epitaxial growth. The term "plurality of layers" used herein refers to, for example, stacking a heavily doped p-type epitaxial layer PE1a, a lightly doped p-type epitaxial layer PE1b, and a heavily doped p-type epitaxial layer PE1c sequentially from the side close to the p-type substrate PSB1. Get three layers. The heavily doped p-type epitaxial layers PE1a and PE1c each contain boron as a p-type impurity, and the concentration is equal to the concentration of boron in the first p-type epitaxial layer PE1 of the first embodiment. More specifically, the concentration of boron is preferably set to, for example, 4E17 cm ^-3 or more but not more than 1E20 cm ^-3 . The lightly doped p-type epitaxial layer PE1b contains boron as a p-type impurity, and has a concentration equal to that of boron in the second p-type epitaxial layer PE2 of the first embodiment. More specifically, the concentration of boron is preferably set to, for example, 5E14 cm ^-3 or more but not more than 1E16 cm ^-3 .

Among the layers constituting the first p-type epitaxial layer PE1, the oxygen concentration in the heavily doped p-type epitaxial layer PE1a disposed on the side closest to the p-type substrate PSB1 is set to be higher than that of the heavily doped p-type epitaxial layer PE1a. The oxygen concentration in the layers constituting the first p-type epitaxial layer PE1a other than the p-type epitaxial layer PE1a. In this process, the minute defect core Dc1 can be grown into a minute defect D1 by heat treatment.

Referring to FIG. 18, the structure formed in FIG. 17 is heat treated. Through this heat treatment, oxygen contained in the p-type substrate PSB1 (including minute defects D1) diffuses into the heavily doped p-type epitaxial layer PE1a. Through this diffusion, oxygen contained in the heavily doped p-type epitaxial layer PE1a (including minute defects D1) reacts with boron, that is, the p-type impurity introduced into the heavily doped p-type epitaxial layer PE1a, thereby The composite defect D2b is formed in the type epitaxial layer PE1a.

As shown in FIGS. 19 to 21, by performing processing similar to the first embodiment shown in FIGS. 8 to 10, and then performing subsequent steps similar to the first embodiment shown in FIG. structure shown.

Effects and advantages of this embodiment will be described below.

The recombination defect D2b, similar to the implantation-induced defect D2a in the p-type substrate PSB1 in the first embodiment, has the effect of ending the lifetime of carriers to allow the generation of photoelectric conversion in the p-type substrate PSB1 Electrons disappear quickly. Therefore, the existence of the heavily doped p-type epitaxial layer PE1a can suppress the occurrence of electronic crosstalk or blur caused by electrons in the p-type substrate PSB1.

The heavily doped p-type epitaxial layer PE1a can also serve as an oxygen diffusion barrier layer. Specifically, the heavily doped p-type epitaxial layer PE1a has the function of suppressing the diffusion of oxygen in the p-type substrate PSB1 and, for example, tiny defects D1 derived therefrom in the direction of the second p-type epitaxial layer PE2. This makes it possible to suppress the entry of extended defects into the second p-type epitaxial layer PE2, and thus suppress the disappearance of electrons in the second p-type epitaxial layer PE2 due to recombination (reduction in electron lifetime). Therefore, the photodiode PD1 has enhanced sensitivity.

In this embodiment, the composite defect D2b is formed only by heat treatment, instead of the implantation-induced defect D2a formed by the ion implantation technique in the first embodiment. Omitting the step of employing ion implantation techniques for forming extended defects can result in cost reduction.

As described above, among the layers constituting the first p-type epitaxial layer PE1, the heavily doped p-type epitaxial layer PE1a is formed to have a higher oxygen concentration than the other p-type epitaxial layers PE1b and PE1c due to the p-type substrate Oxygen contained in PSB1 (including microdefects D1 ) diffuses into heavily doped p-type epitaxial layer PE1 a which is a substrate-adjacent layer closest to p-type substrate PSB1 . The oxygen concentration of the heavily doped p-type epitaxial layer PE1a is higher than that of other p-type epitaxial layers will increase the formation efficiency of the composite defect D2 in the heavily doped p-type epitaxial layer PE1a, and enhance the formation efficiency of the heavily doped p-type epitaxial layer PE1a function as a barrier.

(third embodiment)

Referring to FIG. 22 , the configuration of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 22 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 22, a p-type substrate PSB2 having a higher p-type impurity concentration than p-type substrate PSB1 in FIG. 16 is used as a semiconductor substrate SUB. More specifically, the p-type impurity concentration of the p-type substrate PSB2 is equal to the p-type impurity concentration of the heavily doped p-type epitaxial layer PE1c constituting the first p-type epitaxial layer PE1. Also, the p-type impurity concentration of the first p-type epitaxial layer PE1 is equal to the p-type impurity concentration of the p-type epitaxial layer PE1 of the first and second embodiments. In this embodiment, the p-type impurity concentration of the p-type substrate PSB2 is much higher than the p-type impurity concentration of the second p-type epitaxial layer PE2.

The p-type substrate PSB2 contains tiny defects D1 and composite defects D2b. Formed due to a reaction between p-type impurities such as boron in the p-type substrate PSB2 and oxygen precipitation nuclei (such as those constituting minute defects D1) diffused into the p-type substrate PSB2 in the p-type substrate PSB2 Compound Defect D2b.

The first p-type epitaxial layer PE1 on the main surface of the p-type substrate PSB2 includes a plurality of p-type epitaxial layers different from each other, and it has stacked lightly doped p-type epitaxial layers PE1b sequentially from the side of the p-type substrate PSB2 And heavily doped p-type epitaxial layer PE1c. They are similar to the second embodiment.

This means that in this embodiment, the heavily doped p-type epitaxial layer PE1a of the second embodiment in which the composite defect D2b is formed is integrated with the p-type substrate PSB2. The p-type impurity concentration of the p-type substrate PSB2 is therefore high because of the high p-type impurity concentration of the heavily doped p-type epitaxial layer PE1a.

Except for the above-described epitaxial layer, the configuration of this embodiment is basically similar to that of the second embodiment shown in FIG. 16 , so the same components are denoted by the same reference symbols, and repeated explanations are omitted.

Referring to FIGS. 23 to 26 , a method of manufacturing the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described. 23 to 26 show processing of the same area as FIG. 22 .

As shown in FIG. 23, a p-type substrate PSB2 is provided as a p-type substrate made of, for example, silicon. The concentration of p-type impurities such as boron in p-type substrate PSB2 is set to 4E17 cm ^-3 or more but not more than 1E20 cm ^-3 , which is higher than that of p-type substrate PSB1 of the first embodiment, for example. The p-type substrate PSB2 is heat-treated by a generally known method to form oxygen in the p-type substrate PSB2 as, for example, minute defect nuclei Dc1 for forming BMD.

As shown in FIG. 24, the first p-type epitaxial layer PE1 composed of a plurality of layers is formed by typically epitaxial growth on the main surface of the p-type substrate PSB2. The term "plurality of layers" used herein refers to, for example, two layers formed by sequentially stacking a lightly doped p-type epitaxial layer PE1b and a heavily doped p-type epitaxial layer PE1c from the side close to the p-type substrate PSB2. The heavily doped p-type epitaxial layer PE1c contains boron as a p-type impurity at a concentration equal to that of boron in the first p-type epitaxial layer PE1 of the first embodiment. The concentration of boron is preferably set to, for example, 4E17 cm ^-3 or more but not more than 1E20 cm ^-3 . The lightly doped p-type epitaxial layer PE1b contains boron as a p-type impurity at a concentration equal to that of boron in the second p-type epitaxial layer PE2 of the first embodiment. The concentration of boron is preferably set to, for example, 5E14 cm ^-3 or more but not more than 1E16 cm ^-3 . By heat treatment, the minute defect core Dc1 can be grown into a minute defect D1.

As shown in FIG. 25, the structure formed in FIG. 24 is subjected to heat treatment. Through this heat treatment, oxygen contained in p-type substrate PSB2 (including minute defects D1) diffuses and reacts with boron as a p-type impurity in p-type substrate PSB2, thereby forming complex defects D2b in p-type substrate PSB2.

As shown in FIG. 26, the second p-type epitaxial layer PE2 made of silicon is formed so as to cover the upper surface of the first p-type epitaxial layer PE1c. The second p-type epitaxial layer PE2 also contains, for example, boron as a p-type impurity. It is preferable to set the concentration of boron, for example, to 5E14 cm ^-3 or more but not more than 1E16 cm ^-3 . Therefore, in the present embodiment, p-type impurities are formed in p-type substrate PSB2 so that the p-type impurity concentration in p-type substrate PSB2 is higher than the p-type impurity concentration in second p-type epitaxial layer PE2. Subsequently, processing similar to that of the first embodiment shown in FIGS. 8 to 10 is performed, followed by subsequent steps similar to that of the first embodiment shown in FIG. 10 , thereby forming the structure shown in FIG. 22 .

Effects and advantages of this embodiment will be described below. In addition to the effects and advantages similar to those of the second embodiment, this embodiment has the following effects and advantages.

In this embodiment, the p-type impurity concentration in the p-type substrate PSB2 is set to be much higher than the impurity concentration of the second p-type epitaxial layer PE2. More specifically, the p-type impurity concentration in the p-type substrate PSB2 is as high as that of the heavily doped p-type epitaxial layer PE1a in the second embodiment. The heavily doped p-type epitaxial layer PE1a in the second embodiment is thus integrated with the semiconductor substrate (p-type substrate PSB2). This makes it possible to omit the step of forming the heavily doped p-type epitaxial layer PE1a, resulting in a reduction in the number of steps and a reduction in cost.

In this embodiment, since the p-type impurity concentration of the p-type substrate PSB2 is high, the relationship between the p-type impurities in the p-type substrate PSB2 and the oxygen (including the tiny defect core Dc1) in the p-type substrate PSB2 can be enhanced. , which is highly effective for forming recombination defect D2b in p-type substrate PSB2. Since the p-type substrate PSB2 is rich in recombination defects D2b, the carrier lifetime of electrons in the p-type substrate PSB2 can be reduced.

(fourth embodiment)

Referring to FIG. 27 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

FIG. 27 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in FIG. 4 . As shown in FIG. 27, a plurality of extended defects D2a originating from an impurity element such as argon or silicon introduced into the p-type substrate PSB1 constitutes the buried layer BRD in the p-type substrate PSB1.

The buried layer BRD is located in a region deeper than the main surface of the p-type substrate PSB1, and the buried layer BRD does not adjoin the main surface of the p-type substrate PSB1. Since the buried layer BRD contains a large amount of impurity elements for forming the extended defect D2a, the p-type impurity concentration of the buried layer is higher than that of the portion of the p-type substrate PSB1 other than the buried layer BRD.

Although the buried layer BRD is located in the p-type substrate PSB1, it is, for example, similar to the heavily doped p-type epitaxial layer PE1a of the second embodiment from the viewpoint of p-type impurity concentration. Because the region above the buried layer BRD (on the side of the second p-type epitaxial layer PE2) is a low p-type impurity concentration region similar to the region of the p-type substrate PSB1 below the buried layer BRD in FIG. From the viewpoint of the p-type impurity concentration, it is, for example, similar to the lightly doped p-type epitaxial layer PE1b of the second embodiment. The p-type substrate PSB1 has on its main surface a single layer similar to the heavily doped p-type epitaxial layer PE1c of the second embodiment.

It is assumed that the heavily doped p-type epitaxial layer PE1a and the lightly doped p-type epitaxial layer PE1b of the second embodiment are integrated with the p-type substrate PSB1 in this embodiment.

The buried layer BRD is a region formed by implantation-induced defects D2a formed in the p-type substrate PSB1, so the configuration of this embodiment is completely similar to that shown in FIG. 4 with extended defects D2a in the p-type substrate PSB1 ( Two or more) of the construction of the first embodiment. This means that in the present embodiment, from a viewpoint different from FIG. The upper lightly doped region is used to illustrate the construction of the first embodiment shown in FIG. 4 .

Except for the above point, the configuration of the present embodiment is basically similar to that of the first embodiment shown in FIG. 4 , and thus the same components are denoted by the same reference numerals and repeated explanations are omitted.

Referring to FIGS. 28 and 29 , a method of manufacturing the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described. 28 and 29 show processing of the same area as in FIG. 27 .

As shown in FIG. 28, after the p-type substrate PSB1 is provided in the step of FIG. impurity elements. The p-type substrate PSB1 is thermally treated in a generally known manner. Subsequently, due to the introduction of boron as an impurity element, extended defects D2a such as dislocation loops are buried in the substrate. And by this heat treatment, the oxygen in the p-type substrate PSB1 grows into minute defects D1.

As shown in FIG. 29, a first p-type epitaxial layer PE1 made of silicon (similar to the heavily doped p-type epitaxial layer of the second embodiment) is formed on the main surface S1 of the p-type substrate PSB1 by typical epitaxial growth. PE1c).

Processing similar to that of the first embodiment shown in FIGS. 8 to 10 is performed, followed by subsequent steps similar to that of the first embodiment shown in FIG. 10 to form the structure shown in FIG. 27 .

Effects and advantages of this embodiment will be described later. In addition to the effects and advantages similar to the second embodiment, this embodiment exhibits the following effects and advantages.

In this embodiment, the heavily doped p-type epitaxial layer PE1a and the lightly doped p-type epitaxial layer PE1b in the second embodiment are integrated with the semiconductor substrate (p-type substrate PSB1). This makes it possible to omit the step of forming the heavily doped p-type epitaxial layer PE1a and the lightly doped p-type epitaxial layer PE1b, resulting in a reduction in the number of steps and a reduction in cost.

(fifth embodiment)

Referring to FIG. 30 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 30 is a schematic cross-sectional view showing a pattern of the same area as Fig. 4 in the first embodiment. As shown in FIG. 30 , in this embodiment, an n-type substrate NSB is used instead of a p-type substrate PSB1 . This means that the n-type substrate NSB has n-type impurity elements such as antimony, arsenic or phosphorus introduced therein.

Except for the substrate described above, the configuration of this embodiment is basically similar to that of the first embodiment shown in FIG. 4, so the same components are denoted by the same reference numerals and repeated descriptions are omitted.

In this embodiment, the n-type substrate NSB is used instead of the p-type substrate PSB1 or PSB2, so in the n-type substrate NSB, electrons generated by photoelectric conversion of long-wavelength light in the n-type substrate NSB can be collected at a high rate . It is therefore possible to suppress crosstalk, that is, the occurrence of electrons that have been generated through photoelectric conversion being undesirably collected by the photodiode PD2 adjacent to the photodiode PD1 that receives long-wavelength light.

(sixth embodiment)

Referring to FIG. 31 , the configuration of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 31 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 31 , this embodiment has a back electrode EE directly under the n-type substrate NSB. The back electrode EE is obtained by depositing a thin film of metallic material such as gold on the main surface on the underside of the n-type substrate NSB.

Except for the above-mentioned back electrode, the configuration of this embodiment is basically similar to that of the fifth embodiment shown in FIG. 30 , and thus the same components are denoted by the same reference numerals and repeated explanations are omitted.

In the configuration of the fifth embodiment shown in FIG. 30, when a large amount of electrons are generated in the n-type substrate NSB due to particularly active photoelectric conversion, and furthermore the electrons in the n-type substrate NSB have a long lifetime, Some electrons in the n-type substrate NSB, for example, will penetrate through the first injection region PJ1. This phenomenon occurs because the n-type substrate NSB cannot allow electrons to overflow therefrom, and a so-called floating state occurs in the n-type substrate NSB. Penetration of electrons into the first injection region PJ1 results in crosstalk caused by electrons.

As shown in FIG. 31, the potential of the n-type substrate NSB is fixed by forming the back electrode EE directly under the n-type substrate NSB and applying the ground potential GND to the back electrode EE, so that the potential generated in the n-type substrate NSB Excess electrons can be introduced from the back electrode EE to the ground potential GND side. This reduces the possibility of crosstalk from excess electrons in the n-type substrate NSB.

(seventh embodiment)

Referring to FIG. 32 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 32 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 32, the present embodiment has a configuration basically similar to that of the first embodiment shown in FIG. 4, but the present embodiment differs from the first embodiment in the following points.

Specifically, as shown in FIG. 32, this embodiment does not have the first implantation region PJ1 formed in FIG. 4 but has a second epitaxial layer PE2 so as to cover the photodiode PD1 and the first p-type epitaxial layer below the photodiode PD2. The upper surface of PE1. The thickness of the second p-type epitaxial layer PE2 in the first pixel region RPx is substantially equal to the thickness of the second p-type epitaxial layer PE2 in the second pixel region GPx. In addition, the second implantation region PJ2 reaches the first p-type epitaxial layer PE1, and it is in contact with the first p-type epitaxial layer PE1.

The second p-type epitaxial layer PE2 shown in FIG. 32 is preferably thinner than the second p-type epitaxial layer PE2 shown in FIG. 4 . For example, the thickness of the second p-type epitaxial layer PE2 in FIG. 32 is preferably substantially equal to the thickness of the second p-type epitaxial layer PE2 in the second pixel region GPx in FIG. 4 (except for the first injection region PJ1 ).

Except for the above points, the configuration of this embodiment is basically similar to that of the first embodiment shown in FIG. 4 , and thus the same components are denoted by the same reference numerals and repeated explanations are omitted.

Referring to FIG. 33 , the configuration of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below. Processing of an area similar to that of FIG. 32 is shown in FIG. 33 .

As shown in FIG. 33, after a process similar to that of the first embodiment shown in FIGS. 5 to 7, the second p-type epitaxial layer PE2 is formed so as to cover the formation region of the photodiode PD1 and the area below the formation region of the photodiode PD2. the upper surface of the first p-type epitaxial layer PE1. In other words, the second p-type epitaxial layer PE2 is formed so as to cover the upper surface of the first p-type epitaxial layer PE1 in the formation region of the first pixel region RPx and the formation region of the second pixel region GPx.

In this embodiment, the thickness of the second p-type epitaxial layer PE2 is preferably smaller than, for example, the second p-type epitaxial layer PE2 formed by the steps in FIG. 8 .

After forming the second p-type epitaxial layer, processes similar to those of the first embodiment shown in FIGS. 8 to 10 are performed, and then subsequent steps similar to those of the first embodiment shown in FIG. 10 are performed to The structure shown in Figure 32 is formed.

This embodiment does not have the first implantation region PJ1, so the number of masks to be provided, the manufacturing tact time, and the manufacturing cost can be reduced.

(eighth embodiment)

Referring to FIG. 34 , the configuration of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 34 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 34, this embodiment has a configuration similar to that of the seventh embodiment shown in FIG. 32, but the energy provided by the ion implantation technique in forming the second implantation region PJ2 is higher than that of the case of FIG.

Compared with the second injection region PJ2 in FIG. 32 , increasing the energy can enhance the potential barrier used to suppress electrons generated through photoelectric conversion in the second p-type epitaxial layer PE2 in the first pixel region RPx and the second pixel region. The function of the second implanted region PJ2 of Figure 34 for migration between GPx.

The thickness of the second p-type epitaxial layer PE2 in FIG. 34 can be made larger than that in FIG. 32 . Since the energy used to form the second implantation region PJ2 in this embodiment is higher than that in the seventh embodiment, the second implantation region PJ2 in this embodiment may have a greater depth than that in the seventh embodiment. Even if the thickness of the second p-type epitaxial layer PE2 is made larger by forming the second implantation region PJ2 so as to be in contact with the first p-type epitaxial layer PE1, the suppression of the second p-type epitaxial layer in the second pixel region GPx can be enhanced. Effect of electron crosstalk in layer PE2. Since the thickness of the second p-type epitaxial layer PE2 can be made larger, the generation area of photoelectric conversion electrons collected by the photodiode PD1 can be expanded, making it possible to improve the sensitivity of the photodiode PD1.

(ninth embodiment)

Referring to FIG. 35 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 35 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 35 , the present embodiment has a pixel isolation region SPT located below the trench isolation TI at the boundary portion between the first pixel region RPx and the second pixel region GPx. The pixel isolation region SPT is composed of a deep trench DT and a third p-type epitaxial layer PE3.

The deep trench DT is a trench of the first p-type epitaxial layer PE1 that penetrates the second epitaxial layer PE2 and reaches the boundary portion between the first pixel region RPx and the second pixel region GPx. The deep trench DT is preferably in contact with the lowermost portion of the trench isolation TI.

The deep trench DT has therein the third p-type epitaxial layer PE3 as a p-type semiconductor layer. In other words, deep trench DT is filled with third p-type epitaxial layer PE3 as a p-type semiconductor layer. In each of the above embodiments, the third p-type epitaxial layer PE3 corresponds to the second implantation region PJ2 as the second p-type impurity region, and has a function similar to that of the second implantation region PJ2.

Similar to the seventh or eighth embodiment, this embodiment does not have the first injection region PJ1 in the second pixel region GPx.

Except for the above points, the configuration of this embodiment is basically similar to that of the first embodiment shown in FIG. 4 , so the same components are denoted by the same reference symbols and their descriptions are omitted.

Referring to FIGS. 36 to 38 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

As shown in FIG. 36 , after processes similar to those of the first embodiment shown in FIGS. 5 to 7 , the second p-type epitaxial layer PE2 is formed in a step similar to that of FIG. 8 . Subsequently, a penetrating second p-type epitaxial layer PE2 is formed in the boundary portion between the formation region of the first pixel region RPx and the formation region of the second pixel region GPx by employing typical photolithography and etching. The epitaxial layer PE2 so as to reach the deep trench DT of the first p-type epitaxial layer PE1.

As shown in FIG. 37 , by typical epitaxial growth, a third p-type epitaxial layer PE3 is formed on the upper surface of the second p-type epitaxial layer PE2 to fill the deep trench DT.

As shown in FIG. 38 , the third p-type epitaxial layer PE3 on the second p-type epitaxial layer PE2 is removed by chemical mechanical polishing called CMP. Accordingly, the pixel isolation region SPT is formed at a boundary portion between the formation region of the first pixel region RPx and the formation region of the second pixel region GPx. A shallow trench is then formed directly above the pixel isolation region SPT in the second p-type epitaxial layer PE2 by typical photolithography and etching. Subsequently, an insulating film such as a silicon oxide film is formed on the upper surface of the second p-type epitaxial layer PE2 by, for example, typical CVD, thereby filling the shallow trench.

Subsequently, the insulating film on the second p-type epitaxial layer PE2 is removed again by using CMP to form a trench isolation TI right above the pixel isolation region SPT.

Subsequently, processes similar to those of the first embodiment shown in FIGS. 9 and 10 are performed, followed by subsequent steps similar to those of FIG. 10 of the first embodiment to form the structure shown in FIG. 35 .

Effects and advantages of this embodiment will be described below. Like this embodiment, instead of the second implantation region PJ2, a potential barrier may be formed between the first pixel region RPx and the second pixel region GPx by filling the third p-type epitaxial layer PE3 in the deep trench DT. Since the third p-type epitaxial layer PE3 is formed by epitaxial growth, the third p-type epitaxial layer PE3 can be freely formed so as to have a higher p-type impurity concentration than the second implantation region PJ2 formed by the ion implantation technique. Therefore, the pixel isolation region SPT becomes more effective in suppressing crosstalk.

(tenth embodiment)

Referring to FIG. 39 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 39 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 39, the present embodiment has a configuration basically similar to that of the ninth embodiment shown in FIG. filling.

The deep trench DT is filled on the outside thereof with the third epitaxial layer PE3, and part of the trench inside the third epitaxial layer PE3 is filled with the insulating film II. In other words, the third epitaxial layer PE3 in the deep trench DT has the insulating film II on the epitaxial layer. The insulating film II is made of, for example, a silicon oxide film. This means that the pixel isolation region SPT of this embodiment includes the deep trench DT, the third p-type epitaxial layer PE3, and the insulating film II.

Except for the above points, the configuration of this embodiment is basically similar to that of the ninth embodiment shown in FIG. 35 , so the same components are denoted by the same reference numerals and their repeated descriptions are omitted.

Referring to FIGS. 40 to 42 , a method of manufacturing the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described.

As shown in FIG. 40, after the deep trench DT is formed in the second p-type epitaxial layer PE2 of the ninth embodiment as shown in FIG. The third p-type epitaxial layer PE3 so as to cover the inner wall of the deep trench DT.

As shown in FIG. 41, an insulating film II made of, for example, a silicon oxide film is formed by coating so as to cover the third p-type epitaxial layer PE3 on the second p-type epitaxial layer PE2 and in the deep trench DT. Deep trench DT is filled with insulating film II and third p-type epitaxial layer PE3.

As shown in FIG. 42 , the third p-type epitaxial layer PE3 and the insulating film II on the second p-type epitaxial layer PE2 are removed by CMP. In this way, the pixel isolation region SPT is formed at the boundary portion between the formation region of the first pixel region RPx and the formation region of the second pixel region GPx.

Subsequently, processes similar to those after the formation of the pixel isolation region SPT in the ninth embodiment are performed, thereby forming the trench isolation TI directly above the image isolation region SPT. Subsequently, processes similar to those of the first embodiment shown in FIGS. 9 to 10 are performed, and then the subsequent steps of FIG. 10 are performed in a manner similar to that of the first embodiment, thereby forming the structure shown in FIG. 42 .

Effects and advantages of this embodiment will be described below.

The very high aspect ratio of the deep trench DT can for example avoid that the trench is completely filled only by the third p-type epitaxial layer PE3 as in the ninth embodiment. The deep trench DT coated with the insulating film II so as to fill the trench space therewith is provided as in this embodiment. This makes it possible to more completely fill the deep trench DT to improve the effect of the pixel isolation region SPT for suppressing electronic crosstalk.

(eleventh embodiment)

Referring to FIG. 43 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below.

Fig. 43 is a schematic cross-sectional view showing a pattern of the same region as that of the first embodiment shown in Fig. 4 . As shown in FIG. 43, the present embodiment has a buried layer BRD (buried impurity layer) in the p-type substrate PSB1 having the main surface, particularly in the relatively upper region of the p-type substrate PSB1.

The buried layer BRD is a layer containing a plurality of extended defects D2a obtained by heat-treating a p-type impurity element such as boron introduced into the semiconductor substrate PSB1. Therefore, from this point of view, the buried layer BRD of the present embodiment has, for example, a configuration and function similar to that of the buried layer BRD of the fourth embodiment shown in FIG. 27 .

The configuration of the above-mentioned buried layer BRD is similar to that of the first embodiment shown in FIG. 4 . Specifically, the buried layer BRD has thereon the second p-type epitaxial layer PE2 (p-type epitaxial layer), and the second p-type epitaxial layer PE2 has therein the first pixel region RPx including the photodiode PD1 and including the photodiode PD1. The second pixel area GPx of PD2. In the second pixel region GPx, the second p-type epitaxial layer has the first implantation region PJ1 therein, thus covering the upper surface of the buried layer BRD. The first pixel region RPx and the second pixel region GPx have a second injection region PJ2 at their boundary portions.

The above-described embodiments each have a configuration including two epitaxial layers made of silicon, ie, the first p-type epitaxial layer PE1 and the second p-type epitaxial layer PE2, on the semiconductor substrate SUB thereof. However, in this embodiment, only one epitaxial layer is formed on the semiconductor substrate SUB, that is, the second p-type epitaxial layer PE2. In this embodiment, a buried layer BRD having a p-type impurity concentration higher than that of the second p-type epitaxial layer is formed in a p-type substrate PSB1 made of silicon instead of the first p-type epitaxial layer PE1. Therefore, similarly to the first p-type epitaxial layer PE1, it has a function as a potential barrier for suppressing entry of electrons generated in the p-type substrate PSB1 into the second p-type epitaxial layer PE2.

As described above, the present embodiment differs from the first embodiment having the first type epitaxial layer PE1 in that the buried layer BRD is formed in the p-type substrate PSB1. But it has a configuration basically similar to that of the first embodiment, and the first p-type epitaxial layer PE1 of the first embodiment is replaced by the buried layer BRD.

Except for the above points, the configuration of this embodiment is basically similar to that of the first embodiment shown in FIG. 4 , so the same components are denoted by the same reference numerals, and repeated description thereof is omitted.

Referring to FIGS. 44 and 45 , the configurations of the photodiode PD constituting the semiconductor imaging device as the semiconductor device of the present embodiment and the transfer transistor TMI including the photodiode PD will be described in detail below. In FIGS. 44 and 45 , processing of an area similar to that of FIG. 43 is shown.

As shown in FIG. 44, similarly to the first embodiment shown in FIGS. 5 and 6, a p-type substrate PSB1 made of, for example, silicon and having a main surface S1 is provided as a p-type substrate. An impurity element such as boron is introduced into the p-type substrate PSB1 from the above-mentioned main surface S1 of the p-type substrate PSB1 by employing a typical ion implantation technique. Subsequently, heat treatment is performed to bury impurity elements such as boron thus introduced as extended defects S2a such as so-called dislocation loops. A region enriched with impurities such as boron thus introduced is formed as the buried layer BRD. The buried layer BRD is formed to have a p-type impurity concentration higher than that of the second p-type epitaxial layer PE2 which will be described below.

Subsequently, a second p-type epitaxial layer PE2 made of silicon is formed on the buried layer BRD. The buried layer BRD in this embodiment is formed in the relatively upper portion of the p-type substrate PSB1. The uppermost part of the buried layer BRD and the main surface S1 on the upper side of the p-type substrate PSB1 include therebetween a region having an impurity concentration equal to that of a typical p-type substrate PSB1 and having no BRD. But the second p-type epitaxial layer PE2 has a p-type impurity concentration substantially equal to that of the p-type substrate PSB1, and they are common because the substrate as a p-type substrate is formed by using an impurity of boron, for example. Therefore, the boundary between the p-type substrate PSB1 and the second p-type epitaxial layer PE2 substantially disappears, which means that the second p-type epitaxial layer PE2 is formed so as to cover the upper surface of the buried layer BRD therewith.

As shown in FIG. 45, similarly to the first embodiment shown in FIGS. Subsequent steps to obtain the structure shown in Figure 43.

Effects and advantages of this embodiment will be described below.

In this embodiment, only the second p-type epitaxial layer PE2 is formed as a p-type epitaxial layer, and the buried layer BRD is formed by ion implantation technology, thereby replacing the first p-type epitaxial layer PE1 in another embodiment. Compared with the barrier formed by epitaxial growth, the barrier formed by ion implantation technology can reduce the cost.

Finally, the gist of an embodiment will be explained.

As shown in FIG. 46, a semiconductor device according to an embodiment includes a semiconductor substrate SUB1 having a main surface, a first p-type epitaxial layer PE1 formed on the main surface, and a second p-type epitaxial layer PE1 formed to cover the upper surface of the first epitaxial layer PE1. The p-type epitaxial layer PE2, and the first photoelectric conversion element PD1 formed in the second p-type epitaxial layer PE2. Each of the first and second p-type epitaxial layers PE1 and PE2 is made of silicon. The first p-type epitaxial layer PE1 has a higher p-type impurity concentration than the second p-type epitaxial layer PE2. The configuration shown in FIG. 46 is similar to the configuration shown in FIG. 4 except for the above points.

While repeating the description above, some of the details illustrated in the Examples will be described below.

(1) A method of manufacturing a semiconductor device starts with providing a semiconductor substrate having a main surface. A first p-type epitaxial layer is formed on the main surface. The second p-type epitaxial layer is formed such that it covers the upper surface of the first p-type epitaxial layer. The first photoelectric conversion element is formed in the second p-type epitaxial layer. Each of the first and second p-type epitaxial layers is made of silicon, and the first p-type epitaxial layer has an impurity concentration of a type higher than that of the second p-type epitaxial layer.

(2) In the method of manufacturing a semiconductor device described in (1), the semiconductor substrate is a p-type substrate, and the defect density of the semiconductor substrate is higher than that of the second p-type epitaxial layer.

(3) In the method of manufacturing a semiconductor device described in (1), the semiconductor substrate is a p-type substrate. When the semiconductor substrate is provided, extended defects are further formed in the semiconductor substrate. When the extended defect is formed in the semiconductor substrate, p-type impurities are introduced into the semiconductor substrate so that the p-type impurity concentration in the semiconductor substrate becomes higher than the p-type impurity concentration in the second p-type epitaxial layer. The first extended defect is formed as an extended defect by heat-treating the finally formed semiconductor substrate to cause a reaction between p-type impurities in the semiconductor substrate and oxygen diffused into the semiconductor substrate.

(4) In the method of manufacturing a semiconductor device described in (1), extended defects are further formed in the semiconductor substrate when the semiconductor substrate is provided. When an extended defect is formed in a semiconductor substrate, an impurity element is introduced into the semiconductor substrate. The second extended defect is formed as an extended defect by heat-treating the semiconductor substrate having the impurity element introduced therein.

(5) In the method of manufacturing a semiconductor device described in (1), the first p-type epitaxial layer is formed on the main surface so that the first p-type epitaxial layer includes a plurality of layers. When the first p-type epitaxial layer is formed on the main surface, due to the reaction between p-type impurities in the substrate-adjacent layer and oxygen diffused from the semiconductor substrate into the substrate-adjacent layer, the first extended defect forms is an extended defect in a substrate-adjacent layer, which is one of the layers constituting the first p-type epitaxial layer and located on the side closest to the semiconductor substrate.

(6) In the method of manufacturing a semiconductor device described in (5), when the first p-type epitaxial layer is formed on the main surface, among the plurality of layers constituting the first p-type epitaxial layer, the substrates are adjacent to each other. The oxygen concentration in the layer is set to be higher than the oxygen concentration in layers constituting the first p-type epitaxial layer other than the substrate-adjacent layer.

(7) A method of manufacturing a semiconductor device starts with the provision of a semiconductor substrate having a main surface. Impurities are implanted into the semiconductor substrate to form buried impurity layers. A p-type epitaxial layer is formed on the buried impurity layer. The first photoelectric conversion element is formed in the p-type epitaxial layer. The buried impurity layer and the p-type epitaxial layer are each made of silicon, and the buried impurity layer has a higher p-type impurity concentration than the p-type epitaxial layer.

The invention made by the present inventors has been specifically described based on certain embodiments. It is needless to say that the present invention is not limited to or by these embodiments, but various changes can be made without departing from the scope of the present invention.

Claims (20)

1. a semiconductor device, comprising:

Semiconductor substrate, described Semiconductor substrate has first type surface;

First p-type epitaxial layer, described first p-type epitaxial layer is formed on said principal surface;

Second p-type epitaxial layer, described second p-type epitaxial layer is formed as the upper surface covering described first p-type epitaxial layer; And

First photo-electric conversion element, described first photo-electric conversion element is formed in described second p-type epitaxial layer,

Wherein, described first p-type epitaxial layer and described second p-type epitaxial layer is each is made up of silicon, and

Wherein, described first p-type epitaxial layer has the p-type impurity concentration higher than the p-type impurity concentration of described second p-type epitaxial layer.

2. semiconductor device according to claim 1, comprises further:

Second photo-electric conversion element, described second photo-electric conversion element for receiving the light of the mean wavelength of the mean wave length with the light that can receive than described first photo-electric conversion element,

Wherein, described second photo-electric conversion element and described first photo-electric conversion element are arranged on the direction along described first type surface.

3. semiconductor device according to claim 2, comprises further:

First p-type impurity range, described first p-type impurity range is formed in cover the upper surface of described first p-type epitaxial layer below described second photo-electric conversion element in described second p-type epitaxial layer, and has the p-type impurity concentration higher than the p-type impurity concentration in described second p-type epitaxial layer; And

Second p-type impurity range, described second p-type impurity range is formed in described second p-type epitaxial layer at the boundary portion place between described first photo-electric conversion element and described second photo-electric conversion element, and there is the p-type impurity concentration higher than the p-type impurity concentration of described second p-type epitaxial layer

Wherein, described first p-type impurity range and described second p-type impurity range adjacent to each other.

4. semiconductor device according to claim 3,

Wherein, the boundary portion place of described second p-type epitaxial layer between described first photo-electric conversion element and described second photo-electric conversion element has and penetrates described second p-type epitaxial layer and the groove arriving described first p-type epitaxial layer, and

Wherein, described second p-type impurity range is formed in the p-type semiconductor layer in described groove.

5. semiconductor device according to claim 4, comprises further:

Dielectric film, described dielectric film is formed in described p-type semiconductor layer in the trench.

6. semiconductor device according to claim 2,

Wherein, described second p-type epitaxial layer is arranged to the upper surface of described first p-type epitaxial layer covering described first photo-electric conversion element and described both second photo-electric conversion elements below.

7. semiconductor device according to claim 1,

Wherein, described Semiconductor substrate is p-type substrate.

8. semiconductor device according to claim 7,

Wherein, described Semiconductor substrate has the defect concentration higher than the defect concentration of described second p-type epitaxial layer.

9. semiconductor device according to claim 7,

Wherein, described Semiconductor substrate has the p-type impurity concentration higher than the p-type impurity concentration of described second p-type epitaxial layer, and

Wherein, described Semiconductor substrate comprises result as the p-type impurity in described Semiconductor substrate and the reaction between the oxygen diffusing in described Semiconductor substrate wherein and the first extended defect formed.

10. semiconductor device according to claim 1,

Wherein, described Semiconductor substrate comprises the second extended defect formed by the impurity element introduced in described Semiconductor substrate wherein.

11. semiconductor device according to claim 1,

Wherein, described first p-type epitaxial layer has multiple layer, and

Wherein, substrate adjacent layer has by the p-type impurity in described substrate adjacent layer and the reaction between the oxygen diffusing in described substrate adjacent layer and the first extended defect formed, and described substrate adjacent layer is a layer forming in the layer of described first p-type epitaxial layer and is arranged near described Semiconductor substrate side.

12. semiconductor device according to claim 11,

Wherein, higher than the oxygen concentration of the layer of described first p-type epitaxial layer of formation except described substrate adjacent layer as the oxygen concentration in the described substrate adjacent layer of the layer formed in the layer of described first p-type epitaxial layer.

13. 1 kinds of semiconductor device, comprising:

Semiconductor substrate, described Semiconductor substrate has first type surface;

Bury impurity layer, described in bury impurity layer and be formed in described Semiconductor substrate;

P-type epitaxial layer, buries described in described p-type epitaxial layer is formed on impurity layer; And

First photo-electric conversion element, described first photo-electric conversion element is formed in described p-type epitaxial layer,

Wherein, described in bury impurity layer and described p-type epitaxial layer is each has silicon, and

Wherein, bury impurity layer described in and there is the p-type impurity concentration higher than the p-type impurity concentration of described p-type epitaxial layer.

14. 1 kinds of methods manufacturing semiconductor device, comprise the following steps:

The Semiconductor substrate with first type surface is provided;

Form the first p-type epitaxial layer on said principal surface;

Form described second p-type epitaxial layer to cover the upper surface of described first p-type epitaxial layer; And

The first photo-electric conversion element is formed in described second p-type epitaxial layer,

Wherein, described first p-type epitaxial layer and described second p-type epitaxial layer is each has silicon, and

Wherein, described first p-type epitaxial layer has the p-type impurity concentration higher than the p-type impurity concentration of described second p-type epitaxial layer.

The method of 15. manufacture semiconductor device according to claim 14, further comprising the steps:

Form the second photo-electric conversion element, described second photo-electric conversion element for receiving the light of the mean wavelength of the mean wave length with the light that can receive than described first photo-electric conversion element,

Wherein, described second photo-electric conversion element and described first photo-electric conversion element are arranged on the direction along described first type surface.

The method of 16. manufacture semiconductor device according to claim 15, further comprising the steps:

Described first p-type impurity range is formed in described second p-type epitaxial layer, so that cover will form described second photo-electric conversion element region below the described upper surface of described first p-type epitaxial layer, described first p-type impurity range has the p-type impurity concentration higher than the p-type impurity concentration in described second p-type epitaxial layer; And

The second p-type impurity range is formed in described second p-type epitaxial layer that will form the boundary portion place between the region of described first photo-electric conversion element and the region that will form described second photo-electric conversion element, described second p-type impurity range has the p-type impurity concentration higher than the p-type impurity concentration of described second p-type epitaxial layer

Wherein, described first p-type impurity range and described second p-type impurity range adjacent to each other.

The method of 17. manufacture semiconductor device according to claim 16,

Wherein, the step forming described second p-type impurity range comprises the following steps:

The boundary portion place of described second p-type epitaxial layer between the region of described first photo-electric conversion element and the region that will form described second photo-electric conversion element will formed, formed and penetrate described second p-type epitaxial layer to arrive the groove of described first p-type epitaxial layer; And

Form p-type semiconductor layer in the trench as described second p-type impurity range.

The method of 18. manufacture semiconductor device according to claim 17, further comprising the steps:

Described p-type semiconductor layer in the trench forms dielectric film.

The method of 19. manufacture semiconductor device according to claim 15,

Wherein, in the step forming described second p-type epitaxial layer, described second p-type epitaxial layer is formed as the described upper surface of described first p-type epitaxial layer covered below two regions that will form described first photo-electric conversion element and described second photo-electric conversion element respectively.

The method of 20. manufacture semiconductor device according to claim 14,

Wherein, described Semiconductor substrate is p-type substrate.