CN104569587B - The measuring circuit and method of intelligent substation alternating data acquisition phase error - Google Patents

Abstract

The invention discloses a measuring circuit and method for the phase error of the AC sampling value of an intelligent substation. , an Ethernet PHY, and a CPU processor; the CPU processor obtains the sampling value of the merging unit from the Ethernet MAC, obtains the sampling value of the circuit from the analog-to-digital conversion module, and obtains the sampling value of the circuit from the effective pulse Obtain the sending time of the sampled value message in and calculate the phase error. The invention is used to measure the phase error caused by the access of the merging unit, avoiding the direct measurement of the conditioning circuit and the rated time delay.

Description

Circuit and method for measuring phase error of AC sampling value in smart substation

technical field

The invention relates to a measuring circuit and method for phase errors of AC sampling values in intelligent substations, belonging to the field of relay protection detection in electric power systems.

Background technique

In the smart substation, electronic transformers or conventional transformers are used to sample digitally on the spot, which can effectively avoid problems such as external environmental interference, current secondary open circuit, voltage secondary short circuit, transmission loss, cable multi-point grounding, etc., and can realize The sharing of signal acquisition has certain advantages.

There is a certain phase offset between the input and output of the digital sampling link, which is composed of two parts: the phase error caused by the transfer function and the phase offset caused by the fixed group delay caused by digital sampling. The former is mainly determined by the phase transmission characteristics of the primary sensing element of the electronic transformer or the combined unit small current transformer (TA) and small voltage transformer (TV), as well as the characteristics of the low-pass filter circuit composed of resistors, capacitors, and operational amplifiers. ; The latter is determined by delays such as data processing, interpolation waiting, and transmission.

In the point-to-point mode, after the device receives the SVs of multiple merging units, it deduces the real occurrence time of the sampling data according to their respective delays and the clock signal of the device itself. Therefore, the overall phase error of the AC sampling value of the smart substation will be affected by both the phase error of the signal conditioning circuit and the rated delay error.

Contents of the invention

In order to overcome the deficiencies in the prior art, the purpose of the present invention is to provide a measurement circuit and method for the phase error of the AC sampling value of the smart substation, which is used to measure the phase error caused by the access of the merging unit, avoiding the Direct measurement of conditioning circuits and nominal time delays.

The circuit of the present invention is realized by adopting the following technical solutions:

The measurement circuit of the phase error of the AC sampling value of the smart substation, the measurement circuit is respectively connected to the relay protection test, the merging unit and the clock source, which is mainly composed of a clock analysis module, a frequency multiplication module, a signal conditioning module, an analog-to-digital conversion module, and an Ethernet optical fiber Receiver, Ethernet MAC (Medium/MediaAccess Control, Media Access Control), Ethernet PHY (called physical layer, Physical Layer), CPU processor;

The clock analysis module is used to receive the relative time signal sent by the same clock source connected to the merging unit to be tested, and extract time information from the time synchronization signal, to realize the synchronization between the measurement circuit and the clock source, and generate the second pulse;

a frequency multiplication module, which multiplies the second pulse to obtain a high-frequency sampling pulse;

The signal conditioning module is used to receive the AC voltage or current output by the relay protection tester connected to the merging unit to be tested, and convert the AC voltage or current into a signal processed by the measurement circuit;

An analog-to-digital conversion module, which converts the signal output by the signal conditioning module into a digital sampling pulse provided by the frequency multiplication module;

The photoelectric receiver is used to receive the Ethernet frame transmitted by the optical signal from the merging unit to be tested, and convert the Ethernet frame transmitted by the optical signal into an electrical signal;

Ethernet PHY, used to realize signal level conversion and serial/parallel conversion, and output valid bit pulse;

Ethernet MAC, used to realize the assembly of Ethernet frames;

The CPU processor obtains the sampling value of the merging unit from the Ethernet MAC, obtains the sampling value of the circuit from the analog-to-digital conversion module, and obtains the sending time of the sampling value message from the effective bit pulse, And calculate the phase error;

The clock analysis module is connected to the analog-to-digital conversion module through the frequency multiplication module, the output end of the signal conditioning module is connected to the input end of the analog-to-digital conversion module, and the output ends of the analog-to-digital conversion module, Ethernet PHY and Ethernet MAC are all connected to The CPU processors are connected, and the output end of the photoelectric receiver is connected to the Ethernet MAC through the Ethernet PHY.

The signal conditioning module includes a high-precision transformer for receiving the AC voltage or current output by the relay protection tester and a low-pass filter for anti-aliasing filtering; the output terminal of the high-precision transformer is connected to the The input ends of the low-pass filter are connected; the external AC voltage or current is converted to a voltage within ±5V through a high-precision transformer, and then anti-aliasing filtering is performed through low-pass filtering to achieve signal conditioning.

Preferably, the accuracy grade of the high-precision transformer is 0.05; the cut-off frequency of the low-pass filter is 50 kHz.

A phase error measurement method using the measurement circuit, the method steps are as follows:

(1) Use the relay protection tester to output AC voltage or current with a frequency of 50 Hz to the merging unit, and the sequence of sampling values output by the merging unit is denoted as SV1;

(2) The voltage or current is adjusted by using a high-precision transformer and a low-pass filter with a wide cut-off frequency. The phase shift of the adjustment circuit is very small compared with the merging unit and can be ignored.

(3) The voltage or current is sampled by a sampling circuit synchronized with the internal sampling principle of the merging unit, but the sampling frequency is 10 to 20 times the sampling frequency of the merging unit. The serial number of the value message is set to 0;

(4) Align SV1 and SV2 according to the serial number 0, and calculate the phase of SV1 based on SV2 Among them, N is the number of sampling points per cycle, i is the serial number of the SV message, A _i is the sampling value of SV1, and B _i is the sampling value of SV2;

(5) Obtain the sending time of the SV message whose serial number is 0 in SV1, take seconds as the unit, take the decimal place therein, obtain its deviation T relative to the whole second time, and subtract the rated delay T _e of SV1, Obtaining Δt=TT _e , in the case of 50Hz, the phase error caused by the deviation of the sending time is

(6) The total phase error is θ=θ ₁ -θ ₂ .

The beneficial effects of the invention are: the invention measures the phase error of the AC sampling value from the perspective of the principle and external characteristics, avoiding the direct measurement of the conditioning circuit and the rated time delay.

Description of drawings

Figure 1 is a schematic diagram of the phase error measurement circuit;

Figure 2 is a system wiring diagram for phase error measurement.

detailed description

The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

As shown in Figure 1 and Figure 2, this embodiment provides a measurement circuit for the phase error of the AC sampling value of the smart substation, the measurement circuit is mainly composed of a clock analysis module, a frequency multiplication module, a signal conditioning module, an analog-to-digital conversion Composed of optical fiber receiver, Ethernet MAC, Ethernet PHY, and CPU processor; the clock analysis module is used to extract time information from the time synchronization signal, for realizing the synchronization of the circuit and the clock source, and generating second pulses; The frequency doubling module multiplies the second pulse to obtain a high-frequency sampling pulse; the signal conditioning module includes a high-precision transformer and a low-pass filter with a wide cut-off frequency for converting the AC voltage or current into the desired The signal that the above circuit can process; the analog-to-digital conversion module converts the signal output by the signal conditioning module into a digital sampling pulse provided by the frequency multiplication module; The network frame is converted into an electrical signal; the Ethernet PHY realizes the conversion of the signal level and the serial/parallel conversion, and outputs a valid bit pulse; the Ethernet MAC realizes the assembly of the Ethernet frame; Obtain the sampling value of the merging unit from the network MAC, obtain the sampling value of the circuit from the analog-to-digital conversion module, obtain the sending time of the sampling value message from the effective bit pulse, and perform phase error calculation.

The above-mentioned signal conditioning module includes a high-precision transformer for receiving the AC voltage or current output by the relay protection tester and a low-pass filter for anti-aliasing filtering; the output terminal of the high-precision transformer is connected to the low-pass filter. The input terminal of the pass filter is connected; the external AC voltage or current is converted to a voltage within ±5V through a high-precision transformer, and then anti-aliasing filtering is performed through a low-pass filter to achieve signal conditioning.

In this embodiment, the accuracy level of the high-precision transformer is 0.05; the cut-off frequency of the low-pass filter is 50 kHz.

Utilize the system wiring diagram that the circuit of the present invention carries out phase error measurement as shown in Figure 2, relay protection tester connects merging unit and this measuring circuit, merging unit and clock source are all connected this measuring circuit, and its measuring method is as follows:

(1) Use the relay protection tester to output an AC voltage or current with a frequency of 50 Hz to the merging unit, and record the sampled value sequence output by the merging unit as SV1, and connect it to the phase error measurement circuit;

(2) The phase error measurement circuit uses a high-precision transformer and a low-pass filter with a wide cut-off frequency to regulate the AC voltage or current. The phase shift of the conditioning circuit is very small compared to the merging unit and can be ignored.

(3) Both the merging unit and the phase error measurement circuit are connected to the IRIG-B code timing signal, and the phase error measurement circuit uses a sampling circuit synchronous with the internal sampling principle of the merging unit to sample the voltage or current, but the sampling frequency is merging 10 to 20 times the sampling frequency of the unit, the sampling value sequence is recorded as SV2, and the serial number of the sampling value message at the whole second is set to 0;

(4) SV1 and SV2 are aligned according to the serial number 0, and the phase θ ₁ of SV1 is calculated based on SV2. The calculation formula is as follows:

Wherein, N is the number of sampling points per cycle, i is the serial number of the SV message, A _i is the sampling value of SV1, and B _i is the sampling value of SV2;

(5) Obtain the sending time of the SV message whose serial number is 0 in SV1, take seconds as the unit, take the decimal place therein, obtain its deviation T relative to the whole second time, and subtract the rated delay T _e of SV1, Obtaining Δt=TT _e , in the case of 50Hz, the phase error caused by the deviation of the sending time is

(6) The total phase error is θ=θ ₁ -θ ₂ .

The invention measures the phase error of the AC sampling value from the perspective of the principle and external characteristics, avoiding the direct measurement of the conditioning circuit and the rated time delay.

The basic principles and main features of the present invention and the advantages of the present invention have been shown and described above. Those skilled in the industry should understand that the present invention is not limited by the above-mentioned embodiments. What are described in the above-mentioned embodiments and the description only illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will also have Variations and improvements are possible, which fall within the scope of the claimed invention. The protection scope of the present invention is defined by the appended claims and their equivalents.

Claims (4)

1. the measuring circuit of intelligent substation alternating data acquisition phase error, the measuring circuit connects relay protection test respectively Instrument, combining unit and clock source；Characterized in that, the measuring circuit includes：Clock analysis module, for receive with it is to be measured Combining unit access same clock source send it is relative when signal, and from pair when signal in extracting time information, for realizing The measuring circuit is synchronous with clock source, and generates pulse per second (PPS)；

Times frequency module, carries out frequency multiplication to the pulse per second (PPS), obtains high frequency sampling pulse；

Signal-regulated kinase, for receive alternating voltage that the relay-protection tester of combining unit to be measured connection exported or Electric current, and the alternating voltage or electric current are converted into the signal that the measuring circuit is handled；

Analog-to-digital conversion module, the signal that the Signal-regulated kinase is exported is converted into the digital quantity provided by described times of frequency module Sampling pulse；

Photelectric receiver, for receiving combining unit to be measured with the ethernet frame of optical signal transmission, and by with optical signal transmission Ethernet frame is converted into electric signal；

Ethernet PHY, for realizing the conversion and serial/parallel conversion of signal level, and exports effective digit pulse；

Ethernet mac, the assembling for realizing ethernet frame；

CPU processor, obtains the sampled value of combining unit from the ethernet mac, is obtained from the analog-to-digital conversion module The sampled value of the circuit, obtains the delivery time of sampling value message, line phase error meter of going forward side by side from effective digit pulse Calculate；

The clock analysis module connects analog-to-digital conversion module by frequency module again, and the Signal-regulated kinase output end connects mould The input of number modular converters, the output end of the analog-to-digital conversion module, ethernet PHY and ethernet mac with CPU processing Device is connected, and the output end of the photelectric receiver connects ethernet mac, the Signal-regulated kinase bag by ethernet PHY Include for receiving the alternating voltage of relay-protection tester output or the high-precision transformer of electric current and for anti-aliasing filter Low pass filter；The output end of the high-precision transformer is connected with the input of the low pass filter, the low pass The output end of wave filter connects the input of analog-to-digital conversion module.

2. the measuring circuit of intelligent substation alternating data acquisition phase error according to claim 1, it is characterised in that institute The class of accuracy for stating high-precision transformer is 0.05 grade.

3. the measuring circuit of intelligent substation alternating data acquisition phase error according to claim 1, it is characterised in that institute The cut-off frequency for stating low pass filter is 50kHz.

4. the phase error measuring method of measuring circuit described in a kind of any one of utilization claims 1 to 33, it is characterised in that Its method and step is as follows：

(1) alternating voltage for being 50Hz with relay-protection tester output frequency or electric current are to combining unit, and combining unit is defeated The sampled value sequence gone out is designated as SV1, and accesses phase error measurement circuit；

(2) phase error measurement circuit uses the low pass filter of high-precision transformer and wide cut-off frequency to the alternating voltage Or electric current is nursed one's health；

(3) signal when combining unit accesses IRIG-B codes pair with phase error measurement circuit, phase error measurement circuit is used The sample circuit synchronous with combining unit internal sample principle is sampled to the voltage or electric current, and sample frequency is conjunction And 10~20 times of unit sampling frequency, the sampled value sequence is designated as SV2, and the sequence number of the sampling value message at whole moment second is set to 0；

(4) to SV1 and SV2, alignd according to 0 sequence number, on the basis of SV2, calculate SV1 phase theta₁；Calculation formula is as follows：

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Wherein, N is each cycle sampled point quantity, A_iIt is SV1 sampled value, B_iIt is SV2 sampled value；

(5) delivery time of the SV messages of serial number 0 in SV1 is obtained, in seconds, decimal place therein is taken, obtains this small Numerical digit and subtracts SV1 specified delay T relative to the deviation T at whole moment second_e, obtain △ t=T-T_e, in the case of 50Hz, Phase error is as caused by the deviation of delivery time

(6) it is θ=θ to calculate total phase error₁-θ₂。