CN104470203A - HDI circuit board and interlayer interconnection structure and machining method thereof - Google Patents
HDI circuit board and interlayer interconnection structure and machining method thereof Download PDFInfo
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- CN104470203A CN104470203A CN201310442533.0A CN201310442533A CN104470203A CN 104470203 A CN104470203 A CN 104470203A CN 201310442533 A CN201310442533 A CN 201310442533A CN 104470203 A CN104470203 A CN 104470203A
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- circuit board
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- 239000011229 interlayer Substances 0.000 title claims abstract description 56
- 238000000034 method Methods 0.000 title claims abstract description 31
- 238000003754 machining Methods 0.000 title claims abstract description 4
- 239000010410 layer Substances 0.000 claims abstract description 202
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 238000002955 isolation Methods 0.000 claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 230000000149 penetrating effect Effects 0.000 claims abstract description 12
- 239000011889 copper foil Substances 0.000 claims description 31
- 238000012545 processing Methods 0.000 claims description 17
- 238000009413 insulation Methods 0.000 claims description 13
- 238000005553 drilling Methods 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 abstract description 15
- 239000010949 copper Substances 0.000 abstract description 15
- 238000001465 metallisation Methods 0.000 abstract description 9
- 238000003672 processing method Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000608 laser ablation Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses an interlayer interconnection structure of an HDI circuit board. The interlayer interconnection structure comprises a metallization through hole penetrating through the HDI circuit board and including N line layers, wherein M line layers required to be mutually connected comprise metal connecting rings surrounding the metallization through hole, the M line layers are mutually connected with the metallization through hole through the metal connecting rings, and the M is an integer and is greater than or equal to 2 but smaller than the N. The N-M line layers comprise insulating isolation rings surrounding the metallization through hole so that the N-M line layers cannot be mutually connected through the metallization through hole. The embodiment of the invention further provides the corresponding HDI circuit board and a machining method of the HDI circuit board. Due to the fact that the technical scheme is applicable to a thick copper circuit board with the copper thickness greater than that of 3OZ thickness, and a manufacturing process is simple and reliable.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to an HDI circuit board, an interlayer interconnection structure of the HDI circuit board and a processing method of the HDI circuit board.
Background
The development of HDI (High Density interconnect, or any layer interconnect) circuit boards is very rapid. A general HDI circuit board adopts metallized blind holes to connect all circuit layers needing to be connected, and the manufacturing process comprises the following steps: after a certain copper foil layer is laminated, processing blind holes penetrating through the copper foil layer by utilizing an etching process, wherein the diameter of the blind holes is generally not more than 0.2 mm; then, removing the dielectric layer below the blind hole by using a laser ablation process to form a blind hole reaching the upper copper foil layer; then, metallizing the blind hole to realize the interconnection of the two copper foil layers; then, the build-up layers can be continuously laminated, and the metallized blind holes are manufactured in the same way after the build-up layers are built up, so that interconnection among other layers is realized.
During the research and practice of the prior art, the inventor of the present invention finds that the above manufacturing process has the following defects:
on one hand, when the thickness of the copper foil layer is large, for example, greater than 3OZ (ounce, thickness unit, equal to about 0.054 mm), the blind hole processed on the copper foil layer by using the etching process is an inverted conical hole, and under the condition that the diameter of the upper end of the blind hole is not greater than 0.2m, the diameter of the lower end of the blind hole is too small to meet the requirement, even the laser ablation of the next step cannot be carried out, and a qualified blind hole reaching the previous copper foil layer is difficult to process; that is, the existing technology for realizing HDI by using the metalized blind holes does not have the capability of a thick copper circuit board with copper thickness larger than 3 OZ.
On the other hand, the existing technology for realizing HDI by adopting the metalized blind hole requires that the metalized blind hole needs to be manufactured after the layer is added every time, and then the layer can be continuously added, so that the manufacturing process is very complex.
Disclosure of Invention
The embodiment of the invention provides an HDI circuit board, an interlayer interconnection structure of the HDI circuit board and a processing method of the HDI circuit board, and aims to solve the technical problems that a thick copper HDI circuit board cannot be realized by the existing HDI technology and the manufacturing process is complex.
The invention provides an interlayer interconnection structure of an HDI circuit board, wherein the HDI circuit board comprises N layers of circuit layers, N is an integer greater than 2, and the interlayer interconnection structure comprises a metalized through hole penetrating through the N layers of circuit layers; the N layers of circuit layers comprise M layers of circuit layers needing interlayer interconnection, each layer of circuit layer in the M layers of circuit layers comprises a metal connecting ring surrounding the metalized through hole, the M layers of circuit layers are interconnected through the metal connecting ring and the metalized through hole, M is an integer and is more than or equal to 2 and less than M < N; each of the other N-M layers of circuit layers except the M layers of circuit layers comprises an insulating isolation ring surrounding the metalized through hole, so that the other N-M layers of circuit layers are isolated from each other.
The invention provides an HDI circuit board, which comprises N layers of circuit layers, wherein N is an integer greater than 2, and at least one interlayer interconnection structure provided by the first aspect of the invention.
A third aspect of the present invention provides a method for processing an HDI circuit board, which is used for processing an interlayer interconnection structure of the HDI circuit board provided in the first aspect of the present invention, and includes: manufacturing a multilayer board comprising N layers of copper foil layers, wherein N is an integer larger than 2, the N-2 layers of copper foil layers positioned on the inner layer are processed into a circuit pattern, a preset position of each layer in M layers of copper foil layers needing interlayer interconnection is provided with a metal area, and a preset position of each layer in other N-M layers except the M layers of copper foil layers is provided with an insulation area; processing a metalized through hole penetrating through the N layers of copper foil layers at the preset position, so that the metal area becomes a metal connecting ring surrounding the metalized through hole, and the insulation area becomes an insulation isolating ring surrounding the metalized through hole; and processing two outermost copper foil layers of the multilayer board into a circuit pattern.
The embodiment of the invention adopts the technical scheme that the metalized through hole is processed on the HDI circuit board, the metal connecting ring is manufactured on the circuit layer needing interlayer interconnection and connected with the metalized through hole to realize interlayer interconnection, and the insulating isolating ring is manufactured on other circuit layers to insulate and isolate other circuit layers from the metalized through hole, thereby achieving the following technical effects: on one hand, because the metallized through hole is used as an interlayer interconnection channel and the through hole can be processed by processes such as mechanical drilling and the like, the technical scheme of the invention can be suitable for a thick copper circuit board with copper thickness larger than 3 OZ; on the other hand, because blind holes do not need to be drilled after each layer is added, but through holes are drilled at the last, the manufacturing process is simplified, and the process of the technical scheme of the invention is relatively simpler and more reliable.
Drawings
FIG. 1 is a schematic diagram of an interlayer interconnection structure of an HDI circuit board provided by the embodiment of the invention;
FIG. 2 is a plan view of a layer of wiring requiring inter-level interconnection;
FIG. 3 is a plan view of a layer of wiring that does not require inter-level interconnects;
FIG. 4 is a schematic diagram of an HDI circuit board provided by the embodiment of the invention;
fig. 5 is a flowchart of a processing method of an HDI circuit board according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention provides an HDI circuit board, an interlayer interconnection structure of the HDI circuit board and a processing method of the HDI circuit board, and can solve the technical problems that a thick copper HDI circuit board cannot be realized by the existing HDI technology and the manufacturing process is complex. The following detailed description is made with reference to the accompanying drawings, respectively.
The first embodiment,
The embodiment of the invention provides an interlayer interconnection structure of an HDI circuit board, which is used for realizing interlayer interconnection in the HDI circuit board.
Referring to fig. 1, the HDI circuit board 100 is generally a multilayer board, and includes N circuit layers 110 and a dielectric layer 120 between any two circuit layers, where the dielectric layer 120 includes (N-1) layers, N is an integer greater than 2, and may be 3, 4 or more.
The interlayer interconnection structure includes: metallized through holes 130 penetrating through the N circuit layers 110, and a metal connecting ring 140 or an insulating isolating ring 150 processed on each circuit layer 110 and surrounding the metallized through holes 110; wherein,
the N circuit layers 110 include M circuit layers requiring interlayer interconnection, each circuit layer 110 of the M circuit layers 110 includes a metal connection ring 140 surrounding the metalized through hole 130, so that the M circuit layers 110 are interconnected through the metal connection ring 140 and the metalized through hole 130, M is an integer and M is greater than or equal to 2 and less than or equal to M < N;
each of the other (N-M) layers 110 of circuit layers 110 except the M layers 110 includes an insulating isolation ring 150 surrounding the metalized via 130, so that the other (N-M) layers 110 are isolated from each other and cannot be interconnected through the metalized via 130.
Optionally, the M line layers requiring interlayer interconnection may be adjacent continuous M line layers, or may be discontinuous M line layers spaced apart from each other.
Referring to the plan view of one of the M circuit layers shown in fig. 2, the metal connection ring 140 may be a metal area reserved at a predetermined position where a through hole needs to be processed in the process of processing the circuit pattern 1101 on the circuit layer 110, where the metal area is a copper foil that is not etched to be removed, and the shape of the metal area may be a circle, an ellipse, or another shape. After the preset position is processed with the through hole, the metal area is formed into a metal ring surrounding the through hole; when the via is metallized as a metallized via, the metal ring becomes a metal connecting ring that is electrically connected to the metal inner wall of the metallized via. The circuit pattern on the circuit layer and the metal connecting ring can be connected with each other through the designed and processed connecting circuit by the circuit design.
Referring to the plan view of one of the other (N-M) circuit layers shown in fig. 3, the insulating isolation ring 150 may be an insulating region formed at a predetermined position where a via hole needs to be processed during the process of processing the circuit pattern 1101 on the circuit layer 110, the copper foil of the insulating region is etched away, and the insulating region may be circular, oval or other shapes. After the preset position is processed with the metallized through hole, the insulating area is formed into an insulating isolation ring surrounding the through hole, so that the circuit pattern on the circuit layer is isolated by the insulating isolation ring and cannot be connected with the metallized through hole.
Therefore, the interlayer interconnection structure provided by the embodiment of the invention has the advantages that through the circuit design on each circuit layer, the circuit layers needing interlayer interconnection can be connected with each other through the metallization through holes, and the circuit layers not needing interlayer interconnection are isolated by the insulating isolation ring and cannot be interconnected through the metallization through holes.
The technical scheme of the embodiment of the invention can be suitable for circuit boards with various circuit layer thicknesses, particularly for thick copper circuit boards, and optionally, the thickness of each circuit layer can be more than or equal to 3 OZ.
In the above, the embodiment of the present invention provides an interlayer interconnection structure of an HDI circuit board, which adopts a technical scheme that a metalized through hole is processed on the HDI circuit board, a metal connection ring is manufactured on a circuit layer requiring interlayer interconnection and connected to the metalized through hole, and an insulation isolation ring is manufactured on other circuit layers to insulate and isolate the other circuit layers from the metalized through hole, so that the following technical effects are achieved:
on one hand, because the metallized through hole is used as an interlayer interconnection channel and the through hole can be processed by processes such as mechanical drilling and the like, the technical scheme of the invention can be suitable for a thick copper circuit board with copper thickness larger than 3 OZ;
on the other hand, because blind holes do not need to be drilled after each layer is added, but through holes are drilled at the last, the process of the technical scheme of the invention is relatively simpler and more reliable.
Example II,
The embodiment of the invention provides an HDI circuit board which comprises N layers of circuit layers and at least one interlayer interconnection structure according to the first embodiment, wherein N is an integer larger than 2.
For the case that the HDI circuit board includes only one interlayer interconnection structure, reference may be made to the descriptions in fig. 1 to 3 and in the first embodiment.
For the case that the HDI circuit board includes only two or more interlayer interconnection structures, supplementary explanation is as follows:
first, each inter-level interconnect structure requires an independent metallization via, and if there are Z inter-level interconnect structures, Z metallization vias are required, where Z is a positive integer.
The second, same line layer may exist in different inter-level interconnect structures. Examples are as follows: naming the HDI circuit board to comprise N layers of circuit layers which are respectively a first circuit layer, a second circuit layer and an Nth circuit layer; assuming that a first inter-layer interconnect structure is used to implement the interconnect between the first circuit layer and the second circuit layer, and a second inter-layer interconnect structure is used to implement the interconnect between the second circuit layer and the third circuit layer, it can be seen that the second circuit layer exists in both the first and second inter-layer interconnect structures.
Taking fig. 4 as an example, the HDI circuit board shown in fig. 4 includes 8 line layers and 7 interlayer interconnection structures, and 7 metalized vias included in the 7 interlayer interconnection structures, where the 7 interlayer interconnection structures are respectively used to implement interconnection between two adjacent line layers, and each line layer except for two outermost line layers is present in each of the two interlayer interconnection structures.
In the example of fig. 4, the interlayer interconnection structure is used to implement interconnection of two adjacent line layers, and in other embodiments, the interlayer interconnection structure may also be used to implement interconnection of more adjacent line layers, or to implement interconnection of a plurality of line layers that are not adjacent, for example, interconnection of a first line layer and a third line layer is implemented by using one interlayer interconnection structure.
In the foregoing, an embodiment of the present invention provides an HDI circuit board, where a metalized through hole is processed on the HDI circuit board, a metal connection ring is manufactured on a circuit layer requiring interlayer interconnection and connected to the metalized through hole, and an insulation isolation ring is manufactured on another circuit layer to isolate the other circuit layer from the metalized through hole in an insulation manner, so as to obtain the following technical effects:
on one hand, because the metallized through hole is used as an interlayer interconnection channel and the through hole can be processed by processes such as mechanical drilling and the like, the technical scheme of the invention can be suitable for a thick copper circuit board with copper thickness larger than 3 OZ;
on the other hand, because blind holes do not need to be drilled after each layer is added, but through holes are drilled at the last, the process of the technical scheme of the invention is relatively simpler and more reliable.
Example III,
Referring to fig. 5, an embodiment of the present invention provides a method for processing an HDI circuit board, where the method is used to process an interlayer interconnection structure of the HDI circuit board according to the first embodiment, and the method includes:
210. and manufacturing a multilayer board comprising N layers of copper foil layers, wherein N is an integer larger than 2, the N-2 layers of copper foil layers positioned on the inner layer are processed into a circuit pattern, a preset position of each layer in M layers of copper foil layers needing interlayer interconnection is provided with a metal area, and a preset position of each layer in other (N-M) layers of copper foil layers except the M layers of circuit layers is provided with an insulation area.
The process for manufacturing the multilayer board can adopt the conventional processes of laminating, layer adding and the like, and is different from the HDI manufacturing technology in the prior art in that no metallized blind hole needs to be manufactured after the layer is added every time, and the layer is continuously added after the line pattern of the added layer is manufactured; moreover, the circuit patterns of the respective circuit layers need to be specially designed:
for a certain circuit layer needing interlayer interconnection shown in fig. 2, a metal area is reserved in advance at a position where a metalized through hole needs to be processed, the metal area is copper foil which is not etched to be removed, and the shape of the metal area can be circular, oval or other shapes.
For a certain circuit layer without interlayer interconnection shown in fig. 3, an insulating region is formed in advance at a position where a through hole needs to be processed, the copper foil of the insulating region is etched away, and the insulating region can be circular, oval or other shapes.
220. Processing a metalized through hole penetrating through the N layers of copper foil layers at the preset position, so that the metal area becomes a metal connecting ring surrounding the metalized through hole, and the insulation area becomes an insulation isolating ring surrounding the metalized through hole; and processing two outermost copper foil layers of the multilayer board into a circuit pattern.
And after the layers are added to the required number, processing a through hole penetrating through the N layers of copper foil layers at the preset position. After the predetermined position is processed with the through hole, the metal region is formed as a metal ring surrounding the through hole, and the insulating region is formed as an insulating isolation ring surrounding the through hole. When the via is metallized as a metallized via, the metal ring becomes a metal connecting ring that is electrically connected to the metal inner wall of the metallized via. The insulating isolation ring enables the circuit pattern of the layer to be isolated and not connected with the metalized through hole. The metal connecting ring is connected with the circuit pattern of the layer through a designed and processed connecting circuit. Therefore, the circuit layers needing to be interconnected among the layers are interconnected through the metal connecting rings and the metalized through holes, and other circuit layers are separated from the metalized through holes by the insulating isolating rings and cannot be connected with each other.
Optionally, in an embodiment, processing a metalized via penetrating through the N circuit layers at the preset position includes: machining a through hole penetrating through the N layers of circuit layers at the preset position by adopting a mechanical drilling process; and metalizing the through hole to form a metalized through hole.
In the foregoing, an embodiment of the present invention provides a method for processing an HDI circuit board, which adopts a technical scheme that a metalized through hole is processed on the HDI circuit board, a metal connection ring is manufactured on a circuit layer requiring interlayer interconnection and connected to the metalized through hole, and an insulation isolation ring is manufactured on other circuit layers to insulate and isolate the other circuit layers from the metalized through hole, so that the following technical effects are achieved:
on one hand, because the metallized through hole is used as an interlayer interconnection channel and the through hole can be processed by processes such as mechanical drilling and the like, the technical scheme of the invention can be suitable for a thick copper circuit board with copper thickness larger than 3 OZ;
on the other hand, because blind holes do not need to be drilled after each layer is added, but through holes are drilled at the last, the process of the technical scheme of the invention is relatively simpler and more reliable.
The HDI circuit board, the interlayer interconnection structure thereof, and the processing method thereof provided by the embodiment of the present invention are described in detail above, but the description of the embodiment is only for helping understanding the method of the present invention and the core idea thereof, and should not be construed as limiting the present invention. Those skilled in the art should also appreciate that they can easily conceive of various changes and substitutions within the technical scope of the present disclosure.
Claims (5)
1. The utility model provides an interlayer interconnection structure of high density interconnection HDI circuit board, HDI circuit board includes N layer circuit layer, and N is for being greater than 2 integer, its characterized in that:
the interlayer interconnection structure comprises a metalized through hole penetrating through the N layers of the circuit layers;
the N layers of circuit layers comprise M layers of circuit layers needing interlayer interconnection, each layer of circuit layer in the M layers of circuit layers comprises a metal connecting ring surrounding the metalized through hole, the M layers of circuit layers are interconnected through the metal connecting ring and the metalized through hole, M is an integer and is more than or equal to 2 and less than M < N;
each of the other N-M layers of circuit layers except the M layers of circuit layers comprises an insulating isolation ring surrounding the metalized through hole, so that the other N-M layers of circuit layers are isolated from each other.
2. The method of claim 1, wherein:
the thickness of each layer of the circuit layer is more than or equal to 3 OZ.
3. The utility model provides a high density interconnect HDI circuit board, includes N layer circuit layer, and N is for being greater than 2 integer, its characterized in that:
the HDI circuit board includes at least one interlayer interconnection structure as set forth in claim 1 or 2.
4. A method of processing a high-density interconnect HDI circuit board for processing an interlayer interconnect structure of the HDI circuit board recited in claim 1, the method comprising:
manufacturing a multilayer board comprising N layers of copper foil layers, wherein N is an integer larger than 2, the N-2 layers of copper foil layers positioned on the inner layer are processed into a circuit pattern, a preset position of each layer in M layers of copper foil layers needing interlayer interconnection is provided with a metal area, and a preset position of each layer in other N-M layers except the M layers of copper foil layers is provided with an insulation area;
processing a metalized through hole penetrating through the N layers of copper foil layers at the preset position, so that the metal area becomes a metal connecting ring surrounding the metalized through hole, and the insulation area becomes an insulation isolating ring surrounding the metalized through hole;
and processing two outermost copper foil layers of the multilayer board into a circuit pattern.
5. The method of claim 4, wherein the step of forming a metallized via through the N circuit layers at the predetermined location comprises:
machining a through hole penetrating through the N copper foil layers at the preset position by adopting a mechanical drilling process;
and metalizing the through hole to form a metalized through hole.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310442533.0A CN104470203A (en) | 2013-09-25 | 2013-09-25 | HDI circuit board and interlayer interconnection structure and machining method thereof |
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| CN201310442533.0A CN104470203A (en) | 2013-09-25 | 2013-09-25 | HDI circuit board and interlayer interconnection structure and machining method thereof |
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Cited By (6)
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| CN104883810A (en) * | 2015-05-15 | 2015-09-02 | 江门崇达电路技术有限公司 | Manufacture method for PCB having dense heat dissipation holes |
| CN105376961A (en) * | 2015-11-03 | 2016-03-02 | 江门崇达电路技术有限公司 | HASL surface treatment PCB manufacturing method |
| CN107683032A (en) * | 2017-08-31 | 2018-02-09 | 江苏普诺威电子股份有限公司 | Two-sided etching burying capacitance circuit board manufacture craft |
| CN108601217A (en) * | 2018-05-04 | 2018-09-28 | 生益电子股份有限公司 | PCB preparation method and PCB |
| CN109600938A (en) * | 2018-12-28 | 2019-04-09 | 郑州云海信息技术有限公司 | A kind of autocontrol method and device of PCB layout |
| CN114521060A (en) * | 2020-11-18 | 2022-05-20 | 深南电路股份有限公司 | Printed circuit board and preparation method thereof |
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Application publication date: 20150325 |