CN104467851A - Event-driven analog/digital converter and compressed sampling method thereof - Google Patents

Abstract

The invention discloses an event-driven analog/digital converter and a compression sampling method thereof. The converter comprises: a 1bit digital/analog converter, a direction comparator, direction control logic, a multiplexer, a pass through comparator, Sawtooth control logic, time measurer, threshold generator control logic and threshold generator. The compressed sampling method includes: S41: converting an analog signal into a sawtooth signal; S42: judging the change direction of the sawtooth signal; S43: outputting the sawtooth signal and the upper threshold or lower threshold; S44: comparing the sawtooth signal with the upper threshold Boundary or the sawtooth signal and the lower bound of the threshold, judge whether to trigger the sampling action, if yes, go to step S45, otherwise repeat step S44; S45: trigger the sampling action, generate a sampling pulse signal; S46: measure the sampling pulse signal The time interval of , and the threshold interval is changed according to the time interval. The event-driven analog/digital converter provided by the invention saves circuit area, has low system noise and low power consumption.

Description

An event-driven analog/digital converter and its compression sampling method

technical field

The invention relates to the field of analog/digital converters, in particular to an event-driven analog/digital converter and a compression sampling method thereof.

Background technique

The sensor network is the interface between the real world and the computer world. It is through the sensor network that people can understand and change the real world faster and more accurately, thereby promoting the development of society. Because of its importance, some experts pointed out that the entire semiconductor industry will also be driven by it for a long period of time in the future. However, in some applications, large-scale deployment of sensor nodes and long-term detection of signals are required. For battery-powered sensor nodes, ultra-low power consumption technology will greatly extend the service life of the entire network and reduce labor costs due to frequent battery replacement. At the same time, how to enable sensor nodes to work in an ultra-low power consumption mode is also a huge challenge.

The traditional A/D converter is clock-driven sampling, see Figure 13(b) clock-driven sampling. Its clock frequency is determined by the Nyquist sampling frequency, that is, the sampling frequency must be equal to or higher than twice the highest frequency of the signal. However, if the short-time Fourier analysis is performed on the signal, it can be seen that not every time period of the signal is changing according to the highest frequency component. Therefore, if the signals of all time periods are uniformly sampled using the Nyquist sampling frequency, energy will inevitably be wasted. Especially when the signal is sparse in time domain and its highest frequency is extremely high. An extreme example: a single pulse signal, its time domain is sparse, but according to the Nyquist sampling theorem, its sampling frequency will be theoretically close to infinity. In real life, there are many complex signals in the time domain and frequency domain, such as audio signals, heart and brain signals, and so on.

In order to achieve low-power sampling of signals with sparse time domain and relatively high highest frequency, the researchers proposed event-driven sampling (Event-Driven Sampling), which can achieve sampling with an average sampling rate lower than the Nyquist sampling frequency. . The basic idea is that when the change of the observed signal exceeds a certain threshold, the event is considered to be triggered, and the signal is sampled at this time, see Figure 13(a) event-driven sampling. Therefore, the sampling points of the signal are composed of a series of times and the thresholds corresponding to each time point. When the signal changes slowly (quiet period), fewer sampling points are generated, and when the signal changes sharply (active period), the system generates more sampling points. Less/more sampling points correspond to less/more information in the rest period/(active period) signal. Event-driven sampling systems consume less power than traditional clock-driven A/D converters. Another advantage of the sampling method in which the sample size is proportional to the amount of information is that the pressure of sample data transmission is relatively small. Because the reduction of the amount of data will inevitably reduce the pressure of the signal transmission section. Especially for sparse signals in the time domain, this sampling method will greatly reduce the overall power consumption of the system from a system perspective.

In fact, event-triggered sampling systems are not entirely new. As early as the 1960s, Tomovic and Bekey proposed a non-uniformly spaced sampling strategy. In the past few decades, the main research focus of the semiconductor industry has been on how to increase the speed of calculation. Therefore, this sampling idea has not been taken seriously. In recent years, due to the demand for ultra-low power consumption of integrated circuits, this idea has returned to people's sight. The famous professor Yannis Tsividis of Columbia University, Professor Sonkusale of Tufts University (Turfts), Professor Serdijn of the Netherlands and other teams have carried out research on it, and A large number of papers have been published.

Event-driven analog-to-digital converters based on compressive sensing technology have great potential in realizing ultra-low power system applications. But because this technology is in its infancy, there are still many problems. For example, Figure 14 and Figure 15 respectively show two cases where the threshold does not change with the signal. For Figure 14, when the signal changes sharply, in order to make the sampling point follow the signal to be sampled, it is necessary to set the voltage difference between the upper and lower boundaries of the sampling threshold to a larger value. However, for the period when the signal to be sampled does not change so drastically, the sampling points are too sparse and rough, and the amount of information is seriously lost, which is not conducive to signal restoration. In order not to lose the amount of information during the slow signal change period, the voltage difference between the upper and lower bounds of the threshold needs to be set to a small value, as shown in FIG. 15 . However, due to the time delay problem of the jump of the circuit itself, when the signal changes rapidly, the change speed of the upper and lower bounds cannot follow the change of the signal, and the signal loss is more serious at this time. It can be seen that the fixed threshold method is not conducive to time-domain signal sampling. In order to solve this problem, Professor Giannis (Tsividis) adopts the strategy of decreasing the threshold upper bound stepwise with time for event-triggered sampling, as shown in Figure 16. However, a fatal problem with the strategy he proposed is that at the moment when the threshold upper bound decreases stepwise, the signal just changes to the middle of the moment before and after this moment, which will bring about a change in the sampling point of the signal. Uncertain (see circled in Figure 16 where the sampling boundary is uncertain). Professor Sonkusale proposed the idea of adaptive threshold, see Figure 18. However, in order to be able to change the upper and lower bounds of the threshold, two digital-to-analog converters (DACs) are used in its circuit implementation, which increases the chip area and power consumption of the chip; There must be a certain deviation in the problem, which will also bring some noise to the system.

Contents of the invention

In view of the problems existing in the above-mentioned prior art, the present invention proposes an event-driven analog/digital converter and its compressed sampling method, which is based on compressed sensing technology and overcomes the problems of the existing event-driven analog/digital converter in There are defects in chip area, system power consumption and control methods.

In order to solve the problems of the technologies described above, the present invention is achieved through the following technical solutions:

The present invention provides an event-driven analog-to-digital converter, which includes:

1bit digital/analog converter module, used to receive the analog signal to be converted, and convert the analog signal into a sawtooth signal between the upper and lower bounds of the threshold;

a direction comparator for judging the change direction of the sawtooth signal;

The direction control logic is used to receive the judgment result of the direction comparator and generate a direction signal;

a multiplexer, configured to combine the judgment result of the direction comparator to output the sawtooth signal and an upper threshold or a lower threshold;

A crossing comparator, configured to receive the output of the multiplexer, and determine whether the sawtooth signal crosses out of the region between the upper and lower bounds of the threshold, if crossing out, generate a crossing signal;

The sawtooth control logic is used to receive the direction signal of the direction comparator and the crossing signal of the crossing comparator, and generate a switching signal group and a crossing pulse signal, and the switching signal group is used to control the 1bit digital/analog conversion device module;

The time measurer includes an analog time measurement module and a time comparator, the analog time measurement module is used to receive the crossing pulse signal, and measures the time interval of the crossing pulse signal, and the time comparator is used to generate two pulse signals ;

The threshold generator control logic is used to receive the pulse signal and generate a control signal;

The threshold generator is configured to receive the control signal, generate the upper and lower threshold signals, and transmit the upper and lower threshold signals to the 1-bit digital/analog converter module and the multiplexer.

The present invention adopts a 1-bit digital/analog converter module, which reduces the chip area and the power consumption of the chip, and the single digital/analog converter does not have the deviation problem of multiple analog/digital converters, and does not introduce differences due to different Noise caused by the deviation of the A/D converter.

Preferably, the analog measurement time interval module includes: a constant current source, used to generate charges; a capacitor, used to receive the charges generated by the constant current source; a cut-off switch, used to control whether the constant current source gives The capacitor is charged; a reset switch is used to reset the charge on the capacitor. When a pulse signal representing an event passes, the cut-off switch is opened and the reset switch is closed. At this time, the charge stored on the capacitor is discharged and the voltage becomes zero; when the pulse leaves, the cut-off switch is closed and the reset switch is closed. When disconnected, the constant current source starts to charge the capacitor. At this time, the time interval from the last pulse can be obtained by measuring the voltage value at both ends of the capacitor.

In traditional applications, most of the timing modules are completed by means of digital counters. However, although the timing of this digital module is relatively accurate, it also brings many unfavorable factors to the system, for example, the increase of circuit area, the increase of power consumption, the introduction of clock noise and so on.

The analog method of the present invention is used to measure the time interval, that is, the system does not need to know the exact value of each time point, but only needs to know the relationship between the interval between two times and the two time thresholds. Therefore, the precision improvement introduced by using the digital timing module cannot make up for the overhead caused by its various shortcomings in terms of performance.

Compared with the traditional digital timing method, the method for measuring the time interval in analog mode proposed by the present invention has the following characteristics:

(1) The circuit area is extremely small. Compared with digital, the analog method uses only a few components and does not require a clock generation circuit. Therefore, the circuit area is greatly saved;

(2) The power consumption of the circuit is extremely low. The power consumption of the analog time measurement circuit mainly comes from the charging and discharging of the capacitor. In this design, a very small current is used to charge the capacitor, so its power consumption is extremely low. Secondly, compared with the digital timer, the analog timing has no clock module, so the power consumption brought by the clock of the digital timer does not exist in the analog circuit, thereby reducing the power consumption of the circuit;

(3) The input noise is extremely low. Because the analog time measurement proposed by the present invention has no clock module, compared with the digital timer, the circuit noise due to the coupling of the clock signal does not exist in the circuit. Thus, the input noise of the system can be greatly optimized.

The present invention also provides a compressed sampling method of an event-driven analog/digital converter, which includes the following steps:

S41: converting the analog signal to be converted into a sawtooth signal between the upper and lower bounds of the threshold;

S42: Comparing the sawtooth signal with a median threshold value, and judging the change direction of the sawtooth signal;

S43: Output the sawtooth signal and an upper threshold or the sawtooth signal and a lower threshold according to the change direction of the sawtooth signal;

S44: Compare the sawtooth signal with the upper threshold or the sawtooth signal with the lower threshold to determine whether to trigger the sampling action, if yes, go to step S45, otherwise repeat step S44;

S45: Trigger the sampling action to generate a sampling pulse signal;

S46: Measure the time interval of the sampling pulse signal in an analog manner, and change the threshold distance according to the time interval.

Preferably, step S43 is specifically: Step S43 is specifically: when the sawtooth signal is smaller than the median threshold value, output the sawtooth signal and the lower threshold threshold; when the sawtooth signal is greater than the median threshold value, output the sawtooth signal Signal and Upper Threshold Outputs.

Preferably, the method for judging whether to trigger the sampling action in step S44 is: as the signal changes, when the sawtooth signal is smaller than the upper threshold limit or the sawtooth signal is greater than the upper threshold limit, the sampling action is triggered , to generate a sampling pulse signal.

Preferably, step S45 is specifically: measure the time interval of the pulse signal through the analog time interval measurement module in combination with the sampled pulse signal, if the measured time interval is less than the first time threshold, the threshold interval increases, if the measured The time interval is greater than the second time threshold, and the threshold interval decreases; wherein: the first time threshold is smaller than the second time threshold.

Preferably, the increase of the threshold distance is the doubling of the threshold distance, and the decrease of the threshold distance is the halving of the threshold distance.

Preferably, the first time threshold and the second time threshold are determined according to the highest frequency of the sampling signal through the Nyquist sampling theorem.

Compared with the prior art, the present invention has the following advantages:

(1) The event-driven analog/digital converter and its compressed sampling method provided by the present invention are adaptive analog/digital conversion, and the threshold value will change in real time with the change of the collected signal, so as to ensure the integrity of the amount of information and facilitate signal restoration;

(2) The present invention proposes the transformation of the input signal for the first time, that is, the input signal is changed into a sawtooth signal, and the signal is sampled in combination with the adaptively increasing and decreasing threshold upper and lower bounds. This method combines the change of the input signal, rather than the threshold following the signal change. , the circuit area is small, the power consumption is low, and the adaptive increase and decrease of the threshold upper and lower bounds reduces the power consumption of the entire system;

(3) The present invention adopts a 1bit analog/digital converter, which reduces the area and power consumption of the chip, and realizes that the sensor works in an ultra-low power consumption mode;

(4) The present invention uses an analog method to measure the time interval, which saves the circuit area, optimizes the noise of the circuit system, and reduces the power consumption of the circuit system under the condition of meeting specific application requirements.

Description of drawings

Embodiments of the present invention will be further described below in conjunction with accompanying drawings:

Fig. 1 is a structural diagram of an event-driven analog/digital converter of the present invention;

Fig. 2 is the circuit diagram of measuring time interval of the present invention;

Fig. 3 is the circuit diagram of 1bit digital/analog conversion module of the present invention;

Fig. 4 is the circuit diagram of direction comparator or through comparator of the present invention;

Fig. 5 is a direction control logic circuit diagram of the present invention;

Fig. 6 is the circuit diagram of multiplexer of the present invention;

Fig. 7 is the circuit diagram of sawtooth control logic of the present invention;

Fig. 8 is the circuit diagram of analog time measurer of the present invention;

Fig. 9 is a control logic circuit diagram of the threshold value generator of the present invention;

Fig. 10 is the circuit diagram of the threshold generator of the present invention;

11 is a diagram of the operation steps of the event-driven analog/digital converter compression sampling method of the present invention;

12 is a sampling flow chart of the event-driven analog/digital converter compression sampling method of the present invention;

Figure 13a is event-driven sampling;

Figure 13b is time-driven sampling;

FIG. 14 is a timing diagram of a signal with an excessively large sampling threshold interval;

FIG. 15 is a timing diagram of a signal in which the existing sampling threshold spacing is too small;

FIG. 16 is a signal timing diagram of an existing upper threshold threshold decreasing with a time step;

Figure 17 is an existing event-based adaptive analog/digital converter;

Fig. 18 is a signal timing diagram obtained by using the event-type adaptive analog-to-digital converter in Fig. 17;

Fig. 19a is a timing diagram of signals obtained by using the event-type A/D converter of the present invention;

Fig. 19b is a timing diagram of the sampling pulse corresponding to Fig. 19a;

Fig. 19c is a timing diagram of the signal direction corresponding to Fig. 19a;

Fig. 19d is a timing diagram of the threshold window frame corresponding to Fig. 19a.

Explanation of symbols: 1-1bit digital/analog converter, 2-direction comparator, 3-direction control logic, 4-multiplexer, 5-pass through comparator, 6-sawtooth control logic, 7-time measuring device, 8-threshold generator control logic, 9-threshold generator.

Detailed ways

The embodiments of the present invention are described in detail below. This embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following implementation example.

Example 1:

As shown in Figure 1-10, the event-driven A/D conversion module of this embodiment includes: 1bit D/A converter 1, direction comparator 2, direction control logic 3, multiplexer 4, pass through comparator 5. Sawtooth control logic 6, time measurer 7, threshold generator control logic 8 and threshold generator 9.

The analog signal Vin to be converted _is input to the 1bit digital/analog conversion module 1, and the circuit diagram of the 1bit digital/analog conversion module 1 is shown in Figure 3. Under certain conditions, the analog signal _Vin to be converted is converted to a value located at the threshold The sawtooth signal V _on between the upper and lower bounds VH and VL is output to the direction comparator 2 and the multiplexer 3; the direction comparator 2 combines the sawtooth signal V _on with the threshold median value V _m =(VH+VL)/2 By comparison, judge the change direction of the received signal, when V _on > V _m , it is increment, when V _on < V _m , it is decrement, output direction signal, that is COMD; direction control logic 3 according to the judgment result of direction comparator 2 , to control the output of the multiplexer 4. When the signal change direction is increasing, the multiplexer 4 outputs the sawtooth signal V _on and the upper threshold VH to the crossing comparator 5. When the signal change direction is decreasing, The multiplexer 4 outputs the sawtooth signal V _on and the threshold lower bound VL to the crossing comparator 5; the crossing comparator 5 compares the input sawtooth signal V _on and the threshold upper bound VH or the sawtooth signal V _on and the threshold lower bound VL, Output the judgment result, that is, the crossing signal COMC. When V _on >VH or V _on <VL, the representative signal crosses the threshold, and the sampling action is triggered at this time; the sawtooth control logic 6 receives the crossing signal COMC, and generates a sampling pulse signal, that is, the crossing The pulse signal CP, and output switching signal group CX according to the direction signal COMD and the crossing signal COMC, controls the switching of the left and right capacitor branches in the 1bit digital/analog conversion module 1 to generate the sawtooth signal V _on , the circuit diagram of which is shown in Figure 7; time The measurer 7 includes an analog measurement time interval module T2V and two time comparators, and its circuit is shown in Figure 8. The analog measurement time interval module T2V receives the crossing pulse signal CP, and measures the time interval of the crossing pulse signal CP, and converts this time The interval is compared with the first time threshold V _thW and the second time threshold V _thN respectively by two time comparators. When the signal changes too fast, so that the sampling pulse time interval is less than the first time threshold V _thW , the output threshold interval increases signal W, when the signal changes too slowly, so that the sampling pulse time interval is greater than the second time threshold V _thN , the output threshold interval reduces the signal N; the threshold generator control logic 8 adopts a bidirectional shift register, and its circuit diagram is shown in Figure 9, and its receiving The threshold interval increase signal W and the threshold interval decrease signal N output by the time measurer 7 generate control signals <1, 2, 3...n> to control the threshold generator 9; the circuit diagram of the threshold generator 9 is shown in FIG. 10 , It receives the control signal of the threshold generator control logic 8, generates the upper and lower threshold signals VH, VL, and feeds them back to the 1-bit digital/analog converter 1 and the multiplexer 4 to achieve the function of threshold self-adaptation.

In this embodiment, the direction comparator 2 and the ride-through comparator 5 adopt the same circuit structure, as shown in FIG. 4 , but the bias current is slightly different. the

In this embodiment, the value of VH is (Vdd-Vss)/2+2 ^N △V, and the value of VL is (Vdd-Vss)/2-2 ^N △V. For the convenience of illustration, the value of Vss in this embodiment is for GND. Among them, N is determined by the rate of change of the signal. When the signal changes very slowly, N takes 1; when the signal changes very fast, N takes the maximum value of the threshold generator. △V is the least significant bit of the threshold generator 9. After the capacitor in the 1bit digital-to-analog converter is powered on, V _in will converge to between VH and VL at a rate of 2 ^N.

Example 2:

This embodiment provides a method for measuring time intervals in analog mode. The circuit diagram of the analog measurement time interval module T2V is shown in Figure 2, which includes: a constant current source for generating charges; a capacitor for receiving the constant current Charge generated by current source; current cutoff switch Used to control whether the constant current source charges the capacitor; reset switch Used to reset the charge on the capacitor. Since the voltage of the capacitor U=Q/C, and the charge accumulated on the capacitor is Q=It, where I is the current of the constant current source, so U=IΔt/C. That is, the voltage on the capacitor is proportional to the time. Example: When a pulse signal representing an event passes, the cutout switch opens and the reset switch closes At this time, the charge stored on the capacitor is discharged, and the voltage becomes zero. When this pulse leaves (pulse falling edge trigger), the cutout switch closes and the reset switch opens , Start charging at this time, at this time, the time interval from the last pulse can be known by measuring the voltage value at both ends of the capacitor, that is, Δt=UC/I.

Figure 19a shows the signal timing diagram obtained by using the event-driven A/D converter of this embodiment. In order to show the advantages of the present invention, Figure 18 shows the same segment of signal through the existing Compared with the timing diagram of the signal obtained by the analog/digital converter (its structure is shown in Figure 17), it can be found that there are 10 changes in the threshold window in Figure 19a, and 31 changes in the threshold window in Figure 18 . Therefore, the power consumption of the analog/digital converter of the present invention is about one-third of the power consumption of the existing analog/digital converter shown in FIG. 17 for this segment of signal, which greatly reduces the power consumption of the system.

Example 3:

This embodiment describes in detail the compression sampling method using the event-driven analog/digital converter of the present invention, its operation flow chart and sampling process are shown in Figures 11 and 12, and the specific operation steps are as follows:

S41: converting the analog signal V _in to be converted into a sawtooth signal V _on ;

S42: Compare the sawtooth signal V _on with the threshold median value V _m (V _m = (VH+VL)/2), and judge the change direction of the sawtooth signal V _on (whether it is increasing or decreasing), when V _on >V _m It is increasing when V _on <V _m is decreasing;

S43: Output the sawtooth signal and the threshold upper bound or the sawtooth signal and the threshold lower bound according to the change direction of the sawtooth signal V _on ; when the signal change direction is increasing, output the sawtooth signal V _on and the threshold upper bound VH, when the signal When the direction of change is decreasing, the sawtooth signal V _on and the lower threshold VL are output;

S44: Compare the sawtooth signal V _on with the upper threshold VH or the sawtooth signal V _on with the lower threshold VL to determine whether to trigger the sampling action. When V _on >VH or V _on <VL, go to step S45, otherwise repeat step S44 ;

S45: Trigger the sampling action to generate a sampling pulse signal;

S46: Measure the time interval of the sampling pulse signal in an analog manner, and compare the measured time interval Δt with the first time threshold V _thW and the second time threshold V _thN through two time comparators to generate two pulse signals W and N, specifically: V _thW =10 μs, V _thN =20 μs, when Δt<10 μs, the threshold distance is doubled (that is, the pulse signal W), and when Δt>20 μs, the threshold distance is halved (that is, the pulse signal N);

The signal timing diagram obtained according to the above sampling steps is shown in Figure 19a, and Figure 19b is the sampling pulse timing diagram corresponding to 19a; Figure 19c is the signal direction timing diagram corresponding to 19a, where 0 means decreasing and 1 means increasing; 19d is a timing diagram of the threshold distance corresponding to 19a.

19a and b, when the changed sawtooth signal V _on changes to the "touch" threshold VH or VL, the "crossing" action occurs, and a sampling pulse is generated at this time to record the sampling moment.

Referring to Fig. 19a, c, the direction of signal transformation can be obtained by comparing the sawtooth signal V _on with the threshold median value V _m = (VH+VL)/2 through a comparator. This signal is to mark which threshold (VH/VL) crossing action occurs between V _on and _VH when the sampling pulse _is generated _. 1; and when V _on and VL have a "crossing" action (V _on <V _m ), the direction signal outputs 0 at this time.

Combining 19a and d, when the signal changes too fast, so that the sampling pulse time interval is less than 10μs, the threshold window width is doubled. And when the signal changes too slowly, making the sampling pulse time interval greater than 20μs, the threshold window width is halved.

The analog/digital converter designed in the present invention records the sampled signal by recording the time when the signal changes to the threshold and the magnitude of the threshold. When restoring the signal, the sampling moment recorded by the sampling pulse is: the CP signal in Figure 1, and the amplitude value corresponding to each sampling moment (the accumulation of the threshold interval, that is: (VH-VL)/2 or -( VH-VL)/2 to obtain a series of discrete sampling points, and then the original signal can be obtained by filtering and difference for this series of discrete sampling points. There are many specific restoration algorithms for non-uniform sampling, here I won't repeat them here.

The signal output of the sampling method proposed by the present invention is also determined according to the application scenario. In some special references, such as geological detection, human health detection and other applications that require emergency alarms, it is only necessary to output an emergency alarm signal when an emergency occurs, and not output it for the rest of the time.

What is disclosed here is only the preferred embodiment of the present invention. This specification selects and specifically describes these embodiments in order to better explain the principle and practical application of the present invention, not to limit the present invention. Any modifications and changes made by those skilled in the art within the scope of the description shall fall within the protection scope of the present invention.

Claims (8)

1. an event driven A/D converter, is characterized in that, comprising:

1bit D/A converter module, for receiving analog signal to be converted, and converts described analog signal to serrated signal between threshold value bound;

Direction comparator, for judging the change direction of described serrated signal;

Direction controlling logic, for receiving the judged result of described direction comparator, and produces direction signal;

Multiplexer, for the judged result in conjunction with described direction comparator, exports described serrated signal and the threshold value upper bound or threshold value lower bound;

Passing through comparator, for receiving the output of described multiplexer, and judging whether described serrated signal passes through out the region between described threshold value bound, as passed through out, producing and passing through signal;

Sawtooth control logic, for receive described direction comparator direction signal and described pass through comparator pass through signal, and produce switching signal group and pass through pulse signal, described switching signal group is for controlling described 1bit D/A converter module;

Time measurement device, comprises simulated time measurement module and time comparator, and described simulated time measurement module passes through pulse signal described in receiving, and passes through the time interval of pulse signal described in measurement, and described time comparator is for generation of two pulse signals;

Threshold generator control logic, for receiving described pulse signal, and produces control signal;

Threshold generator, for receiving described control signal, generating threshold value bound signal, and giving described 1bit D/A converter module and described multiplexer by described threshold value bound Signal transmissions.

2. event driven A/D converter according to claim 1, is characterized in that, described analogue measurement time interval module comprises:

Constant-current source, for generation of electric charge;

Electric capacity, for receiving the electric charge that described constant-current source produces;

Whether cut-off switch, for controlling described constant-current source to described capacitor charging;

Resetting Switching, for resetting the electric charge on described electric capacity.

3. a compressive sampling method for event driven A/D converter, is characterized in that, comprises the following steps:

S41: convert analog signal to be converted to serrated signal between threshold value bound;

S42: described serrated signal and threshold value intermediate value are compared, judges the change direction of described serrated signal;

S43: according to the change direction of described serrated signal, exports described serrated signal and the threshold value upper bound or described serrated signal and threshold value lower bound;

S44: more described serrated signal and the described threshold value upper bound or described serrated signal and described threshold value lower bound, judging whether to carry out sampling action triggering, is proceed to step S45, otherwise repeats step S44;

S45: trigger sampling action, produces sampling pulse signal;

S46: the time interval of being measured described sampling pulse signal by analog form, converts threshold distance according to the described time interval compared with time interval threshold value.

4. the compressive sampling method of event driven A/D converter according to claim 3, it is characterized in that, step S43 is specially: when described serrated signal is less than threshold value intermediate value, described serrated signal and threshold value lower bound is exported;

When described serrated signal is greater than threshold value intermediate value, described serrated signal and the threshold value upper bound are exported.

5. the compressive sampling method of event driven A/D converter according to claim 3, it is characterized in that, judge whether in step S44 that the method for carrying out sampling action triggering is: along with the conversion of signal, when described serrated signal is less than the described threshold value upper bound or described serrated signal is greater than the described threshold value upper bound, trigger sampling action, produce sampling pulse signal.

6. the compressive sampling method of event driven A/D converter according to claim 3, it is characterized in that, step S45 is specially: measure in conjunction with the time interval of described sampling pulse signal by simulated time interval measurement module pulse signals, if the time interval recorded is less than very first time threshold value, threshold distance increases, if record interval greater than the second time threshold, threshold distance reduce;

Wherein: described very first time threshold value is less than described second time threshold.

7. the compressive sampling method of event driven A/D converter according to claim 6, is characterized in that, described threshold distance increases to threshold distance and doubles, and described threshold distance is reduced to threshold distance and reduces by half.

8. the compressive sampling method of event driven A/D converter according to claim 6, is characterized in that, described very first time threshold value and described second time threshold are determined according to the highest frequency of sampled signal by nyquist sampling theorem.