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CN104465533B - 自粘合裸片 - Google Patents

自粘合裸片 Download PDF

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Publication number
CN104465533B
CN104465533B CN201410478610.2A CN201410478610A CN104465533B CN 104465533 B CN104465533 B CN 104465533B CN 201410478610 A CN201410478610 A CN 201410478610A CN 104465533 B CN104465533 B CN 104465533B
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Prior art keywords
die
substrate
nanowires
backside
semiconductor
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CN104465533A (zh
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张荣伟
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Texas Instruments Inc
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Texas Instruments Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/63—Connectors not provided for in any of the groups H01L24/10 - H01L24/50 and subgroups; Manufacturing methods related thereto
    • H01L24/68—Structure, shape, material or disposition of the connectors after the connecting process
    • H01L24/70—Structure, shape, material or disposition of the connectors after the connecting process of a plurality of connectors
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    • H01L23/00—Details of semiconductor or other solid state devices
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Abstract

本发明涉及一种自粘合裸片。一种用于有效地增强半导体封装的热性能的方法和设备。本发明的概念是在集成电路裸片(603)的背侧上提供硅纳米线以将所述裸片直接附着到衬底(606)，借此改进裸片与衬底之间的界面，且因此增强热性能并通过改进粘附性而增强可靠性。

Description

自粘合裸片
技术领域
本文中所描述的发明一般来说涉及半导体装置封装及相关联裸片附着方法。特定来说，本发明涉及当在经模制封装中实施时在裸片到引线框架的界面处提供高热性能的具成本效益封装方法。本文中的原理也适用于其它半导体封装及装置。
背景技术
本发明一般来说涉及集成电路(IC)的封装。更特定来说，描述一种适合于供在封装IC裸片中使用的新裸片附着方法以消除裸片附着材料且减少成本，同时提供良好热性能且无需担心树脂渗出。
存在用于封装集成电路(IC)裸片的若干种常规工艺。举例来说，许多IC封装利用金属引线框架。引线框架通常包含多个引线或触点，及任选地裸片附着垫(浆形件)，裸片可借助于适合粘合材料附着于所述裸片附着垫上。裸片通常通过适当连接器(例如，接合线)电连接到引线框架引线。一般来说，裸片及引线框架的部分用模制材料囊封以保护裸片的有源侧上的电连接及脆弱电组件。
上述粘合材料可呈膏(所谓的裸片附着膏)或膜(裸片附着膜)的形式。裸片附着膏通常含有约80wt％的银填充物以及约20wt％的聚合物树脂及添加剂。关于裸片附着膏存在许多限制，包含树脂渗出(RBO)、不一致的裸片附着厚度、有机组分释气到裸片表面上的接合垫上导致垫上不粘性(NSOP)或导致腐蚀等等。已开发出裸片附着膜(DAF)来解决所述问题中的一些问题，例如RBO及不一致的裸片附着厚度等。然而，仍存在一些与DAF相关联的问题，例如，有限的导热率、锯割及裸片拾取问题。此外，DAF材料的成本远高于裸片附着膏。
另一方面，已将更多努力聚焦于仿壁虎粘合剂，其主要依赖于范德华(Van derWaals)力通过在晶片或芯片的背侧上生长纳米材料(例如，碳纳米管)来进行粘附。生长温度为约750℃到850℃。然而，微电子芯片无法承受如此高的温度。
鉴于前述内容，需要继续努力来产生当在经模制封装中实施时在裸片到引线框架的界面处提供高热性能的具成本效益封装方法。
发明内容
以下呈现简化发明内容，以便提供对本发明的一或多个方面的基本理解。本发明内容并非本发明的广泛概述，且既不打算确定本发明的关键性或决定性要素，也不打算描绘其范围。而是，发明内容的主要目的是以简化形式呈现本发明的一些概念，以作为稍后所呈现的更详细说明的前言。
根据本申请案的一个实施例，提供一种设备。所述设备包括：半导体裸片，其具有顶侧及背侧；多个硅纳米线，其形成于所述半导体裸片的所述背侧上；衬底，其具有带有裸片附着垫的顶侧以及背侧；其中在维持集成电路裸片的顶表面与所述衬底的顶表面平行的同时将所述裸片的所述背侧定位于所述裸片附着垫上；且其中通过所述硅纳米线使用在0.01兆帕(MPa)与1MPa之间的压力将所述半导体裸片机械附着到所述衬底。
根据本申请案的另一个实施例，提供一种将半导体裸片附着到衬底的方法。所述方法包括以下步骤：提供含有集成电路的半导体晶片，其中所述晶片具有顶侧及背侧；在所述晶片的所述背侧上印刷含有金属纳米粒子的油墨；使用金属辅助蚀刻在所述晶片的所述背侧上蚀刻多个腔以形成多个硅纳米线；将所述半导体晶片分离成个别集成电路裸片；提供具有带有裸片附着垫的顶侧以及背侧的衬底；在维持集成电路裸片的顶表面与所述衬底的顶表面平行的同时将所述裸片的所述背侧定位于所述裸片附着垫上；以及通过所述硅纳米线使用在0.01MPa与1MPa之间的压力将所述集成电路裸片附着到所述衬底。
附图说明
图1是包含根据本发明的实施例的裸片安装集成电路的所关注区域的扩展视图的截面图。
图2到图4是根据本发明的实施例形成的晶片的制作中的步骤的图解说明。
图5A是Si上的Si纳米线阵列的扫描电子显微镜(SEM)照片。
图5B是硅晶片中的局部化区的金属辅助化学蚀刻的图解说明。
图6是根据本发明的实施例用于安装裸片的工艺的流程图。
在图式中，相似参考编号有时用以标示相似结构元件。还应了解，各图中的描绘为示意性且并非按比例绘制。
具体实施方式
参考附图来描述本发明。所述各图未按比例绘制且提供其仅为了图解说明本发明。下文参考用于图解说明的实例性应用来描述本发明的数个方面。应理解，陈述众多特定细节、关系及方法以提供对本发明的理解。然而，相关领域的技术人员将易于认识到，可在不使用特定细节中的一或多者的情况下或在使用其它方法的情况下来实践本发明。在其它实例中，未详细展示众所周知的结构或操作以避免使本发明模糊。本发明并不限于各动作或事件的所图解说明次序，因为一些动作可以不同次序发生及/或与其它动作或事件同时发生。此外，未必需要所有所图解说明的动作或事件来实施根据本发明的方法。
本发明一般来说涉及集成电路的封装。如背景技术章节中所解释，集成电路(IC)封装的测试及操作可使封装经受温度极限及其它应力。此类应力可导致脱层且使封装的热性能降级。本发明提供一种用于将裸片附着到引线框架表面的简单的具成本效益方法。
接下来参考图1，将描述根据本发明的一个方面的经改进封装结构设计。图1图解说明本发明的一个实施例的横截面图，其中裸片100借助硅纳米线固定到裸片附着垫101。所述纳米线的直径在10nm与1μm之间且长度为0.1μm到20μm，并将裸片的底部粘附到裸片附着垫的顶表面。裸片100的底表面包含多个硅纳米线。
通过向裸片/裸片附着垫组合施加压力而获得裸片垫101与裸片100的背面之间的接合。压力通常在0.01兆帕(MPa)到1MPa的范围中。另外，可借助基于胺、基于硫以及基于磷的硅烷偶联剂对硅纳米线进行改性以实质上增强硅纳米线与引线框架表面之间的粘附性。
上文所提及的裸片安装程序通过使用经粗糙化引线框架增加接合面积且可能形成机械联锁来改进粘附性，因此实现增强的封装性能和可靠性。
现在将参考图2-6来描述本发明的实施例。将描述与裸片100、硅纳米线、裸片附着垫101有关的区的特定实施例。
图2是具有顶表面201及背侧表面202的半导体晶片200的示范性样品。
图3图解说明金属纳米粒子向晶片200的背侧的施加。可以多种方法来实现施加。在此特定实施例中，通过用含有金属纳米粒子的油墨印刷晶片的背侧来施加粒子。金属纳米粒子可以是铂(Pt)、金(Au)或银(Ag)。接着使油墨干燥以使挥发性悬浮媒剂蒸发。
图4展示在利用用以形成纳米线的金属辅助化学蚀刻形成硅纳米线之后晶片的背侧。
图5B是金属辅助化学蚀刻工艺的示意性图解说明。在此特定实施例中，使用以下化学反应来实现所述蚀刻：
Si+2H2O2+6HF→H2SiF6+2H2O+H2
如图5B中的图解说明中所展示，其中金属催化剂与半导体界面分别形成阴极和阳极。通过金属催化剂，使从溶液向衬底的电荷注入持续且通过阴极和阳极反应来使电荷平衡。金属纳米粒子的反应的局部位点的存在界定蚀刻机制的选择性。
图5A展示使用金属辅助化学蚀刻工艺形成的硅纳米线的典型阵列的SEM照片。
接下来参考图6中所呈现的流程图600，将描述一种用于形成在裸片-裸片附着垫界面处具有良好电及热性能以及低脱层性的封装的适合方法。除非另有明确指示，否则下文所描述的操作可同时或以任何次序执行。可向流程图600添加或从其移除操作。
步骤601涉及提供含有集成电路裸片的半导体晶片，所述半导体晶片具有顶侧及底侧。
步骤602涉及利用印刷工艺在半导体晶片的背侧上沉积金属纳米粒子，其中所述印刷工艺在晶片上印刷含有金属纳米粒子的油墨。接着使油墨干燥以允许油墨中的悬浮媒剂蒸发，从而在晶片的背侧上留下金属纳米粒子。
步骤603涉及使用金属辅助化学蚀刻在晶片的背侧中蚀刻腔以在晶片的背侧中形成纳米线。在晶片的背侧中形成的腔的深度通常小于20μm。
步骤604涉及使用选自锯割、划线及折断或激光切割的方法来分离集成电路裸片。
步骤605涉及提供用于安装裸片的衬底。所述衬底可为引线框架、压层或陶瓷封装。
步骤606涉及借助集成电路裸片的背侧与衬底的顶表面之间的纳米线将所述背侧粘附到所述顶表面。通过称为范德华力的物理现象或在使用偶联剂的情况下通过化学相互作用来实现将集成电路裸片的背侧粘附到衬底的顶表面。范德华力为分子之间(或同一分子的各部分之间)的除由于共价键、氢键或者离子彼此或与中性分子或电荷分子的静电相互作用所致的力之外的吸引力或排斥力的总和。由于裸片的背侧具有多个硅纳米线，因此实现与衬底的紧密接触，这导致范德华相互作用。然而，与每一硅纳米线的相互作用为小的，这是因为硅纳米线的总数目为大的，总的范德华力大到足以引起裸片到衬底的极佳自粘附性。可通过借助硅烷偶联剂对硅酮纳米线表面的化学改性或通过具有衬底(例如经粗糙化引线框架)的粗糙顶表面接触区域来进一步实现与衬底的较好的粘附性。由于裸片与硅纳米线之间不存在界面，因此将有效地改进热性能。
尽管上文已描述本发明的各种实施例，但应理解，所述实施例仅以实例方式而非限制方式呈现。可根据本文中的揭示内容对所揭示实施例做出众多改变，此并不背离本发明的精神或范围。因此，本发明的广度及范围不应受上述实施例中的任一者限制。而是，本发明的范围应根据所附权利要求书及其等效内容来界定。

Claims (17)

1.一种半导体封装，其包括：
半导体裸片，其包含有源侧及相对的背侧，所述相对的背侧成形为多个纳米线，多个腔位于所述多个纳米线之间；以及
衬底，其具有第一侧，所述半导体裸片的所述相对的背侧附着到所述衬底的所述第一侧。
2.根据权利要求1所述的半导体封装，其中所述多个纳米线是含硅的。
3.根据权利要求1所述的半导体封装，其中所述半导体裸片通过所述多个纳米线被压合到所述衬底的所述第一侧。
4.根据权利要求1所述的半导体封装，其中所述多个纳米线中每一者的直径在10纳米与1微米之间。
5.根据权利要求1所述的半导体封装，其中所述多个纳米线中每一者的长度小于20μm。
6.根据权利要求1所述的半导体封装，其中所述衬底是压层。
7.根据权利要求1所述的半导体封装，所述多个纳米线包含基于胺的硅烷偶联剂、基于硫的硅烷偶联剂以及基于磷的硅烷偶联剂中的一者。
8.根据权利要求1所述的半导体封装，其中所述衬底为引线框架。
9.根据权利要求8所述的半导体封装，其中所述引线框架包含裸片附着垫，所述半导体裸片的所述相对的背侧附着到所述裸片附着垫。
10.根据权利要求8所述的半导体封装，其中所述引线框架包含与所述多个纳米线接触的经粗糙化表面。
11.根据权利要求1所述的半导体封装，其中所述半导体裸片的所述相对的背侧通过金属辅助化学蚀刻被成形为多个纳米线。
12.一种将半导体裸片附着到衬底的方法，其包括以下步骤：
提供含有集成电路的半导体晶片，其中所述晶片具有顶侧及背侧；
在所述晶片的所述背侧上印刷含有金属纳米粒子的油墨；
使用金属辅助蚀刻在所述晶片的所述背侧上蚀刻多个腔以形成多个硅纳米线；
将所述半导体晶片分离成个别集成电路裸片；
提供具有带有裸片附着垫的顶侧以及背侧的衬底；
在维持集成电路裸片的顶表面与所述衬底的顶表面平行的同时将所述裸片的所述背侧定位于所述裸片附着垫上；以及
通过所述硅纳米线使用在0.01兆帕MPa与1MPa之间的压力将所述集成电路裸片附着到所述衬底。
13.根据权利要求12所述的方法，其中所述金属纳米粒子选自铂Pt、金Au或银Ag的群组。
14.根据权利要求12所述的方法，其中通过选自锯割、划线以及折断或激光切割的方法来实现所述将所述半导体晶片分离成个别集成电路裸片。
15.根据权利要求12所述的方法，其中所述硅纳米线的直径在10纳米与1微米之间且长度小于20μm。
16.根据权利要求12所述的方法，其中所述衬底选自引线框架、压层或陶瓷封装的群组。
17.根据权利要求12所述的方法，其中通过范德华力实现所述将所述集成电路裸片附着到所述衬底。
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