CN104427743A - Multilayer printed circuit board and manufacturing method thereof - Google Patents
Multilayer printed circuit board and manufacturing method thereof Download PDFInfo
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- CN104427743A CN104427743A CN201310385179.2A CN201310385179A CN104427743A CN 104427743 A CN104427743 A CN 104427743A CN 201310385179 A CN201310385179 A CN 201310385179A CN 104427743 A CN104427743 A CN 104427743A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 239000012943 hotmelt Substances 0.000 claims abstract description 157
- 238000004880 explosion Methods 0.000 claims abstract description 109
- 238000000034 method Methods 0.000 claims abstract description 89
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 69
- 239000011889 copper foil Substances 0.000 claims abstract description 60
- 239000011162 core material Substances 0.000 claims description 113
- 238000005530 etching Methods 0.000 claims description 42
- 238000003825 pressing Methods 0.000 claims description 14
- 239000000155 melt Substances 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 claims description 4
- -1 described prepreg Substances 0.000 claims description 3
- 238000005485 electric heating Methods 0.000 claims description 3
- 238000007711 solidification Methods 0.000 claims description 3
- 230000008023 solidification Effects 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
- 230000009172 bursting Effects 0.000 description 24
- 230000007423 decrease Effects 0.000 description 14
- 229910052802 copper Inorganic materials 0.000 description 10
- 239000010949 copper Substances 0.000 description 10
- 239000003570 air Substances 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000003801 milling Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 238000003466 welding Methods 0.000 description 5
- 230000003247 decreasing effect Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
- 239000003513 alkali Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 239000007921 spray Substances 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 239000012080 ambient air Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 230000004807 localization Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/166—Alignment or registration; Control of registration
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/304—Protecting a component during manufacturing
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
本发明公开了一种多层印刷线路板及其制作方法，该多层印刷线路板包括在与所述介电层接触的线路图形区域设置有至少一个防爆槽，它贯穿与所述介电层接触的线路图形区域、所述内层芯板和所述铜箔；或者所述介电层和与该介电层接触的线路图形区域之间共同设置有至少一个防爆槽，它贯穿所述介电层、与所述介电层接触的线路图形区域、所述内层芯板和所述铜箔；或者所述介电层设置有至少一个防爆槽，它贯穿所述介电层、所述内层芯板和所述铜箔。热熔区域内的半固化片固化后形成的介电层中的水汽或后续工艺过程中接触的溶液能够通过该防爆槽挥发出来，减少了多层印刷线路板在高温烘烤时热熔区域附近爆板现象的发生，降低了制作过程中的爆板率。
The invention discloses a multilayer printed circuit board and a manufacturing method thereof. The multilayer printed circuit board includes at least one anti-explosion groove arranged in the circuit pattern area in contact with the dielectric layer, which penetrates through the dielectric layer At least one explosion-proof groove is jointly arranged between the contacting circuit pattern area, the inner core board and the copper foil; or the dielectric layer and the circuit pattern area in contact with the dielectric layer, which penetrate the dielectric layer The electrical layer, the circuit pattern area in contact with the dielectric layer, the inner core board and the copper foil; or the dielectric layer is provided with at least one explosion-proof slot, which runs through the dielectric layer, the inner core board and the copper foil. The water vapor in the dielectric layer formed after the prepreg in the hot-melt area is cured or the solution in contact with the subsequent process can be volatilized through the explosion-proof groove, which reduces the explosion of the multi-layer printed circuit board near the hot-melt area when it is baked at high temperature The occurrence of the phenomenon reduces the explosion rate in the production process.
Description
Technical field
The invention belongs to printed-board technology field, particularly a kind of multilayer printed circuit board and preparation method thereof.
Background technology
At present, the production process of PCB is, principle diagram design > internal layer circuit makes in > oxidation processes > pressing > punching > holes drilled through > outer-layer circuit making > circuit plating > skin etching > anti-welding process > bond pad surface process > sharp processing > electrical testing > and examines > packaging.
In the manufacturing process of multilayer printed circuit board, when carrying out pressing working procedure, owing to needing the wiring board of pressing at least two-layer, in order to prevent misplacing in bonding processes between layers, first need each layer core material to position.Current localization method is had and is nailed together by nail by core material, although the method is simple, too loaded down with trivial details in the process of nailing, and needs to follow closely a lot of nail, is not suitable for suitability for industrialized production.Method the most conventional is at present by internal layer circuit making, etches hot melt zone when inner line figure shifts; Be superimposed on by prepreg between adjacent two-layer core material, the prepreg that the prepreg between adjacent two layers core material is superimposed near hot melt zone melts, and the prepreg after fusing is filled in hot melt zone and forms dielectric layer.Two adjacent sandwich circuit boards couple together by this dielectric layer, serve the effect of location, and this melten gel technique is because level to level alignment degree is high and famous.But because melten gel technique is carried out under non-vacuum condition, thus prepreg fusing and be filled into the hot melt zone in formed dielectric layer in have a lot of cavity, these cavities in this step production process be very easy to absorption steam.Core material, prepreg, Copper Foil be superimposed under the condition of heating in vacuum after pressing, hot melt zone can be completely covered again.When needing high-temperature baking in the follow-up production process that wiring board makes, steam in dielectric layer in hot melt zone cannot effectively be discharged, be easy to occur plate bursting layering in hot melt zone, this layering can be spread and be extended to whole multilayer printed circuit board, thus causes scrapping of multilayer printed circuit board.
Summary of the invention
Technical problem to be solved by this invention is for above shortcomings in prior art, a kind of multilayer printed circuit board and preparation method thereof is provided, this multilayer printed circuit board can reduce the generation of plate bursting phenomenon near hot melt zone, reduces the plate bursting rate in multilayer printed circuit board manufacturing process.
The technical scheme that solution the technology of the present invention problem adopts is to provide a kind of multilayer printed circuit board, comprise: at least two-layer core material and Copper Foil, described core material superposes with described Copper Foil and arranges, described core material is provided with hot melt zone, the dielectric layer formed after being provided with prepreg solidification in described hot melt zone, described multilayer printed circuit board also comprises:
The line pattern region contacted with described dielectric layer is provided with at least one anti-explosion groove, and this anti-explosion groove runs through the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or be jointly provided with at least one anti-explosion groove between described dielectric layer and the line pattern region contacted with this dielectric layer, this anti-explosion groove runs through described dielectric layer, the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or described dielectric layer is provided with at least one anti-explosion groove, this anti-explosion groove runs through described dielectric layer, described core material and described Copper Foil.
Preferably, the outer-layer circuit graphics field part corresponding to described hot melt zone is provided with at least one etching and windows, this etching window for by making described outer-layer circuit figure time etch the opening formed.
Preferably, the hot melt zone of each layer core material is along the position consistency of each layer core material Direction of superposition.
Preferably, the cross section of described anti-explosion groove is any one in circle, rectangle, triangle.
Preferably, when the number of described anti-explosion groove is greater than one, described anti-explosion groove is uniformly distributed on described core material, and shape is consistent.
Preferably, when the number of described anti-explosion groove is greater than one, adopt matrix form arrangement.
Preferably, described anti-explosion groove is non-metallic hole.
Preferably, described hot melt zone is arranged on the logicalnot circuit graphics field of the edges of boards of described core material.
The present invention also provides a kind of manufacture method of multilayer circuit board, described multilayer printed circuit board comprises: at least two-layer core material and Copper Foil, the manufacture method of described multilayer circuit board comprises: on described core material, arrange hot melt zone, the prepreg that prepreg between described adjacent two layers core material is superimposed near described hot melt zone melts, and the prepreg after fusing is filled in described hot melt zone and forms dielectric layer; Process for pressing is carried out after more described core material, described prepreg, Copper Foil is superimposed; The manufacture method of described multilayer circuit board also comprises:
Arrange at least one anti-explosion groove in the line pattern region contacted with described dielectric layer, this anti-explosion groove runs through the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or jointly arrange at least one anti-explosion groove between described dielectric layer and the line pattern region contacted with this dielectric layer, this anti-explosion groove runs through described dielectric layer, the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or arrange at least one anti-explosion groove at described dielectric layer, this anti-explosion groove runs through described dielectric layer, described core material and described Copper Foil.
Preferably, the method for the prepreg fusing making the prepreg between described adjacent two layers core material be superimposed near described hot melt zone is electromagnetism sol method or electric heating sol method.
Multilayer printed circuit board provided by the invention is provided with the anti-explosion groove near hot melt zone, the solution contacted in steam in the rear dielectric layer formed of prepreg solidification or subsequent technique process is effectively evaporated by this anti-explosion groove, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone, reduces the plate bursting rate in multilayer printed circuit board manufacturing process.
Accompanying drawing explanation
Fig. 1 is the profile of the multilayer printed circuit board in the embodiment of the present invention 1;
Fig. 2 is the front view of the outer copper foil of multilayer printed circuit board in the embodiment of the present invention 1;
Fig. 3 is the front view of the outer copper foil of multilayer printed circuit board in the embodiment of the present invention 2;
Fig. 4 is the front view of the outer copper foil of multilayer printed circuit board in the embodiment of the present invention 3;
Fig. 5 is the front view of the core material of multilayer printed circuit board in the embodiment of the present invention 1.
In figure: 1-Copper Foil; 2-hot melt zone; 3-core material; 4-prepreg; 5-internal layer core; 6-anti-explosion groove; 7-etching is windowed; 8-line pattern part; 9-board edge is divided.
Embodiment
For making those skilled in the art understand technical scheme of the present invention better, below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
Embodiment 1
As Fig. 1, shown in Fig. 2, the present embodiment provides a kind of multilayer printed circuit board, comprise: at least two-layer core material 3 and Copper Foil 1, described core material 3 superposes with described Copper Foil 1 and arranges, described core material 3 is provided with hot melt zone 2, the dielectric layer formed after the prepreg 4 being filled into fusing in described hot melt zone 2 after melten gel technique solidifies is provided with in described hot melt zone 2, described multilayer printed circuit board also comprises: the line pattern region contacted with the dielectric layer in described hot melt zone 2 is provided with at least one anti-explosion groove 6, described anti-explosion groove 6 runs through the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1.Above-mentioned multilayer printed circuit board is after the dielectric layer by being solidify to form by melten gel technique is positioned, then core material 3, prepreg 4, Copper Foil 1 is superimposed after pressing under vacuo.
Described anti-explosion groove 6 runs through the line pattern region contacted with the dielectric layer in described hot melt zone 2, and the dielectric layer do not run through in described hot melt zone 2, the dielectric layer avoided in hot melt zone 2 contacts with air, thus the steam avoided in hot melt zone 2 inner-dielectric-ayer absorption air, and the contact of solution in the dielectric layer decreased in hot melt zone 2 and subsequent technique, decrease the probability of plate bursting near hot melt zone 2.
In pcb board manufacturing process, after the principle diagram design of multilayer printed circuit board, the detailed process making every layer of core material 3 comprises: the pre-treatment of core material 3, pad pasting, exposure, development, and etching, moves back the steps such as film.Exposing core material 3, develop, in the process that etches, etch hot melt zone 2 reserved in designed lines figure.As shown in Figure 1, the both sides of core material 3 are provided with hot melt zone 2, core material 3 forms internal layer core5 jointly with the hot melt zone 2 of its both sides.Preferably, the hot melt zone 2 of each layer core material 3 is along the position consistency of each layer core material 3 Direction of superposition.After inner line figure etching, carry out pressing working procedure, first need each layer core material 3 to position, the localization method between layers adopted in the present embodiment is: in making at internal layer circuit, etch hot melt zone 2 when inner line figure shifts; Be superimposed between adjacent two-layer core material 3 by prepreg 4, the prepreg 4 that the prepreg 4 between adjacent two layers core material 3 is superimposed near hot melt zone 2 melts, and the prepreg 4 after fusing is filled in hot melt zone 2 and forms dielectric layer.Two adjacent sandwich circuit boards couple together by this dielectric layer, serve the effect of location.Prepreg 4 is stacked between two internal layer core5 of arbitrary neighborhood, prepreg 4 is stacked between outermost internal layer core5 and Copper Foil 1, again by superimposed good core material 3, prepreg 4, Copper Foil 1 under the condition of heating in vacuum after pressing, hot melt zone 2 can be completely covered.After punching, holes drilled through, outer-layer circuit Etching, then increase a groove milling by the line pattern region that gong limit operation is contacting with the dielectric layer in described hot melt zone 2, this groove milling is anti-explosion groove 6.Certainly, also can by other processing technologys processing anti-explosion groove 6.The line pattern region contacted with the dielectric layer in described hot melt zone 2 by gong limit operation increases a groove milling, increase groove milling by the outermost layer part at whole multilayer printed circuit board by gong limit operation, described groove milling run through contact with the dielectric layer in described hot melt zone 2 line pattern region, described core material 3 and described Copper Foil 1, described groove milling at least runs through outermost core material 3 and time outer field core material 3 of multilayer printed circuit board.When the follow-up production process that wiring board makes needs high-temperature baking, the steam in the dielectric layer in hot melt zone 2 can effectively be discharged, thus avoids hot melt zone 2 and occur plate bursting layering, decreases the plate bursting probability of multilayer printed circuit board.After dielectric layer in described hot melt zone 2 is provided with at least one anti-explosion groove 6, then sink copper through boring, PTH()/PNP (plating), then carry out outer-layer circuit Graphic transitions.The etching process of outer-layer circuit figure is divided into acid etching and alkali etching two kinds:
Wherein, alkali etching needs the outer-layer circuit figure after to transfer to carry out electro-coppering tin, etch outer-layer circuit figure by etch process again while in the corresponding outer-layer circuit graphics field part with described hot melt zone 2, etch at least one corresponding with described hot melt zone 2 to etch and window 7, this etching windows 7 openings for being formed in etching process, and this opening is hollow.Anti-welding, technique such as spray tin, gong external form, electrical testing, packaging etc. is carried out again to multilayer printed circuit board.The whole technological process of this alkali etching is: melten gel → lamination → described gong limit operation (adding gong anti-explosion groove 6) → boring → PTH(sinks copper) or PNP(plating) → described outer-layer circuit Graphic transitions → electro-coppering tin → etching (etching window 7 and etching anti-explosion groove 6) → anti-welding → spray tin → gong external form → electrical testing → packaging.
Wherein, acid etching does not need the outer-layer circuit figure after to transfer to carry out electro-coppering tin, in the corresponding outer-layer circuit graphics field part with described hot melt zone 2 while directly etching outer-layer circuit figure by etch process, etch the etching corresponding with described hot melt zone 2 and window 7.Anti-welding, the technique such as gong external form, electrical testing, packaging is carried out again to multilayer printed circuit board.The whole technological process of this acid etching is: melten gel → lamination → described gong limit operation (adding gong anti-explosion groove 6) → boring → PTH/PNP → described outer-layer circuit Graphic transitions → described etching (etching window 7 and etching anti-explosion groove 6) → anti-welding → gong external form → electrical testing → packaging.
Preferably, described anti-explosion groove 6 is non-metallic hole.Anti-explosion groove 6 manufacturing procedure is before heavy copper or plating, so anti-explosion groove 6 inwall has copper after heavy copper or plating.If anti-explosion groove 6 inwall has copper to cover, the steam in the inner-dielectric-ayer of so described hot melt zone 2 is just unfavorable for volatilization, so the copper that anti-explosion groove 6 plates can etch away the copper of deposition in this anti-explosion groove 6 or the copper of plating when outer-layer circuit etching and processing.Preferably, the outer-layer circuit graphics field part corresponding to described hot melt zone 2 is provided with etching and windows 7, this etching is windowed 7 openings for being formed in etching process, and this opening is hollow.This step etching operation the outer-layer circuit graphics field part corresponding to described hot melt zone 2 on outer copper foil 1 is needed simultaneously etching window 7 the copper of position etch away, the etching etched corresponding to the outer-layer circuit graphics field part of described hot melt zone 2 windows 7.7 are windowed by partially-etched in outer-layer circuit graphics field, because core material 3 has osmosis for steam, so the steam etching that can arrive outer-layer circuit graphics field part corresponding by core material 3 in dielectric layer in the hot melt zone 2 arranged on multilayer printed circuit board core material 3 windows 7, thus evaporate into ambient air from multilayer printed circuit board inside and go.
Preferably, the hot melt zone 2 of each layer core material 3 is along the position consistency of each layer core material 3 Direction of superposition.Like this when the line pattern region contacted with the dielectric layer in described hot melt zone 2 arranges anti-explosion groove 6, when anti-explosion groove 6 runs through core material 3, anti-explosion groove 6 runs through the corresponding consistent line pattern region contacted with the dielectric layer in described hot melt zone 2 simultaneously up and down, makes the processing of anti-explosion groove 6 simple.An anti-explosion groove 6 running through whole multilayer printed circuit board can run through the line pattern region contacted with the dielectric layer in described hot melt zone 2 of this anti-explosion groove 6 position on each layer core material 3, and described anti-explosion groove 6 also runs through described core material 3 and described Copper Foil 1 simultaneously.
Preferably, described anti-explosion groove 6 runs through all core materials 3, makes the manufacture craft of follow-up multilayer printed circuit board simple to operation like this, when needing spray solution in subsequent technique, can get rid of the solution of anti-explosion groove 6 inwall in time.Certainly, when described multilayer circuit board is more than four layers, namely during two or more core material 3, described anti-explosion groove 6 only can run through outer field core material 3 and time outer field core material 3, when needing the solution getting rid of anti-explosion groove 6 inwall, anti-explosion groove 6 is inverted.
Preferably, the cross section of described anti-explosion groove 6 is any one in circle, rectangle, triangle.Because circle, rectangle, triangle belong to the modal shape being easy to process, so when arranging anti-explosion groove 6 on described multilayer printed circuit board, be easier to process circle, rectangle or the triangle through hole as cross section.
Preferably, when the number of described anti-explosion groove 6 is greater than one, described anti-explosion groove 6 is uniformly distributed on described core material 3, and shape is consistent.The distribution of this anti-explosion groove 6, is convenient to regularity processing.
Preferably, when the number of described anti-explosion groove 6 is greater than one, adopt matrix form arrangement.This arrangement mode according to the setting of hot melt zone 2, corresponding hot melt zone 2 be arranged to the surrounding that matrix form is arranged in multilayer printed circuit board, being uniformly distributed of anchor point can make the multilayer core material 3 of multilayer printed circuit board locate accurately.And the steam in dielectric layer in each hot melt zone 2 that this anti-explosion groove 6 can be made to penetrate corresponding to the anti-explosion groove 6 of hot melt zone 2 is evaporate in ambient air by this anti-explosion groove 6.
Preferably, described hot melt zone 2 is arranged on the logicalnot circuit graphics field of the edges of boards of described core material 3.As shown in Figure 5, multilayer printed circuit board comprises line pattern part 8 and board edge divides 9, and board edge divides 9 at circuit visuals 8 all around, and board edge divides 9 to be used for designing the through hole of various fixations and logicalnot circuit visuals 8.Hot melt zone 2 is arranged on the logicalnot circuit graphics field of the edges of boards of described core material 3, the prepreg 4 of fusing in hot melt zone in collosol craft process 2 then can be avoided to be solidified into the impact of dielectric layer for line pattern part 8, the plate bursting that causes near multilayer printed circuit board subsequent manufacturing processes dielectric layer also can be avoided for the impact of multilayer printed circuit board.
The line pattern region that the multilayer printed circuit board that the present embodiment provides is contacting with the dielectric layer in described hot melt zone 2 is provided with at least one anti-explosion groove 6, described anti-explosion groove 6 run through contact with the dielectric layer in described hot melt zone 2 line pattern region, described core material 3 and described Copper Foil 1; Prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduces the plate bursting rate in multilayer printed circuit board manufacturing process.
Embodiment 2
As shown in Figure 3, the present embodiment provides a kind of multilayer printed circuit board, comprise: at least two-layer core material 3 and Copper Foil 1, described core material 3 superposes with described Copper Foil 1 and arranges, described core material 3 is provided with hot melt zone 2, the dielectric layer formed after the prepreg 4 being filled into fusing in described hot melt zone 2 after melten gel technique solidifies is provided with in described hot melt zone 2, this multilayer printed circuit board is by described core material 3, described prepreg 4, carry out pressing after Copper Foil 1 is superimposed to form, described multilayer printed circuit board also comprises: be jointly provided with at least one anti-explosion groove 6 between the line pattern region that the dielectric layer in described hot melt zone 2 contacts with the dielectric layer in described hot melt zone 2, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1.
The line pattern region that described anti-explosion groove 6 runs through dielectric layer in described hot melt zone 2 simultaneously, contacts with the dielectric layer in described hot melt zone 2, greatly reduce the area that the dielectric layer in hot melt zone 2 contacts with air, thus decrease the area that hot melt zone 2 inner-dielectric-ayer absorbs the steam in air, and the area of solution in the dielectric layer decreased in hot melt zone 2 and subsequent technique, decrease the probability of plate bursting near hot melt zone 2.
Preferably, the outer-layer circuit graphics field part corresponding to described hot melt zone 2 is provided with etching and windows 7, this etching is windowed 7 openings for being formed in etching process, and this opening is hollow.
Preferably, described hot melt zone 2 is arranged on the logicalnot circuit graphics field of the edges of boards of described core material 3.
In the present embodiment, other structures of multilayer printed circuit board are all identical with embodiment 1, repeat no more here.
Between the line pattern region that the dielectric layer of multilayer printed circuit board in the present embodiment in described hot melt zone 2 contacts with the dielectric layer in described hot melt zone 2, at least one anti-explosion groove 6 is set jointly, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1, prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduce the plate bursting rate in multilayer printed circuit board manufacturing process.
Embodiment 3
As shown in Figure 4, the present embodiment provides a kind of multilayer printed circuit board, comprise: at least two-layer core material 3 and Copper Foil 1, described core material 3 superposes with described Copper Foil 1 and arranges, described core material 3 is provided with hot melt zone 2, the dielectric layer formed after the prepreg 4 being filled into fusing in described hot melt zone 2 after melten gel technique solidifies is provided with in described hot melt zone 2, this multilayer printed circuit board is by described core material 3, described prepreg 4, pressing is carried out after Copper Foil 1 is superimposed, described multilayer printed circuit board also comprises: the dielectric layer in described hot melt zone 2 is provided with at least one anti-explosion groove 6, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1.
Preferably, the outer-layer circuit graphics field part corresponding to described hot melt zone 2 is provided with etching and windows 7, this etching is windowed 7 openings for being formed in etching process, and this opening is hollow.
Preferably, described hot melt zone 2 is arranged on the logicalnot circuit graphics field of the edges of boards of described core material 3.
In the present embodiment, other structures of multilayer printed circuit board are all identical with embodiment 1, repeat no more here.
The dielectric layer of the multilayer printed circuit board that the present embodiment provides in described hot melt zone 2 is provided with at least one anti-explosion groove 6, and described anti-explosion groove 6 runs through dielectric layer, described core material 3 and described Copper Foil 1 in described hot melt zone 2; Prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduces the plate bursting rate in multilayer printed circuit board manufacturing process.
Embodiment 4
The present embodiment provides a kind of manufacture method of multilayer circuit board, described multilayer printed circuit board comprises at least two-layer core material 3 and Copper Foil 1, the manufacture method of described multilayer circuit board comprises: on described core material 3, arrange hot melt zone 2, the prepreg 4 that prepreg 4 between described adjacent two layers core material 3 is superimposed near described hot melt zone 2 melts, and the prepreg 4 after fusing is filled in described hot melt zone 2 and forms dielectric layer; Process for pressing is carried out after more described core material 3, described prepreg 4, Copper Foil 1 is superimposed; The manufacture method of described multilayer circuit board also comprises: the dielectric layer in described hot melt zone 2 arranges at least one anti-explosion groove 6, and described anti-explosion groove 6 runs through dielectric layer, described core material 3 and described Copper Foil 1 in described hot melt zone 2.
Preferably, after described anti-explosion groove 6 is set, the manufacture method of multilayer circuit board also comprises: carry out etching and window 7 corresponding to the outer-layer circuit graphics field part of described hot melt zone 2, the etching obtained window 7 for by when making described outer-layer circuit figure etch the opening formed.
Preferably, the method for prepreg 4 fusing making the prepreg 4 between described adjacent two layers core material 3 be superimposed near described hot melt zone 2 is electromagnetism sol method or electric heating sol method.
The manufacture method of the multilayer printed circuit board in the present embodiment arranges at least one anti-explosion groove 6 by the dielectric layer in described hot melt zone 2, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1, prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduce the plate bursting rate in multilayer printed circuit board manufacturing process.
Embodiment 5
The present embodiment provides a kind of manufacture method of multilayer circuit board, described multilayer printed circuit board comprises at least two-layer core material 3 and Copper Foil 1, the manufacture method of described multilayer circuit board comprises: on described core material 3, arrange hot melt zone 2, the prepreg 4 that prepreg 4 between described adjacent two layers core material 3 is superimposed near described hot melt zone 2 melts, and the prepreg 4 after fusing is filled in described hot melt zone 2 and forms dielectric layer; Process for pressing is carried out after more described core material 3, described prepreg 4, Copper Foil 1 is superimposed; The manufacture method of described multilayer circuit board also comprises: jointly arrange at least one anti-explosion groove 6 between the line pattern region that the dielectric layer in described hot melt zone 2 contacts with the dielectric layer in described hot melt zone 2, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1.
The line pattern region that described anti-explosion groove 6 runs through dielectric layer in described hot melt zone 2 simultaneously, contacts with the dielectric layer in described hot melt zone 2, greatly reduce the area that the dielectric layer in hot melt zone 2 contacts with air, thus decrease the area that hot melt zone 2 inner-dielectric-ayer absorbs the steam in air, and the area of the dielectric layer decreased in hot melt zone 2 solution in subsequent technique, decrease the probability of plate bursting near hot melt zone 2.
In the present embodiment, other manufacture methods of multilayer printed circuit board are all identical with embodiment 4, repeat no more here.
Between the line pattern region that the manufacture method of the multilayer printed circuit board in the present embodiment is contacted with the dielectric layer in described hot melt zone 2 by the dielectric layer in described hot melt zone 2, at least one anti-explosion groove 6 is set jointly, described anti-explosion groove 6 runs through the dielectric layer in described hot melt zone 2, the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1, prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduce the plate bursting rate in multilayer printed circuit board manufacturing process.
Embodiment 6
The present embodiment provides a kind of manufacture method of multilayer circuit board, described multilayer printed circuit board comprises at least two-layer core material 3 and Copper Foil 1, the manufacture method of described multilayer circuit board comprises: on described core material 3, arrange hot melt zone 2, the prepreg 4 that prepreg 4 between described adjacent two layers core material 3 is superimposed near described hot melt zone 2 melts, and the prepreg 4 after fusing is filled in described hot melt zone 2 and forms dielectric layer; Process for pressing is carried out after more described core material 3, described prepreg 4, Copper Foil 1 is superimposed; The manufacture method of described multilayer circuit board also comprises: arrange at least one anti-explosion groove 6 in the line pattern region contacted with the dielectric layer in described hot melt zone 2, described anti-explosion groove 6 run through contact with the dielectric layer in described hot melt zone 2 line pattern region, described core material 3 and described Copper Foil 1.
Described anti-explosion groove 6 runs through the line pattern region contacted with the dielectric layer in described hot melt zone 2, and the dielectric layer do not run through in described hot melt zone 2, the dielectric layer avoided in hot melt zone 2 contacts with air, thus the steam avoided in hot melt zone 2 inner-dielectric-ayer absorption air, and the contact of the dielectric layer decreased in hot melt zone 2 solution in subsequent technique, decrease the probability of plate bursting near hot melt zone 2.
In the present embodiment, other manufacture methods of multilayer printed circuit board are all identical with embodiment 4, repeat no more here.
The manufacture method of the multilayer printed circuit board in the present embodiment is by arranging at least one anti-explosion groove 6 in the line pattern region contacted with the dielectric layer in described hot melt zone 2, described anti-explosion groove 6 runs through the line pattern region contacted with the dielectric layer in described hot melt zone 2, described core material 3 and described Copper Foil 1, prepreg 4 in hot melt zone 2 is solidified the solution contacted in steam in the dielectric layer of rear formation or subsequent technique process and effectively can be evaporated by this anti-explosion groove 6, thus decrease multilayer printed circuit board when high-temperature baking, the generation of plate bursting phenomenon near hot melt zone 2, reduce the plate bursting rate in multilayer printed circuit board manufacturing process.
Be understandable that, the illustrative embodiments that above execution mode is only used to principle of the present invention is described and adopts, but the present invention is not limited thereto.For those skilled in the art, without departing from the spirit and substance in the present invention, can make various modification and improvement, these modification and improvement are also considered as protection scope of the present invention.
Claims (10)
1. a multilayer printed circuit board, comprise: at least two-layer core material and Copper Foil, described core material superposes with described Copper Foil and arranges, described core material is provided with hot melt zone, the dielectric layer formed after being provided with prepreg solidification in described hot melt zone, it is characterized in that, described multilayer printed circuit board also comprises:
The line pattern region contacted with described dielectric layer is provided with at least one anti-explosion groove, and this anti-explosion groove runs through the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or be jointly provided with at least one anti-explosion groove between described dielectric layer and the line pattern region contacted with this dielectric layer, this anti-explosion groove runs through described dielectric layer, the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or described dielectric layer is provided with at least one anti-explosion groove, this anti-explosion groove runs through described dielectric layer, described core material and described Copper Foil.
2. multilayer printed circuit board according to claim 1, it is characterized in that, outer-layer circuit graphics field part corresponding to described hot melt zone is provided with at least one etching and windows, this etching window for by making described outer-layer circuit figure time etch the opening formed.
3. multilayer printed circuit board according to claim 1 and 2, is characterized in that, the hot melt zone of each layer core material is along the position consistency of each layer core material Direction of superposition.
4. multilayer printed circuit board according to claim 1 and 2, is characterized in that, the cross section of described anti-explosion groove is any one in circle, rectangle, triangle.
5. multilayer printed circuit board according to claim 1 and 2, is characterized in that, when the number of described anti-explosion groove is greater than one, described anti-explosion groove is uniformly distributed on described core material, and shape is consistent.
6. multilayer printed circuit board according to claim 1 and 2, is characterized in that, when the number of described anti-explosion groove is greater than one, adopts matrix form arrangement.
7. multilayer printed circuit board according to claim 1 and 2, is characterized in that, described anti-explosion groove is non-metallic hole.
8. multilayer printed circuit board according to claim 1 and 2, is characterized in that, described hot melt zone is arranged on the logicalnot circuit graphics field of the edges of boards of described core material.
9. the manufacture method of a multilayer circuit board, described multilayer printed circuit board comprises: at least two-layer core material and Copper Foil, the manufacture method of described multilayer circuit board comprises: on described core material, arrange hot melt zone, the prepreg that prepreg between described adjacent two layers core material is superimposed near described hot melt zone melts, and the prepreg after fusing is filled in described hot melt zone and forms dielectric layer; Process for pressing is carried out after more described core material, described prepreg, Copper Foil is superimposed; It is characterized in that, the manufacture method of described multilayer circuit board also comprises:
Arrange at least one anti-explosion groove in the line pattern region contacted with described dielectric layer, this anti-explosion groove runs through the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or jointly arrange at least one anti-explosion groove between described dielectric layer and the line pattern region contacted with this dielectric layer, this anti-explosion groove runs through described dielectric layer, the line pattern region contacted with described dielectric layer, described core material and described Copper Foil;
Or arrange at least one anti-explosion groove at described dielectric layer, this anti-explosion groove runs through described dielectric layer, described core material and described Copper Foil.
10. the manufacture method of multilayer circuit board according to claim 9, it is characterized in that, the method for the prepreg fusing that the prepreg between described adjacent two layers core material is superimposed near described hot melt zone is electromagnetism sol method or electric heating sol method.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108323041A (en) * | 2018-03-15 | 2018-07-24 | 深圳崇达多层线路板有限公司 | A kind of edges of boards design method of multiple pressing HDI plates |
| CN109511211A (en) * | 2017-09-14 | 2019-03-22 | 深圳市博敏电子有限公司 | Prevent the blast resistance construction and its manufacture craft of edges of boards plate bursting |
| CN109587977A (en) * | 2018-12-14 | 2019-04-05 | 深圳崇达多层线路板有限公司 | A kind of improvement fusion undesirable method of position making sheet |
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| CN102036462A (en) * | 2010-08-31 | 2011-04-27 | 北大方正集团有限公司 | Printed circuit board and protection method thereof |
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| CN202998647U (en) * | 2012-12-24 | 2013-06-12 | 广东生益科技股份有限公司 | Improved PCB board to prevent copper foil from blistering |
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| CN201663751U (en) * | 2010-04-23 | 2010-12-01 | 汕头超声印制板（二厂）有限公司 | Multi-layer PCB structure |
| CN102036462A (en) * | 2010-08-31 | 2011-04-27 | 北大方正集团有限公司 | Printed circuit board and protection method thereof |
| CN202406395U (en) * | 2011-12-28 | 2012-08-29 | 胜宏科技（惠州）股份有限公司 | Auxiliary joint for fixing multilayer PCB inner core board |
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| CN108323041A (en) * | 2018-03-15 | 2018-07-24 | 深圳崇达多层线路板有限公司 | A kind of edges of boards design method of multiple pressing HDI plates |
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| CN104427743B (en) | 2018-06-15 |
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Effective date of registration: 20220617 Address after: 3007, Hengqin international financial center building, No. 58, Huajin street, Hengqin new area, Zhuhai, Guangdong 519031 Patentee after: New founder holdings development Co.,Ltd. Patentee after: ZHUHAI FOUNDER TECH. MULTILAYER PCB Co.,Ltd. Address before: 100871, Beijing, Haidian District, Cheng Fu Road, No. 298, Zhongguancun Fangzheng building, 5 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: ZHUHAI FOUNDER TECH. MULTILAYER PCB Co.,Ltd. |
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