CN104348336A - A full bridge secondary side rectification control circuit - Google Patents
A full bridge secondary side rectification control circuit Download PDFInfo
- Publication number
- CN104348336A CN104348336A CN201310344683.8A CN201310344683A CN104348336A CN 104348336 A CN104348336 A CN 104348336A CN 201310344683 A CN201310344683 A CN 201310344683A CN 104348336 A CN104348336 A CN 104348336A
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- switch triode
- control circuit
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- isl6752
- pwm
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- 230000001360 synchronised effect Effects 0.000 claims abstract description 15
- 239000003990 capacitor Substances 0.000 claims description 15
- 230000003321 amplification Effects 0.000 abstract description 2
- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 3
- 238000007599 discharging Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Rectifiers (AREA)
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Abstract
The invention provides a full-bridge secondary side rectification control circuit. The output pins OUTUL and OUTUR of a driving upper tube of an ISL6752 PWM (Pulse-Width Modulation) controller are taken as drives of synchronous rectification respectively; an upper left output control circuit and an upper right output control circuit which are identical to each other are provided; amplification of the outputs of the output pins OUTUL and OUTUR of the driving upper tube of the ISL6752 PWM controller is controlled through an idle load judging signal SDROFF. The circuit provided by the invention is simple, signal outputting of the output pins OUTUL and OUTUR of the driving upper tube of the ISL6752 PWM controller is controlled through the idle load judging signal SDROFF, and a deal zone control circuit is provided.
Description
Technical field
The present invention relates to field of switch power, particularly in a kind of PWM power supply, adopt ISL6752 as the full-bridge secondary rectifier control circuit of PWM controller.
Background technology
ISL6752 is a high performance alternative few number of pins ZVS full bridge PWM controller.ZVS (zero voltage switch) work that its obtains is by driving top bridge MOSFET following along being postponed modulation by resonant switch compared with the phase-shifting control method be comparatively familiar with at the following bridge MOSFET of duty ratio of fixing 50%, this process gives equal efficiency, and improve the performance of overcurrent and underloading by simple pin package less.The feature of ISL6752 controls to realize synchronous rectification, and a PWM complementary output External Control Voltage, this complementary output and relevant PWM export can be dynamically advanced or delayed in phase place.
ISL6752 adopts BICMOS technique, and frequency of oscillation can be adjusted to 2MHz, has adjustable soft start, accurate Dead Time and resonance Time delay control.In addition, multiple-pulse suppresses ensure that alternately output pulse is in the contingent pulse-skip problem of low duty ratio.Its inner equivalent block circuit is as shown in Fig. 1:
The power supply terminal of VDD IC, in order to preventing noise interference, to add a ceramic shunt capacitance distant.
RTD this be oscillator timing capacitor discharging current control end, connect a resistance determines discharging current size to the distant electric current flowing through this resistance of GND, discharging current is generally 20 times of these electric currents.The Dead Time of PWM depends on the electric discharge pulsewidth of timing capacitor.At the voltage normally 2V of RTD end.
CT oscillator timing capacitor terminal, and be connected to GND.It is charged by internal current source, and the TRD control end electric discharge by regulating.
VADJ is added to this input with the voltage of 0 ~ 5 V and realizes the delay of phase place with advanced.(between OUTLL and OUTLLN, between OUTLR and OUTLRN).And the phase relation between OUTUL and OUTUR between OUTUR and OUTLR still keeps, and regardless of the phase relation between OUTLL and OUTLR, OUTLLN and OUTLRN.
OUTUL/OUTUR these two exports the two-arm of drive axle, and each 50% duty ratio of its pulsewidth, its Dead Time is regulated by RTD.
OUTLL/OUTLR is two and exports control signals, and its pulsewidth can be modulated, and is operated in alternating state, and output is not interconvertible, and OUTLL controls left lower side MOS, and OUTLR controls limit, bottom right MOS, its control range be the highest can be equally wide with top MOS.
OUTLLN/OUTLRN is two output signals, and complementary with PWM low limit MOS signal, it is applicable to the synchronous rectification of secondary side, and phase relation is therebetween by the voltage control being added in ADJ.
OUT represents output above, and UL, UR, LL, LR represent upper left, upper right respectively, bottom left, bottom right.
When the topological structure of the full-bridge resonance that current use ISL6752 forms, because secondary uses full-wave rectification, so do not use the circuit of synchronous rectification of secondary, afterwards in order to promote the efficiency of complete machine so employ the circuit of synchronous rectification of secondary.But (OUTLLN, OUTLRN are for driving pin to find the synchronous rectification using the secondary of ISL6752 to carry to drive pin when using, exporting be square-wave pulse signal) parallel operation time there will be anti-filling phenomenon and damage the metal-oxide-semiconductor of former limit full-bridge, thus this circuit can only be used for the circuit of synchronous rectification of secondary without parallel operation, the application of circuit is restricted, for this defect we just to add some new circuit in addition perfect.
Summary of the invention
Of the present invention in order to the anti-filling phenomenon in resolution system power supply during module parallel operation, thus synchronous rectified power can be applied in the system power supply of system redundancy requirement, a kind of full-bridge secondary rectifier control circuit is provided.
The present invention for the technical scheme realizing its technical purpose and adopt is: a kind of full-bridge secondary rectifier control circuit, utilize ISL6752 PWM controller, by output pin OUTUL and OUTUR of pipe in the driving of ISL6752 PWM respectively as the driving of synchronous rectification, comprise upper left output control circuit and upper right output control circuit;
Described upper left output control circuit comprises switch triode Q7 and amplifier U5, electric capacity C31; In the driving of ISL6752 PWM the output pin OUTUL of pipe connect described switch triode Q7 collector electrode, unloaded judge that signal SDROFF connects the base stage of described switch triode Q7, the grounded emitter of described switch triode Q7, between the collector electrode that described electric capacity C31 is connected to described switch triode Q7 and ground, the collector electrode of described switch triode Q7 connects described amplifier, and the amplifying signal output SDRL of described amplifier U5 is described upper left output control signal;
Described upper right output control circuit comprises switch triode Q8 and amplifier U6, electric capacity C32; In the driving of ISL6752 PWM the output pin OUTUR of pipe connect described switch triode Q8 collector electrode, unloaded judge that signal SDROFF connects the base stage of described switch triode Q8, the grounded emitter of described switch triode Q8, between the collector electrode that described electric capacity C32 is connected to described switch triode Q8 and ground, the collector electrode of described switch triode Q8 connects described amplifier, and the amplifying signal output SDRN of described amplifier is described upper right output control signal.
Further, in above-mentioned full-bridge secondary rectifier control circuit: be provided with current-limiting resistance R123 between the output pin OUTUL of pipe and the collector electrode of described switch triode Q7 in the driving of described ISL6752 PWM; The driving of described ISL6752 PWM is provided with current-limiting resistance R124 between the output pin OUTUR of pipe and the collector electrode of described switch triode Q8.
Further, in above-mentioned full-bridge secondary rectifier control circuit: be provided with current-limiting resistance R35 and the first low-pass filter circuit between the base stage judging signal SDROFF and described switch triode Q7 in zero load; Current-limiting resistance R38 and the second low-pass filter circuit is provided with between the base stage judging signal SDROFF and described switch triode Q8 in zero load.
Further, in above-mentioned full-bridge secondary rectifier control circuit: the first described low-pass filter circuit comprises filter resistance R36 and filter capacitor C13, between the base stage that described filter resistance R36 and filter capacitor C13 is connected in described switch triode Q7 in parallel and ground; The second described low-pass filter circuit comprises filter resistance R39 and filter capacitor C14, between the base stage that described filter resistance R39 and filter capacitor C14 is connected in described switch triode Q8 in parallel and ground.
Circuit of the present invention is simple, and in the driving being judged signal SDROFF control ISL6752 PWM by zero load, whether the output pin OUTUL of pipe and OUTUR signal export, and have dead zone function circuit.
Below with reference to drawings and Examples, the present invention is described in detail.
Accompanying drawing explanation
Fig. 1 is the inner equivalent frame circuit diagram of ISL6752 of the present invention.
Fig. 2 is the embodiment of the present invention 1 circuit theory diagrams.
Embodiment
Embodiment 1, shown in Fig. 2, the present embodiment is a kind of full-bridge secondary rectifier control circuit, utilize ISL6752 PWM controller, by output pin OUTUL and OUTUR of pipe in the driving of ISL6752 PWM respectively as the driving of synchronous rectification, comprise upper left output control circuit and upper right output control circuit; Whether upper left output control circuit and upper right output control circuit are two identical circuit here, utilize output pin OUTUL and OUTUR of pipe in the unloaded driving judging signal SDROFF control ISL6752 PWM export and amplify respectively.
Upper left output control circuit comprises switch triode Q7 and amplifier U5, electric capacity C31; In the driving of ISL6752 PWM the output pin OUTUL of pipe connect switch triode Q7 collector electrode, unloaded judge the base stage of signal SDROFF switch triode Q7, the grounded emitter of switch triode Q7, between the collector electrode that electric capacity C31 is connected to described switch triode Q7 and ground, the collector electrode of switch triode Q7 connects described amplifier, and the amplifying signal output SDRL of amplifier U5 is upper left output control signal.The driving of ISL6752 PWM is provided with current-limiting resistance R123 between the output pin OUTUL of pipe and the collector electrode of switch triode Q7.Current-limiting resistance R35 and the first low-pass filter circuit is provided with between the base stage judging signal SDROFF and described switch triode Q7 in zero load.First low-pass filter circuit comprises filter resistance R36 and filter capacitor C13, between the base stage that filter resistance R36 and filter capacitor C13 is connected in switch triode Q7 in parallel and ground.
Equally, the present embodiment also has an identical upper right output control circuit to comprise switch triode Q8 and amplifier U6, electric capacity C32; In the driving of ISL6752 PWM the output pin OUTUR of pipe connect described switch triode Q8 collector electrode, unloaded judge that signal SDROFF connects the base stage of described switch triode Q8, the grounded emitter of described switch triode Q8, between the collector electrode that described electric capacity C32 is connected to described switch triode Q8 and ground, the collector electrode of described switch triode Q8 connects described amplifier, and the amplifying signal output SDRN of described amplifier is described upper left output control signal.The driving of ISL6752 PWM is provided with current-limiting resistance R124 between the output pin OUTUL of pipe and the collector electrode of switch triode Q8.Current-limiting resistance R38 and the second low-pass filter circuit is provided with between the base stage judging signal SDROFF and switch triode Q8 in zero load.Second low-pass filter circuit comprises filter resistance R39 and filter capacitor C14, between the base stage that described filter resistance R39 and filter capacitor C14 is connected in described switch triode Q8 in parallel and ground.
In the present embodiment, the first and second amplifiers are amplification chip U5, U6 is all IC(MIC4420YN), its Main Function is used to increase the driving force of driving PWM chip output, so SDRN, SDRL are respectively the drive singal that it exports after amplifier MIC4420YN.
The deficiency that the present embodiment faces in use procedure for this ISL6752, OUTUL, OUTUR of just using the driving of the upper pipe driven in full-bridge circuit instead remove the synchronous rectifier driving secondary, add that some protective circuits constitute a stable control circuit simultaneously.
Compared with prior art, because secondary has changed into by the synchronous rectification of metal-oxide-semiconductor rectification by the full-wave rectification of original diode rectification, so improve one percentage point on efficiency, solve the anti-filling problem of parallel operation when to have redundancy requirement in system power supply simultaneously.
But apply this circuit and can cause following two problems again, one be due to ISL6752 itself export (OUTUL and OUTUR) be fix 50% PWM duty ratio, so the common phenomenon of former limit metal-oxide-semiconductor can be caused, so so add dead zone function circuit in peripheral circuit in the present embodiment, as C32 and the C31 in Fig. 2 is just used to adjust the Dead Time that synchronous rectification drives; When another one problem is exactly zero load, secondary devices is opening state, therefore loss during zero load can be very large, embodiment adds the circuit of drive singal shutoff when zero load for this reason, it is the size control SDROFF signal by detecting secondary main circuit current, and this signal is provide after the size of current of amplifier by comparison operation output loop.When reaching certain electric current, SDROFF exports as high level thus reaches OUTUL, OUTUR drive singal turned off in Fig. 2, makes exporting the driving that have turned off secondary synchronous rectifier in for small area analysis situation.
Claims (4)
1. a full-bridge secondary rectifier control circuit, utilize ISL6752 PWM controller, it is characterized in that: by output pin OUTUL and OUTUR of pipe in the driving of ISL6752 PWM respectively as the driving of synchronous rectification, comprise upper left output control circuit and upper right output control circuit;
Described upper left output control circuit comprises switch triode Q7 and amplifier U5, electric capacity C31; In the driving of ISL6752 PWM the output pin OUTUL of pipe connect described switch triode Q7 collector electrode, unloaded judge that signal SDROFF connects the base stage of described switch triode Q7, the grounded emitter of described switch triode Q7, between the collector electrode that described electric capacity C31 is connected to described switch triode Q7 and ground, the collector electrode of described switch triode Q7 connects described amplifier, and the amplifying signal output SDRL of described amplifier U5 is described upper left output control signal;
Described upper right output control circuit comprises switch triode Q8 and amplifier U6, electric capacity C32; In the driving of ISL6752 PWM the output pin OUTUR of pipe connect described switch triode Q8 collector electrode, unloaded judge that signal SDROFF connects the base stage of described switch triode Q8, the grounded emitter of described switch triode Q8, between the collector electrode that described electric capacity C32 is connected to described switch triode Q8 and ground, the collector electrode of described switch triode Q8 connects described amplifier, and the amplifying signal output SDRN of described amplifier is described upper left output control signal.
2. full-bridge secondary rectifier control circuit according to claim 1, is characterized in that: in the driving of described ISL6752 PWM, be provided with current-limiting resistance R123 between the output pin OUTUL of pipe and the collector electrode of described switch triode Q7; The driving of described ISL6752 PWM is provided with current-limiting resistance R124 between the output pin OUTUR of pipe and the collector electrode of described switch triode Q8.
3. full-bridge secondary rectifier control circuit according to claim 2, is characterized in that: be provided with current-limiting resistance R35 and the first low-pass filter circuit between the base stage judging signal SDROFF and described switch triode Q7 in zero load; Current-limiting resistance R38 and the second low-pass filter circuit is provided with between the base stage judging signal SDROFF and described switch triode Q8 in zero load.
4. full-bridge secondary rectifier control circuit according to claim 3, it is characterized in that: the first described low-pass filter circuit comprises filter resistance R36 and filter capacitor C13, between the base stage that described filter resistance R36 and filter capacitor C13 is connected in described switch triode Q7 in parallel and ground; The second described low-pass filter circuit comprises filter resistance R39 and filter capacitor C14, between the base stage that described filter resistance R39 and filter capacitor C14 is connected in described switch triode Q8 in parallel and ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310344683.8A CN104348336B (en) | 2013-08-09 | 2013-08-09 | A kind of full-bridge pair side rectifier control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310344683.8A CN104348336B (en) | 2013-08-09 | 2013-08-09 | A kind of full-bridge pair side rectifier control circuit |
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| CN104348336A true CN104348336A (en) | 2015-02-11 |
| CN104348336B CN104348336B (en) | 2018-08-24 |
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| CN201310344683.8A Active CN104348336B (en) | 2013-08-09 | 2013-08-09 | A kind of full-bridge pair side rectifier control circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108512426A (en) * | 2017-02-27 | 2018-09-07 | 中兴通讯股份有限公司 | Switching Power Supply control method, device and switch power controller |
| CN109756133A (en) * | 2019-03-14 | 2019-05-14 | 青岛贝斯克电子有限公司 | One kind is with the variable PWM controller of load |
| CN109802582A (en) * | 2017-11-17 | 2019-05-24 | 无锡华润矽科微电子有限公司 | The circuit of synchronous rectification of wireless charging receiving terminal |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771335B (en) * | 2010-01-20 | 2012-09-19 | 北京新雷能科技股份有限公司 | Isolated drive circuit of DC converter |
| CN103066814B (en) * | 2011-10-24 | 2016-07-27 | 中兴通讯股份有限公司 | A kind of isolated drive circuit |
| CN103138541B (en) * | 2012-11-29 | 2015-05-06 | 深圳市航嘉驰源电气股份有限公司 | Drive transformer isolation self-adaptation drive circuit |
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2013
- 2013-08-09 CN CN201310344683.8A patent/CN104348336B/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108512426A (en) * | 2017-02-27 | 2018-09-07 | 中兴通讯股份有限公司 | Switching Power Supply control method, device and switch power controller |
| CN109802582A (en) * | 2017-11-17 | 2019-05-24 | 无锡华润矽科微电子有限公司 | The circuit of synchronous rectification of wireless charging receiving terminal |
| CN109756133A (en) * | 2019-03-14 | 2019-05-14 | 青岛贝斯克电子有限公司 | One kind is with the variable PWM controller of load |
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| CN104348336B (en) | 2018-08-24 |
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Address after: 518000 Floors 1-3 and 1-5 of Block A, Block B2, Jinweiyuan Industrial Plant, Longshan District, Pingshan New District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Gold Power Technology Co., Ltd. Address before: 518000 First, Second and Fifth Floors of B2 Workshop of Fengyeyuan Industrial Plant, Liuxian Second Road, Baocheng 68 District, Baoan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Gold Power Technology Co., Ltd. |
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