CN104332532A - Method for manufacturing high-luminous-efficiency light-emitting diode - Google Patents
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Abstract
本发明的目的在于,提供一种高光效发光二极管的制作方法。采用ITO作为LED透明导电薄膜。为减少ITO对LED量子阱的光吸收,将ITO薄膜的厚度降低至1200以下。将ITO薄膜分为两步制备:第一步,先蒸镀第一层ITO,厚度500以下,退火炉中高温退火,与P-GaN形成良好的欧姆接触;第二步,继续蒸镀第二层ITO,厚度700左右,此膜层不退火。采用本发明方法制备ITO薄膜与常规工艺制备的ITO薄膜相比,透过率未降低,但由于对量子阱的光吸收减少,所制备的LED大功率芯片的光功率比常规工艺增加5%以上,工作电压没有明显升高。因此,最终LED大功率芯片的光效提高了3%以上。The purpose of the present invention is to provide a method for manufacturing a high-efficiency light-emitting diode. ITO is used as a transparent conductive film for LEDs. In order to reduce the light absorption of ITO to the LED quantum well, the thickness of the ITO film is reduced to 1200 The ITO film is prepared in two steps: the first step is to evaporate the first layer of ITO with a thickness of 500 Next, high temperature annealing in the annealing furnace forms a good ohmic contact with P-GaN; the second step is to continue evaporating the second layer of ITO with a thickness of 700 The film layer is not annealed. Compared with the ITO film prepared by the conventional process, the transmittance of the ITO film prepared by the method of the present invention is not reduced, but due to the reduced light absorption of the quantum well, the light power of the prepared LED high-power chip is increased by more than 5% compared with the conventional process, and the operating voltage is not significantly increased. Therefore, the light efficiency of the LED high-power chip is finally improved by more than 3%.
Description
技术领域technical field
本发明涉及光电器件领域,具体涉及一种高光效发光二极管的制作方法。The invention relates to the field of photoelectric devices, in particular to a method for manufacturing a high-efficiency light-emitting diode.
背景技术Background technique
发光二极管(LED)是一种能将电信号转换成光信号的结型电致发光半导体器件。相比于其他传统光源,高性能LED具有光电转换效率高、寿命长、低损耗、无污染等显著优势,因此通过高光效LED做为绿色环保的照明光源来降低通用照明用电是节约能源、降低碳排放量的一个非常重要的选择。A light emitting diode (LED) is a junction electroluminescent semiconductor device that converts electrical signals into optical signals. Compared with other traditional light sources, high-performance LEDs have significant advantages such as high photoelectric conversion efficiency, long life, low loss, and no pollution. Therefore, it is energy-saving, A very important option to reduce carbon emissions.
通常在制备LED芯片的工艺过程采用氧化铟锡(ITO)作为P面透明电极。ITO的方块电阻较低,具有良好的电流扩展作用。ITO退火后与P-GaN可形成良好的欧姆接触,可将45mil大功率LED芯片工作电压降低至3.5v以下(350mA)。此外ITO导电薄膜本身透过率较高、折射率(n=1.9)介于GaN(n=2.5)与空气(n=1)之间,可以将GaN材料内部的光大部分提取出来。Usually, indium tin oxide (ITO) is used as the P-side transparent electrode in the process of preparing LED chips. ITO has a low sheet resistance and has good current spreading effect. After ITO is annealed, it can form a good ohmic contact with P-GaN, which can reduce the working voltage of 45mil high-power LED chip to below 3.5v (350mA). In addition, the ITO conductive film itself has a high transmittance and a refractive index (n=1.9) between GaN (n=2.5) and air (n=1), which can extract most of the light inside the GaN material.
ITO透明导电薄膜通常采用电子束蒸发的方法制备单周期厚度,退火前透过率为90%左右,方阻为30~40Ω/□。通常ITO薄膜要经过高温(500度)退火,才能与P-GaN形成良好的欧姆接触。但高温退火使ITO结晶程度增加,外围电子越稳定,薄膜的方阻也越高。此外,通常采用氮气气氛下的炉管对ITO进行退火,腔室中残留的氧会使ITO进一步补氧,也会使ITO方阻增加。因此退火后ITO透过率虽增加5%左右,但方阻可增加到40~60Ω/□。ITO transparent conductive film is usually prepared by electron beam evaporation in a single cycle thickness, the transmittance before annealing is about 90%, and the square resistance is 30-40Ω/□. Usually, the ITO film needs to be annealed at high temperature (500 degrees) to form a good ohmic contact with P-GaN. However, high-temperature annealing increases the crystallization degree of ITO, and the more stable the peripheral electrons are, the higher the square resistance of the film is. In addition, the ITO is usually annealed in a furnace tube under a nitrogen atmosphere, and the residual oxygen in the chamber will further supplement the ITO with oxygen, which will also increase the square resistance of the ITO. Therefore, although the transmittance of ITO increases by about 5% after annealing, the square resistance can increase to 40-60Ω/□.
若想获得高光效LED芯片,要求ITO透明导电薄膜的透过率更高、方阻更小、对LED量子阱发出的光吸收更小,因此LED芯片的亮度会进一步提高、工作电压进一步下降。如果降低ITO薄膜的厚度,由于ITO薄膜对LED量子阱的光吸收减少,LED芯片的亮度会增加,但由于ITO厚度的减小会使方阻大幅增加,再加之退火又使ITO方阻增加,最终LED芯片的电压也会增加,光效没有明显提高。If you want to obtain high-efficiency LED chips, it is required that the ITO transparent conductive film has higher transmittance, smaller square resistance, and smaller absorption of light emitted by LED quantum wells. Therefore, the brightness of LED chips will be further improved and the operating voltage will be further reduced. If the thickness of the ITO film is reduced, the brightness of the LED chip will increase due to the reduction of the light absorption of the ITO film to the LED quantum well, but the reduction in the thickness of the ITO will greatly increase the square resistance, and the annealing will increase the square resistance of the ITO. In the end, the voltage of the LED chip will also increase, and the light efficiency will not be significantly improved.
发明内容Contents of the invention
本发明的目的在于,提供一种高光效发光二极管的制作方法。采用ITO作为LED透明导电薄膜。为减少ITO对LED量子阱的光吸收、提高LED亮度,将ITO薄膜的厚度降低至以下。由于ITO薄膜厚度减少以及退火工艺使ITO方阻增加,最终会使LED电压增加,为减轻此影响,本发明提出将ITO薄膜分为两步制备:第一步,先蒸镀第一层ITO,厚度以下,退火炉中高温退火,与P-GaN形成良好的欧姆接触,第二步,在退火后的第一层ITO上继续蒸镀第二层ITO,厚度左右,此膜层不退火,防止因退火结晶化和补氧导致的LED方阻增加、工作电压增加。The object of the present invention is to provide a method for manufacturing a high-efficiency light-emitting diode. ITO is used as the LED transparent conductive film. In order to reduce the light absorption of ITO to the LED quantum well and improve the brightness of the LED, the thickness of the ITO film is reduced to the following. Due to the reduction of the thickness of the ITO film and the increase of the square resistance of the ITO due to the annealing process, the voltage of the LED will eventually increase. In order to alleviate this effect, the present invention proposes that the ITO film is prepared in two steps: the first step is to evaporate the first layer of ITO, thickness Next, high-temperature annealing in the annealing furnace forms a good ohmic contact with P-GaN. In the second step, continue to vapor-deposit the second layer of ITO on the first layer of ITO after annealing, with a thickness of Left and right, this film layer is not annealed to prevent the increase of LED square resistance and operating voltage due to annealing crystallization and oxygen supplementation.
采用本发明方法制备ITO薄膜与常规工艺制备的ITO薄膜相比,透过率没有明显降低,但由于对量子阱的光吸收减少,所制备的LED大功率芯片的光功率比常规工艺增加5%以上。采用本发明方法制备ITO薄膜与常规工艺制备的ITO薄膜相比,方阻没有明显增加,欧姆接触良好,所制备的LED大功率芯片的工作电压比常规工艺没有明显升高。因此,最终LED大功率芯片的光效提高了3%以上。Compared with the ITO film prepared by the conventional process, the transmittance of the ITO film prepared by the method of the present invention is not significantly reduced, but due to the reduced light absorption of the quantum well, the optical power of the prepared LED high-power chip is increased by 5% compared with the conventional process. above. Compared with the ITO film prepared by the conventional process, the square resistance of the ITO film prepared by the method of the present invention is not significantly increased, the ohmic contact is good, and the working voltage of the prepared LED high-power chip is not significantly increased compared with the conventional process. Therefore, the light efficiency of the final LED high-power chip is increased by more than 3%.
附图说明Description of drawings
为进一步说明本发明的具体技术内容,以下结合实施例和附图详细说明如后,其中:In order to further illustrate the specific technical content of the present invention, below in conjunction with embodiment and accompanying drawing detailed description as follows, wherein:
图1是常规工艺LED的结构示意图。Fig. 1 is a schematic structural diagram of a conventional process LED.
图2是本发明工艺LED结构示意图。Fig. 2 is a schematic diagram of the LED structure of the process of the present invention.
图3是常规工艺和本发明工艺l-V曲线对比图。其中常规工艺ITO厚度为经500度高温退火。本发明工艺ITO总厚度前经过500度高温退火,后未经退火。采用本发明工艺的LED45mil大功率芯片在350mA工作电流下的工作电压比常规工艺LED仅高0.06V。Fig. 3 is conventional process and process 1V curve comparison figure of the present invention. The conventional process ITO thickness is Annealed at a high temperature of 500 degrees. The total thickness of ITO in the process of the present invention forward After annealing at a high temperature of 500 degrees, after Not annealed. The operating voltage of the LED45mil high-power chip adopting the technology of the invention is only 0.06V higher than that of the conventional technology LED under the working current of 350mA.
图4是常规工艺和本发明工艺P-I曲线对比图。其中常规工艺ITO厚度为经500度高温退火。本发明工艺ITO总厚度前经过500度高温退火,后未经退火。采用本发明工艺的LED45mil大功率芯片在350mA工作电流下的光功率比常规工艺LED高6%。Fig. 4 is a comparison chart of the PI curves of the conventional process and the process of the present invention. The conventional process ITO thickness is Annealed at a high temperature of 500 degrees. The total thickness of ITO in the process of the present invention forward After annealing at a high temperature of 500 degrees, after Not annealed. The optical power of the LED45mil high-power chip adopting the technology of the invention is 6% higher than that of the conventional technology LED under the working current of 350mA.
具体实施方式Detailed ways
请参阅图2(本发明LED结构示意图)所示,本发明提供一种高光效发光二极管的制作方法,包括如下步骤:Please refer to Fig. 2 (schematic diagram of LED structure of the present invention), the present invention provides a method for manufacturing a high-efficiency light-emitting diode, comprising the following steps:
步骤1:采用金属有机化学气相沉积(MOCVD)的方法,在蓝宝石衬底1上依次生长1μm低温GaN缓冲层2、1μm不掺杂GaN层3、3μmN-GaN层4、150nm多量子阱发光层5和300nmP-GaN层6,形成GaN外延片;Step 1: Using metal-organic chemical vapor deposition (MOCVD), sequentially grow a 1 μm low-temperature GaN buffer layer 2, a 1 μm undoped GaN layer 3, a 3 μm N-GaN layer 4, and a 150 nm multi-quantum well light-emitting layer on a sapphire substrate 1 5 and 300nm P-GaN layer 6 to form a GaN epitaxial wafer;
步骤2:将GaN外延片进行光刻图形制备,选用AZ4620光刻胶作为掩膜,对GaN外延片的一侧进行ICP刻蚀,去除一侧的P-GaN、量子阱以及部分N-GaN,形成台面41,该台面41的刻蚀深度700nm~1500nm。使用Cl2、BCl3、Ar2作为刻蚀气体,其中Cl2流量为30-100sccm,BCl3流量为10-20sccm,Ar2流量为15-25sccm,刻蚀功率为400-700W,射频功率为100-200W;刻蚀时间为10-15min。Step 2: Prepare the GaN epitaxial wafer by photolithographic patterning, use AZ4620 photoresist as a mask, and perform ICP etching on one side of the GaN epitaxial wafer to remove P-GaN, quantum wells and part of N-GaN on one side, A mesa 41 is formed, and the etching depth of the mesa 41 is 700nm˜1500nm. Use Cl 2 , BCl 3 , Ar 2 as etching gas, wherein the flow rate of Cl 2 is 30-100 sccm, the flow rate of BCl 3 is 10-20 sccm, the flow rate of Ar 2 is 15-25 sccm, the etching power is 400-700W, and the RF power is 100-200W; etching time is 10-15min.
步骤3:在GaN外延片的上表面使用电子束蒸发的方法蒸镀第一层ITO薄膜7,厚度腔室温度210度,氧气流量8sccm。从电子束蒸发台中取出基片,将基片放入退火炉中进行退火。退火气氛为氮气,温度500度,时间20分钟。第一层ITO薄膜7通过高温退火与P-GaN形成良好的欧姆接触,降低了接触电压;Step 3: Evaporate the first layer of ITO film 7 on the upper surface of the GaN epitaxial wafer by electron beam evaporation, with a thickness of The chamber temperature is 210 degrees, and the oxygen flow rate is 8 sccm. Take out the substrate from the electron beam evaporation station, put the substrate into the annealing furnace for annealing. The annealing atmosphere is nitrogen, the temperature is 500 degrees, and the time is 20 minutes. The first layer of ITO film 7 forms a good ohmic contact with P-GaN through high temperature annealing, which reduces the contact voltage;
步骤4:将退火后的基片再次放入电子束蒸发台蒸镀第二层ITO薄膜8,厚度腔室温度210度,氧气流量8sccm。第二层ITO薄膜8无需退火,避免高温退火带来的结晶化和补氧导致的LED方阻增加、最终使LED工作电压增加;Step 4: put the annealed substrate into the electron beam evaporation table to evaporate the second layer of ITO film 8, the thickness The chamber temperature is 210 degrees, and the oxygen flow rate is 8 sccm. The second layer of ITO thin film 8 does not need to be annealed, avoiding the crystallization caused by high-temperature annealing and the increase of LED square resistance caused by oxygen supplementation, which will eventually increase the LED operating voltage;
步骤5:选用AZ6130光刻胶和小王水(3HCl:HNO3)光刻腐蚀出ITO图形,去除P-GaN6和多量子阱5侧壁上的ITO薄膜7和8,去除台面41上的ITO薄膜7和8,在P型台面上形成ITO透明电极。Step 5: Select AZ6130 photoresist and aqua regia (3HCl: HNO 3 ) to etch out the ITO pattern by photolithography, remove the ITO films 7 and 8 on the side walls of the P-GaN6 and the multiple quantum wells 5, and remove the ITO on the mesa 41 Thin films 7 and 8 form ITO transparent electrodes on the P-type mesa.
步骤6:在P-GaN层6、ITO层8和N-GaN层41上选用负型光刻胶L-300光刻P、N电极,采用电子束蒸发法蒸镀金属CrPtAu剥离后形成P电极9和N电极10。P、N电极金属的厚度较厚,便于封装芯片时打线测试;Step 6: On the P-GaN layer 6, the ITO layer 8 and the N-GaN layer 41, select the negative photoresist L-300 to photoetch the P and N electrodes, and use the electron beam evaporation method to evaporate metal CrPtAu The P electrode 9 and the N electrode 10 are formed after peeling. The thickness of the P and N electrode metals is relatively thick, which is convenient for wiring testing when packaging chips;
步骤7:将片子的蓝宝石衬底减薄至150um,划裂成单独芯片,进行器件的V-I特性测试和P-I特性测试。Step 7: Thin the sapphire substrate of the chip to 150um, split it into individual chips, and conduct the V-I characteristic test and P-I characteristic test of the device.
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