CN104268021A - Graphic processor based RS (Reed-Solomon) decoding method - Google Patents

Abstract

The invention discloses a graphic processor based RS (Reed-Solomon) decoding method. The defects that the CPU (Central Processing Unit) is low in processing speed and is not suitable for real-time transmission of large-scale data in the prior art are overcome. The implementation steps comprise step 1, initializing a computer; step 2, inputting image code stream data; step 3, reading the image code stream data; step 4, obtaining output image code stream data; step 5, performing parallel decoding; step 6, obtaining decoding image code stream data; step 7, outputting the decoding image code stream data. According to the graphic processor based RS decoding method, the correctness of the data transmission can be ensured, the decoding speed is high, and the graphic processor based RS decoding method is suitable for high-speed error correction and decoding in the process of the real-time transmission of the large-scale data.

Description

RS Decoding Method Based on Graphics Processor

technical field

The invention belongs to the technical field of image processing, and further relates to a graphics processor-based Reed-Solomon (Reed-Solomon, RS) decoding method in the technical field of channel error correction decoding. The invention can be used for rapid error correction and decoding in the process of real-time channel transmission of large-scale data.

Background technique

In a communication system, any signal needs to be transmitted through a channel. During the transmission process of the digital signal in the channel, it is often subject to various interferences, so that after the data stream is transmitted through the channel, it will generate bit errors when it arrives at the receiving end. Therefore, in order to ensure the correctness and reliability of data transmission, error control methods are usually used to deal with transmission errors in information. RS code is such a code, because it can not only correct random errors, but also correct burst errors, so it is widely used in communication systems, broadcasting systems and data storage systems.

However, with the development of the information age and the advent of the big data era, the traditional way of processing data can no longer meet the needs of the times. How to efficiently and quickly process large amounts of data has become a problem that various research institutions are committed to solving. . In today's information society, not only the requirements for the reliability of data transmission are constantly increasing, but also how to quickly transmit correct data has gradually attracted people's attention. Therefore, on the basis of improving the reliability of information transmission through error-correcting code technology, we focus on how to improve the error-correcting speed of error-correcting codes, thus the idea of using GPU high-performance computing to improve the speed of RS encoding and decoding was born. GPU high-performance computing is currently a hot research field. Through the combination of GPU parallel architecture and CPU, it is a computing solution that can effectively reduce computing time and improve computing efficiency.

The patent application of Beijing University of Posts and Telecommunications "An RS decoding device and method for 10GEPON" (publication number: CN102546109A, application number: 2011104487713, application date: December 28, 2011) discloses a RS for 10GEPON The method of decoding. The method is mainly divided into syndrome calculation, key equation solving, error location search and error correction. First, the syndrome calculation is performed on the received data, and then the key equation is solved to obtain the error position polynomial σ(x) and the error value polynomial ω(x), and then the error position polynomial is used to search for money to determine the error position polynomial and the error value polynomial is used to perform Error values are calculated and corrected. Among them, solving the key equation is difficult, and the commonly used algorithms include Berlekamp-Massey Algorithm (BM), Modified Euclidean Algorithm (ME) and frequency decoding algorithm. Both the BM algorithm and the ME algorithm are time-domain decoding algorithms, and their real-time performance is better than that of frequency-domain decoding algorithms. Compared with the BM algorithm, the ME algorithm has the advantages of regular operation structure, small critical path delay, and easy realization of pulsating structure, etc. It is considered to be an ideal algorithm for RS decoding in high-speed data communication. The method can coordinate RS decoding and data rate, and realize multi-byte parallel processing. But, the deficiency that this method exists is, one, block code requires accurate frame synchronization, because this method block code transmits by frame (group), only after whole group of codewords all receive and finish, just can start to decode, will like this It brings a certain delay to the system. If it is a large block code, the delay will be relatively large; second, when accessing data, the traditional data access method is used, and the speed is very slow when accessing large-scale data; Its three, when realizing RS decoding, adopt serial processing, in the design of this serial decoding, because a large number of input codewords are decoded in order and partly repeated operation, do not make full use of central processing unit CPU, caused Waste of resources, low efficiency, slow input data, long calculation time, low calculation efficiency, especially large-scale data cannot be processed efficiently and quickly.

The patent application "A high-speed parallel RS decoding method for space communication" (publication number: CN101969358B, application number: 2010102978843, application date: September 29, 2010) of Aerospace Star Technology Co., Ltd. discloses a method for High-speed parallel RS decoding method for space communication. This method uses ping-pong operation in the process of de-interleaving and interleaving to complete the filling and acquisition of input data in FIFO, and uses multi-channel parallel pipeline in the decoding process. This composite structure ensures the maximum performance of the system. And realize the minimization of resources, and can adapt to any interleaving depth from 1 to 8; by taking measures such as multi-channel parallel RS decoding, optimizing the realization logic of the finite field multiplier, etc., the decoding rate is greatly improved, and can be directly applied Based on the high code rate remote sensing satellite ground receiving system, by adopting a modular design, the parallelism can be further increased to improve performance when needed. However, the disadvantages of this method are: firstly, different kernel functions cannot run simultaneously on the GPU, and the performance of parallel computing is not high; secondly, the GPU cannot be scheduled without the CPU to create new jobs; thirdly, in large-scale The cluster cannot perform memory error checking and repair ECC; Fourth, the resource utilization rate of the graphics processor GPU is not high.

Contents of the invention

The object of the present invention is to provide a RS decoding method based on a graphics processor GPU to overcome the above-mentioned deficiencies in the prior art. The method can ensure the stability and reliability of data in channel transmission, and improves the efficiency of large-scale data in real-time transmission.

The specific idea of realizing the purpose of the present invention is to first flip, parity-separate, and transpose the input code stream data, and then perform parallel decoding on the input code stream data, and then perform inverse transposition, parity-merging, and flipping on the decoded code stream, Get the final decoded code stream.

The concrete steps of the realization of the present invention are as follows:

(1) Initialize the computer:

(1a) connecting a plurality of graphics processing units (GPUs) to a computer;

(1b) the computer allocates the global memory in the graphics processing unit GPU;

(2) Input image stream data:

Inputting the Reed-Solomon code RS image stream data to be decoded into the computer memory;

(3) Read image stream data:

(3a) Using asynchronous transmission mode, read the Reed-Solomon code RS image code stream data to be decoded from the computer memory;

(3b) adopting asynchronous transmission mode, storing the read Reed-Solomon code RS image code stream data to be decoded in the global memory;

(4) Obtain the output image stream data:

(4a) Adopt the method of merging memory access to access the global memory, and divide the Reed-Solomon code RS image code stream data in the global memory into multiple groups according to each 255-bit group, and each two groups of image codes The stream data is reversed once in parallel processing to obtain the reversed image code stream data;

(4b) Separating odd and even bits of the flipped image code stream data to obtain parity-separated image code stream data;

(4c) the image code stream data separated by parity, according to the order of the even number bit in front and the odd number bit in the back, to form the output image code stream data;

(5) Parallel decoding:

(5a) Transpose the output image code stream data to obtain the transposed Reed-Solomon code RS image code stream data, and use the combined memory access method to convert the transposed Reed-Solomon code The RS image code stream data is stored in the shared memory by means of asynchronous transmission;

(5b) Transmit the transposed Reed-Solomon code RS image code stream data from the shared memory to the global memory by means of asynchronous transmission, and start the graphics processor GPU decoding program to decode;

(5c) Adopt the method that one thread block processes the code stream of an image, and multiple thread blocks process the code stream of multiple images, analyze the header data of the transposed Reed-Solomon code RS image code stream data , to obtain the header data of the parsed image stream data;

(5d) Using a thread block to process an image and multiple thread blocks to process multiple images, analyze the transposed Reed-Solomon code RS image code stream data packet header, and obtain the parsed image code stream data packet header data;

(5e) multiple threads are started inside the thread block, and each thread reassembles the decoded image code blocks of the same layer in the video memory according to the sequence to obtain the decoded image code stream data;

(6) Obtain the decoded image stream data:

(6a) Perform reverse transposition on the decoded image code stream data to obtain reverse transpose decoded image code stream data, and store the reverse transpose decoded image code stream data in a shared memory in an asynchronous transmission manner;

(6b) Parity-combining the decoded image code stream data after reverse transposition, and storing the obtained decoded image code stream data stored in reverse order in the global memory by means of asynchronous transmission;

(6c) The global memory is accessed by means of combined memory access, and the decoded image code stream data stored in the reverse order of parity and even in the global memory is divided into multiple groups according to each 255-bit group, and each two groups of image code stream data Flip once according to the parallel processing method to obtain the flipped decoded image code stream data;

(6d) store the decoding result in the internal global memory of the graphics processing unit GPU;

(7) output decoded image stream data:

The decoded image code stream data is read out from the internal global memory of the graphics processing unit GPU and output to the computer memory by means of combined access.

Compared with the prior art, the present invention has the following advantages:

First, the present invention proposes to connect a plurality of graphics processors GPUs with computers, and the computer connected with graphics processors GPUs is used as a hardware implementation platform, which overcomes the slow processing speed of the computer central processing unit CPU in the prior art , the unified computing device architecture CUDA is applied to the graphics processor GPU, and the two latest GPU hardware architectures of Fermi and Kepler are used to overcome the low performance of parallel computing in the prior art, and the graphics processor GPU cannot be performed without the central processing unit CPU. Disadvantages of scheduling to create new jobs, inability to perform memory error checking and repairing ECC, and low utilization of GPU resources. This makes the present invention more efficient when performing parallel decoding on large-scale data, and under the action of dynamic parallelism, the graphics processor GPU can use a unique acceleration hardware path to establish a new Work, and schedule the work and synchronize the results. Further, it can also perform memory error checking and repair ECC in a large cluster. In addition, different kernel functions in the same program can run on the graphics processor GPU at the same time, which can make The resources of the graphics processing unit GPU are used more effectively.

Second, the present invention introduces the method of combined memory access and memory access, which overcomes the shortcomings of slow and inefficient data access in the memory in the prior art, so that when the present invention decodes large-scale image code stream data, the video memory The performance is optimized, and the data access speed is faster.

Third, the present invention introduces the data transmission mode of asynchronous transmission, which overcomes the shortcoming of the slow data transmission mode caused by the accurate frame synchronization processing of the block code in the prior art, so that the present invention improves the transmission bandwidth during data transmission, and then parallel Efficiency is improved.

Fourth, the present invention introduces a calculation method for parallel decoding processing, which overcomes the shortcomings of serial processing that consumes a lot of time and a large amount of calculation in the prior art, so that when the present invention transmits a large amount of data, it solves the problems in various traditional engineering applications. The problem of medium and low efficiency improves the efficiency of decoding and the utilization of resources.

Description of drawings

Fig. 1 is a flow chart of the present invention.

detailed description

The present invention will be further described below in conjunction with accompanying drawing 1.

Step 1, initialize the computer.

Connect multiple graphics processors GPUs to the computer, and the number of graphics processors GPUs is arbitrarily selected within the range of [4, 10]. Graphics processor GPU refers to the application of two latest graphics processor GPU hardware architectures, Fermi and Kepler. .

The computer allocates shared memory and global memory space for the graphics processor GPU to store data for parallel computing of the graphics processor GPU, including the adjoint matrix and error output of the input code stream, output code stream, and each kernel function The memory space for the positional polynomial matrix is allocated.

Step 2, input image code stream data.

Input the Reed-Solomon code RS image code stream data to be decoded into the computer memory.

Step 3, read image code stream data.

Using asynchronous transmission, read the code stream data of the Reed-Solomon code RS image to be decoded from the computer memory, and use the asynchronous transmission method to read the read Reed-Solomon code RS image to be decoded Codestream data is stored in global memory.

Step 4, obtaining output image code stream data.

The method of combined memory access is used to access the global memory, and the image code stream data is copied from the global memory to the shared memory. The reason why the shared memory is used here is because in the GPU architecture of the graphics processor, the number of registers that can be used by each thread The number is limited and cannot provide enough space to store the array, so we put the constant data into the shared memory. The speed of shared memory and registration is much faster than that of the global memory; the method of combined memory access means that in the graphics processor GPU In the same half-warp, threads in the same half-warp access the data at the same position of each group of image code stream data in the shared memory each time. Then copy the image code stream data from the shared memory to the global memory, and divide the Reed-Solomon code RS image code stream data in the global memory into multiple groups according to each 255-bit group. The image code stream data is flipped once according to parallel processing, and after the flip, the image code stream data stored in reverse order is obtained, and one image is executed according to each thread block, and each thread executes an integer data to realize parallel processing.

The odd bits and even bits of the flipped image code stream data are separated to obtain image code stream data with odd-even separation.

The separated image code stream data is composed of an output code stream in the order of even bits first and odd bits later.

Step 5, parallel decoding.

In the design of the parallel algorithm, a two-layer parallel model method with coarse-grained and fine-grained parallelism is adopted. In the process of parallel access to the fine-grained, the output image code stream data is transposed to obtain the transposed Reed-Sort Romon code RS image code stream data, the data in the same position of each group of code words of the transposed image code stream data is continuous, so that the conditions for combined memory access can be met, and the transposed The Reed-Solomon code RS image code stream data is stored in the shared memory, and the transposition of the output image code stream data refers to performing the transposition of a sub-data block with a size of 32*32 according to each thread block block , each thread executes an integer data operation, and multiple blcoks process in parallel. One thread processes one data, and multiple threads process it in parallel.

Copy the transposed Reed-Solomon code RS image code stream data from the shared memory to the global memory, and start the graphics processor GPU decoding program for decoding; the specific steps for starting the graphics processor GPU decoding program for decoding are as follows :

In the first step, each graphics processor GPU reads the code field of the image code stream data to be decoded from the global memory, and adopts a combined access method for global memory access to achieve efficient access, and each thread processes a set of Reed - Solomon code RS image code stream data, each thread uses a lookup table to transform the codeword from the finite field basis it uses to a natural basis, and then uses the lookup table to transform the data into a finite field; in the finite field, the codeword After multiplying the corresponding coefficients, use the reduction summation method to add the calculation results of the threads in each block to obtain the syndrome of multiple codewords. The generated syndrome is also arranged in a transposed manner. If the syndrome If it is all 0, the decoding ends, otherwise proceed to the following steps.

In the second step, the graphics processor GPU uses multiple blocks to calculate the key equations of multiple code streams. The calculation method is the B-M iterative algorithm that does not require inversion. The graphics processor GPU uses multiple threads to perform calculations, and each thread calculates An iteration parameter, the calculated key equation coefficients are stored in the global memory.

In the third step, multiple blocks are used in the graphics processing unit GPU to correct bit errors. The method of correcting bit errors is money search and Forney algorithm; each block reads in the key equation coefficients through multiple threads, and the standby threads respectively The key equation coefficients read in are multiplied, and the calculation results of each thread are summed by reduction and summation. According to the value of the sum, it is judged whether the symbol corresponding to the current block is an error symbol; if there is an error in the symbol corresponding to the current block , the Forney algorithm is used to calculate the error value, and a thread in the block is used to execute the program to correct the error value to obtain the decoding result, which is stored in the global memory.

In the parallel decoding process, one thread block is used to process the code stream of one image, and multiple thread blocks are used to process the code stream of multiple images, and the header data of the transposed Reed-Solomon code RS code stream is analyzed , to get the header data of the parsed code stream; the thread block here refers to setting the dimension of the thread grid as two-dimensional, and the size of the thread grid is 8×m, where m represents the image that needs to be decompressed in parallel set by the user Quantity, set the number of thread blocks owned by each thread grid to 28, and set the number of threads owned by each thread block to 256 to obtain the set thread grid and thread blocks.

The method of processing one image by one thread block and processing multiple images by multiple thread blocks is used to analyze the packet header of the transposed Reed-Solomon code RS image code stream to obtain the header data of the analyzed image code stream.

Multiple threads are started inside the thread block, and each thread reassembles the decoded image code blocks of the same layer in the video memory in order to obtain the decoded image code stream data.

Step 6, obtaining decoded image code stream data.

Perform inverse transposition on the decoded image code stream data, perform inverse transposition of a sub-data block with a size of 32*32 according to each thread block block, and perform an operation on an integer data in each thread thread to obtain inverse transposition decoding Image stream data.

Parity combining is performed on the reverse-transposed decoded image code stream data to obtain decoded image code stream data stored in reverse order.

The global memory is accessed by means of combined memory access, and the decoded image code stream data stored in the reverse order of the odd-even combination in the global memory is divided into groups of 255 bits, and every two groups of code streams are flipped once to obtain the decoded image stored in the normal order. Image stream data.

Store the decoding result in the global memory inside the graphics processing unit GPU.

Step 7, outputting the decoded image code stream data.

The decoded image code stream data is read out from the internal global memory of the graphics processing unit GPU and output to the computer memory by means of combined access.

The effect of the present invention will be further described below in combination with the test results of the decoding time, decoding time ratio and decoding accuracy rate of the Reed-Solomon code RS based on the graphics processing unit GPU.

The object of each Reed-Solomon code RS decoding algorithm is a codeword with a length of 255, so the time of the Reed-Solomon code RS decoding algorithm is only related to the decoding time of each group of codewords and how many groups of codes there are in total word related.

Comparing the graphics processor GPU decoding time and the central processing unit CPU decoding time under the C2075 architecture, the test results obtained are shown in the following table:

The data size of the input image code stream in the above table is 1286KB, and the program can decode correctly in the case of error-free decoding and in the case of randomly adding 1, 8, and 16 errors to each group of code words. In the c program executed on the central processing unit CPU that has not been optimized, under the condition of error-free decoding, the time used is 354ms; under the condition of error-correcting decoding, when the number of errors is 1, the time used is 344ms; the number of errors is In the case of 8, the time used is 344ms; when the number of errors is 16, the time used is 344ms. Both error-correcting decoding and error-free decoding need to be calculated through the same steps. Under the conditions of error-free and error-correcting, the time complexity of each group of codewords is the same. Therefore, under the same image, the central processing unit CPU The error-correcting decoding time is not much different from the error-free decoding time. In the GPU decoding process of the graphics processor, under the condition of error-free decoding, the time used is 18ms; under the condition of error-correcting decoding, when the number of errors is 1, the time used is 21ms; when the number of errors is 8, the time used is The time is 30ms; when the number of errors is 16, the time used is 40ms; under the condition of error-free decoding, the decoding time ratio of the central processing unit CPU and the graphics processing unit GPU is 19.6; under the condition of error-correcting decoding, the number of errors is In the case of 1, the decoding time ratio of the central processing unit CPU to the graphics processing unit GPU is 16.4; when the number of errors is 8, the decoding time ratio of the central processing unit CPU to the graphics processing unit GPU is 11.4; In this case, the decoding time ratio of the central processing unit CPU to the graphics processing unit GPU is 8.6. The optimized algorithm makes a conditional judgment in the process of whether to perform error-correcting decoding. After finding the syndrome, judge whether to perform error-correcting decoding according to whether the syndrome is zero. Therefore, the complexity of error-free decoding is much lower. Because of the complexity of error-correcting decoding, error-free decoding takes the shortest time. The complexity of error-correcting decoding increases with the number of errors to be corrected. The time-consuming error-correcting decoding also increases with the number of error code words.

In order to verify the performance of error correction decoding, the error correction decoding time measured in the above table is the case where each group of codewords in the input code stream has errors, that is, each group of codewords in the same picture needs to perform error correction decoding operations , but in the actual communication system, the bit error rate is generally between e ^-6 and e ^-4 , that is, the number of error code words in a 2M picture is between a few to hundreds, and it needs to be corrected The number of wrongly decoded code groups is very small, so in actual situations, the decoding time of the graphics processing unit GPU will be significantly reduced compared with the central processing unit CPU.

Based on the decoding of the graphics processor GPU, we have adopted a method of merging access to the global memory, added a transpose function, and redistributed the use of shared memory and registers in the error correction decoding function. Therefore, RS decoding The performance of the algorithm has been significantly improved.

Therefore, it can be seen from the two optimization results that whether the data in the global memory is merged or not has a great impact on the parallel performance of the CUDA program. At the same time, the allocation of shared memory and registers, as well as the design of the parallel structure It is also the main factor affecting program parallelism.

Claims (10)

1. a kind of RS decoding method based on graphic processor, comprises the steps: (1) Initialize the computer: (1a) connecting a plurality of graphics processing units (GPUs) to a computer; (1b) the computer allocates the global memory in the graphics processing unit GPU; (2) Input image stream data: Inputting the Reed-Solomon code RS image stream data to be decoded into the computer memory; (3) Read image stream data: (3a) Using asynchronous transmission mode, read the Reed-Solomon code RS image code stream data to be decoded from the computer memory; (3b) adopting asynchronous transmission mode, storing the read Reed-Solomon code RS image code stream data to be decoded in the global memory; (4) Obtain the output image stream data: (4a) Adopt the method of merging memory access to access the global memory, and divide the Reed-Solomon code RS image code stream data in the global memory into multiple groups according to each 255-bit group, and each two groups of image codes The stream data is reversed once in parallel processing to obtain the reversed image code stream data; (4b) Separating odd and even bits of the flipped image code stream data to obtain parity-separated image code stream data; (4c) the image code stream data separated by parity, according to the order of the even number bit in front and the odd number bit in the back, to form the output image code stream data; (5) Parallel decoding: (5a) Transpose the output image code stream data to obtain the transposed Reed-Solomon code RS image code stream data, and use the combined memory access method to convert the transposed Reed-Solomon code The RS image code stream data is stored in the shared memory by means of asynchronous transmission; (5b) Transmit the transposed Reed-Solomon code RS image code stream data from the shared memory to the global memory by means of asynchronous transmission, and start the graphics processor GPU decoding program to decode; (5c) Adopt the method that one thread block processes the code stream of an image, and multiple thread blocks process the code stream of multiple images, analyze the header data of the transposed Reed-Solomon code RS image code stream data , to obtain the header data of the parsed image stream data; (5d) Using a thread block to process an image and multiple thread blocks to process multiple images, analyze the transposed Reed-Solomon code RS image code stream data packet header, and obtain the analyzed image code stream data packet header data; (5e) multiple threads are started inside the thread block, and each thread reassembles the decoded image code blocks of the same layer in the video memory according to the sequence to obtain the decoded image code stream data; (6) Obtain the decoded image stream data: (6a) Perform reverse transposition on the decoded image code stream data to obtain reverse transpose decoded image code stream data, and store the reverse transpose decoded image code stream data in a shared memory in an asynchronous transmission manner; (6b) Parity-combining the decoded image code stream data after reverse transposition, and storing the obtained decoded image code stream data stored in reverse order in the global memory by means of asynchronous transmission; (6c) The global memory is accessed by means of combined memory access, and the decoded image code stream data stored in the reverse order of parity and even in the global memory is divided into multiple groups according to each 255-bit group, and each two groups of image code stream data Flip once according to the parallel processing method to obtain the flipped decoded image code stream data; (6d) store the decoding result in the internal global memory of the graphics processing unit GPU; (7) output decoded image stream data: The decoded image code stream data is read out from the internal global memory of the graphics processing unit GPU and output to the computer memory by means of combined access. 2. The RS decoding method based on a graphics processor according to claim 1, characterized in that: the graphics processor GPU described in the step (1a) is selected in a range of numbers [4, 10]. 3. the RS decoding method based on graphic processor according to claim 1, is characterized in that: step (3a), step (3b), step (5a), step (5b), step (6a), step (6b The asynchronous transmission mode described in ) means that the image data code streams to be transmitted in each step are divided into groups of 255 bits, and the image data code streams are transmitted in groups. When transmitting each bit group, the bit group A start bit is added in front of the bit group, and a stop bit is added after the bit group. 4. The RS decoding method based on a graphics processor according to claim 1, characterized in that: the reversal described in step (4a), step (6c) refers to that every two groups of image stream data are reversed storage. 5. the RS decoding method based on graphics processor according to claim 1, is characterized in that: the parallel processing described in step (4a), step (6c) refers to, image code stream data is according to each thread block The block executes a graph, and each thread executes an integer data for corresponding processing. 6. the RS decoding method based on graphic processor according to claim 1, is characterized in that: the mode of merging memory access described in step (4a), step (5a), step (6c), step (7) It means that in the graphics processing unit GPU, threads in the same half-warp access the data at the same position of each code stream in the shared memory each time. 7. The RS decoding method based on a graphics processor according to claim 1, characterized in that: transposing the output image code stream data described in the step (5a) refers to executing a block according to each thread block For a sub-data block whose size is 32*32, convert the rows and columns of the sub-data block to realize the transposition of the sub-data block, and each thread executes an operation on integer data. 8. the RS decoding method based on graphics processor according to claim 1, is characterized in that: the specific steps of starting graphics processor GPU decoding program described in the step (5b) to decode are as follows: In the first step, each graphics processing unit (GPU) reads the code field to be decoded from the global memory. The access to the global memory is combined to achieve efficient access. Each thread processes a set of Reed-Solomon Code RS image code stream data, each thread first uses a lookup table to transform the code word from the finite field base it uses to a natural base, and then uses the lookup table to transform the image code stream data into a finite field; in the finite field, the code word Words are multiplied by the corresponding coefficients, and the calculation results of the threads in each block are added using the reduction summation method to obtain adjoint expressions of multiple codewords. The generated adjoint expressions are also arranged in a transposed manner. If the formula is all 0, the decoding ends, otherwise, proceed to the following steps; In the second step, the graphics processor GPU uses multiple blocks to calculate the key equations of multiple image stream data. The calculation method is the B-M iterative algorithm that does not require inversion. The graphics processor GPU uses multiple threads to perform calculations. Each thread Both calculate an iteration parameter, and the key equation coefficients obtained after calculation are stored in the global memory; In the third step, multiple blocks are used in the graphics processing unit GPU to correct bit errors. The method of correcting bit errors is money search and Forney algorithm; each block reads in the key equation coefficients through multiple threads, and then the standby threads respectively The read-in key equation coefficients are multiplied, and then the calculation results of each thread are summed by reduction and summation. According to the value of the sum, it is judged whether the symbol corresponding to the current block is an error symbol; if the symbol corresponding to the current block If there is an error, the Forney algorithm is used to calculate the error value, and a thread in the block is used to execute the program to correct the error value to obtain the decoding result, which is stored in the global memory. 9. the RS decoding method based on graphics processor according to claim 1, is characterized in that: the thread block described in step (5c) refers to, thread grid dimension is set to two-dimensional, the size of thread grid is 8×m, where m represents the number of images that need to be decompressed in parallel set by the user, and the thread blocks owned by each thread grid are set to 28, and the number of threads owned by each thread block is set to 256, and the set Nice thread grid and thread blocks. 10. The RS decoding method based on a graphics processor according to claim 1, characterized in that: the inverse transposition described in step (6a) refers to executing a subclass whose size is 32*32 according to each thread block block. Data block, convert the rows and columns of the sub-data block to realize the inverse transposition of the sub-data block, and each thread executes an operation on integer data.