CN104267909A - Chip on imaging box and data writing response method - Google Patents
Chip on imaging box and data writing response method Download PDFInfo
- Publication number
- CN104267909A CN104267909A CN201410404615.0A CN201410404615A CN104267909A CN 104267909 A CN104267909 A CN 104267909A CN 201410404615 A CN201410404615 A CN 201410404615A CN 104267909 A CN104267909 A CN 104267909A
- Authority
- CN
- China
- Prior art keywords
- data
- signal samples
- clock signal
- sequence
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Abstract
The invention discloses a chip on an imaging box and a data writing response method and aims to overcome the defect that chips on imaging boxes in the prior art fail to adjust data writing timing and speed according to own practical operation conditions. The method includes: generating internal clock signals; receiving external clock signals and writing data signals; synchronously sampling the external clock signals and the writing data signals according to the internal clock signals to obtain a clock signal sampling sequence and a data signal sampling sequence respectively; temporarily storing the clock signal sampling sequence and the data signal sampling sequence; restoring the temporarily stored data signal sampling sequence according to the clock signal sampling sequence to obtain to-be-written data; storing the to-be-written data, wherein sampling frequency is higher than external clock signal frequency. When the chip is used for data writing operations, following clock signals of an imaging device is not needed, and accordingly operational capability of the chip is improved, and adaptability and operation efficiency of the chip are improved as well.
Description
Technical field
The present invention relates to data processing method, particularly relate to the chip on a kind of imaging cartridge and data write to the method responded.
Background technology
Along with the development of imaging technique, the imaging devices such as such as duplicating machine, printer, facsimile recorder, word processor are widely used.Generally all be provided with the imaging cartridge (as print cartridge, cartridge etc.) being used for holding recording materials facilitating user to change in imaging device, wherein imaging cartridge be all provided with chip usually.The data relevant to imaging cartridge are stored in chip, as: imaging cartridge plant code, date of manufacture, model, characterisitic parameter, imaging number of pages and recording materials surplus information etc.In the information interaction of imaging device and imaging cartridge, imaging device can write the imaging cartridge related data that data are come in more new chip in the chip of imaging cartridge.
Existing part imaging device and chip take the mode of synchronous transmission to carry out communication, and namely imaging device passes through clock line CL and data line DA to chip tranmitting data register signal CLK and data DATA.Concrete, the data that imaging device will send before the negative edge (or rising edge) of clock signal clk arrives are placed on data line DA, and the data of chip on negative edge (or rising edge) the image data line DA of clock line are stored in its memory; Before the next negative edge (or rising edge) of clock line arrives, the data that the next one will send are caught data line by imaging device, and the data in like manner on negative edge (or rising edge) the chip image data line DA of next clock line are stored in its memory.
In communication process, imaging device can adjust the frequency of clock signal clk according to the data content of data DATA or data type.Such as, thinking for imaging device can by the data of chip fast processing, and the frequency of the clock signal clk that imaging device sends can be higher; And imaging device is thought that chip writes slower data, the frequency of the clock signal clk that imaging device sends can be lower.
Because the clock signal CLK frequency of imaging device is not fixed, therefore, existing chip when communicating with imaging device must passively tracking imaging device clock signal change, guarantee collects valid data when the hopping edge of clock signal clk.
Thus chip cannot adjust opportunity and the speed of data write according to the practical working situation of self.
Summary of the invention
Technical matters to be solved by this invention is in order to the chip overcome in prior art on imaging cartridge cannot according to the practical working situation of self to adjust opportunity and the speed of data write.
In order to solve the problems of the technologies described above, the invention provides and a kind ofly data are write to the method responded, wherein, the method comprises: produce internal clock signal; Receive external timing signal and write data-signal; According to described internal clock signal, synchronized sampling is carried out to described external timing signal and write data-signal, obtain clock signal samples sequence and data signal samples sequence respectively; Temporary described clock signal samples sequence and data signal samples sequence; The described data signal samples sequence temporary according to described clock signal samples sequence pair is reduced, and obtains data to be written; Store described data to be written; Wherein, the frequency of described sampling is higher than the frequency of described external timing signal.
Preferably, the described data signal samples sequence temporary according to described clock signal samples sequence pair is reduced, and obtains described data to be written, comprising: from described clock signal samples sequence, and retrieval meets the clock signal samples data of preset rules; According to the clock signal samples data retrieved, from described data signal samples sequence certificate, extract described data to be written; Wherein, the one of described preset rules specifically in following rule: the numerical value of two adjacent clock signal samples data is " 0,1 ", and the numerical value of two adjacent clock signal samples data is " 1,0 ".
Preferably, according to the clock signal samples data retrieved, described data to be written are extracted from described data signal samples sequence certificate, comprise: meet the clock signal samples data of preset rules from described, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written.
Preferably, according to the clock signal samples data retrieved, from described data signal samples sequence certificate, extract described data to be written, comprising: according to the described clock signal samples data meeting preset rules, described clock signal samples sequence is divided into groups; From each grouping of described clock signal samples sequence, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written.
Preferably, from each grouping of described clock signal samples sequence, Selective sequence value is the clock signal samples data of effective value, extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written, comprise: from each grouping of described clock signal samples sequence, selection sequential value is the clock signal samples data of effective value arbitrarily, extract sequential value in the corresponding data signal samples sequence of these clock signal samples data as described data to be written, or from the same grouping of described clock signal samples sequence, select all sequences value to be the clock signal samples data of effective value, more described all sequences value is whether the sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical, get a many sequential value of the sequential value frequency of occurrences in described corresponding data signal samples sequence as described data to be written.
Preferably, if described preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", then described effective value is 1; If described preset rules is the numerical value of adjacent two clock signal samples data is " 1,0 ", then described effective value is 0.
The chip that embodiment still provides on a kind of imaging cartridge of the application, it comprises: internal clocking module, is set to produce internal clock signal; Interface module, is set to receive the external timing signal from imaging device and write data-signal; Sampling module, is set to carry out synchronized sampling according to described internal clock signal to described external timing signal and write data-signal, obtains clock signal samples sequence and data signal samples sequence respectively; Temporary storage module, is set to temporary described clock signal samples sequence and data signal samples sequence; Data resolution module, is set to the described data signal samples sequence temporary according to described clock signal samples sequence pair and reduces, obtain the data that described imaging device writes described chip; Memory module, is set to store the data that described imaging device writes described chip; Wherein, the frequency of described sampling is higher than the frequency of described external timing signal.
Preferably, described data resolution module comprises: retrieval unit, is set to from described clock signal samples sequence, and retrieval meets the clock signal samples data of preset rules; Extraction unit, is set to, according to the clock signal samples data retrieved, go out from described data signal samples extracting data the data that described imaging device writes described chip; Wherein, the one of described preset rules specifically in following rule: the numerical value of two adjacent clock signal samples data is " 0,1 ", and the numerical value of two adjacent clock signal samples data is " 1,0 ".
Preferably, described extraction unit comprises: chooser unit, is set to meet the clock signal samples data of preset rules from described, and Selective sequence value is the clock signal samples data of effective value; Perform subelement, be set to extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence write described chip data as described imaging device.
Preferably, described extraction unit comprises: grouping subelement, and the clock signal samples data being set to meet described in basis preset rules are divided into groups to described clock signal samples sequence; Chooser unit, being set to Selective sequence value from each grouping of described clock signal samples sequence is the clock signal samples data of effective value; Perform subelement, be set to extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence write described chip data as described imaging device.
Preferably, it is the clock signal samples data of effective value that described chooser unit is set to any selection sequential value from each grouping of described clock signal samples sequence, described execution subelement is set to extract sequential value corresponding with the described clock signal samples data selected in described data signal samples sequence writes described chip data as described imaging device, or described chooser unit is set to select all sequences value to be the clock signal samples data of effective value from the same grouping of described clock signal samples sequence, more described all sequences value is whether the sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical, described execution subelement is set to get a many sequential value of the sequential value frequency of occurrences in described corresponding data signal samples sequence writes described chip data as described imaging device.
Preferably, if described preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", then described effective value is 1; If described preset rules is the numerical value of adjacent two clock signal samples data is " 1,0 ", then described effective value is 0.
Compared with prior art, the chip of the embodiment of the present application carries out data read-write operation, without the need to the clock signal of tracking imaging device.Thus chip, while carrying out communicating with imaging devices such as printers, can also perform other task, enrich the ability to work of chip, improve adaptive faculty and the work efficiency of chip.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing technical scheme of the present invention.Object of the present invention and other advantages realize by structure specifically noted in instructions, claims and accompanying drawing and/or flow process and obtain.
Accompanying drawing explanation
Accompanying drawing is used to provide the further understanding of technical scheme to the application or prior art, and forms a part for instructions.Wherein, the expression accompanying drawing of the embodiment of the present application and the embodiment one of the application are used from the technical scheme explaining the application, but do not form the restriction to technical scheme.
Fig. 1 is schematic flow sheet data being write to the method responded of the embodiment of the present application.
Fig. 2 is the organigram of the chip of the embodiment of the present application.
Fig. 3 be the chip of the embodiment of the application receive from printer write data-signal time process sequential chart.
Fig. 4 is the schematic diagram of a kind of processing mode of Data Analysis unit in the chip of the embodiment of the present application.
Fig. 5 is the schematic diagram of the another kind of processing mode of Data Analysis unit in the chip of the embodiment of the present application.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, to the present invention, how application technology means solve technical matters whereby, and the implementation procedure reaching relevant art effect can fully understand and implement according to this.Each feature in the embodiment of the present application and embodiment, can be combined with each other under prerequisite of not conflicting mutually, the technical scheme formed is all within protection scope of the present invention.
In addition, the step shown in process flow diagram of accompanying drawing can perform in the computer system of such as one group of computer executable instructions.Further, although show logical order in flow charts, in some cases, can be different from the step shown or described by order execution herein.
In the embodiment of the application, be installed to after on imaging device (such as printer) at imaging cartridge (such as print cartridge), chip on print cartridge realizes being connected with printer by the mode of electrical contact or wireless telecommunications, and printer can carry out communication by bus etc. with chip.This bus comprises clock line CL and data line DA.When printer performs data writing operation to chip, printer passes through clock line CL to chip tranmitting data register signal CLK1, and sends data-signal by data line DA to chip; When performing read data operation to chip, printer is by clock line CL to chip tranmitting data register signal CLK1, and chip sends data-signal by data line DA to printer.
The embodiment of the present application the method responded is write to data, the chip on imaging cartridge can be applied in.As shown in Figure 1, the method responded write to data mainly the comprising the steps of the embodiment of the present application.
Step S110, chip produces internal clock signal.
Step S120, receives the external timing signal that imaging device is sent by clock line CL and the data-signal (hereinafter referred to as write data-signal) that will write in chip memory sent by data line DA.
Step S130, according to produced internal clock signal, carries out sampling to received external timing signal and obtains clock signal samples sequence, carry out sampling obtain data signal samples sequence to received write data-signal.Wherein, external timing signal and write data-signal are sampled and synchronously carried out.
Sample frequency when this external timing signal and write data-signal being sampled according to this internal clock signal, higher than the frequency of the external timing signal that this imaging device is sent, ensure that the write data-signal to imaging device sends carries out complete sampling, the information of write entrained by data-signal can not be omitted.
The clock signal samples sequence that sampling obtains and data signal samples sequence are kept in the chips.By keeping in clock signal samples sequence and data signal samples sequence, can asynchronous communication be realized, first data sampled and keep in, wait during the free time and carry out subsequent storage reason again, improve the processing power of chip, make chip have stronger adaptability to changes.
Step S140, reduces according to this data signal samples sequence of this clock signal samples sequence pair, obtains data to be written, also the i.e. data that write to this chip of this imaging device, stores the data that this is to be written.
Particularly, can from clock signal samples sequence, retrieval meets the clock signal samples data of preset rules.Then according to the clock signal samples data of retrieval, data to be written are gone out from data signal samples extracting data.This preset rules can be the numerical value of adjacent two clock signal samples data is " 0,1 ", or also can be the numerical value of adjacent two clock signal samples data is " 1,0 ".
In the embodiment of the application, clock signal samples data according to retrieval go out data to be written from data signal samples extracting data, can be from the clock signal samples data meeting preset rules, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the clock signal samples data selected in data signal samples sequence as data to be written.
Above-mentioned preset rules and effective value specifically according to chip the imaging device feature that is suitable for set.Such as, as fruit chip the imaging device that is suitable for be that write data-signal is effective when outside rising edge clock signal, so, above-mentioned preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", and this effective value is 1.In like manner, as fruit chip the imaging device that is suitable for be that write data-signal is effective when external timing signal negative edge, so, above-mentioned preset rules be the numerical value of adjacent two clock signal samples data for " 1,0 " time, this effective value is 0.
In the embodiment of the application, clock signal samples data according to retrieval go out data to be written from data signal samples extracting data, also can be according to the clock signal samples data meeting preset rules, clock signal samples sequence is divided into groups, then from each grouping of clock signal samples sequence, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the clock signal samples data selected in data signal samples sequence as data to be written.
Particularly, from each grouping of clock signal samples sequence, selection sequential value is the clock signal samples data of effective value, and extract data signal samples data corresponding with the clock signal samples data selected in data signal samples sequence as data to be written, can be from each grouping of clock signal samples sequence, select arbitrarily a sequential value to be the clock signal samples data of effective value, extract sequential value in the corresponding data signal samples sequence of these clock signal samples data as data to be written; Also can be from the same grouping of clock signal samples sequence, select all sequences value to be the clock signal samples data of effective value, relatively all sequences value is whether sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical, gets a sequential value of the sequential value frequency of occurrences many (also namely quantity is more) in corresponding data signal samples sequence as data to be written.This mode can play error correction.
Above-mentioned effective value specifically according to chip the imaging device feature that is suitable for set.Such as, as fruit chip the imaging device that is suitable for be that write data-signal is effective when outside rising edge clock signal, so, effective value is 1.In like manner, as fruit chip the imaging device that is suitable for be that write data-signal is effective when external timing signal negative edge, so, effective value is 0.And above-mentioned preset rules can be the numerical value of adjacent two clock signal samples data be " 0,1 ", also can be that the numerical value of two adjacent clock signal samples data is " 1,0 ".
As shown in Figure 2, the chip of the embodiment of the present application, mainly includes internal clocking module 21, interface module 22, sampling module 23, temporary storage module 24, data resolution module 25 and memory module 26.
Internal clocking module 21, is set to produce internal clock signal so that sampling module 23 is sampled.
Interface module 22, for communicating with imaging device, receives the external timing signal that imaging device is sent by clock line CL and the write data-signal sent by data line DA.Interface module 22 can be specifically that chip carries out contacting the contact sets of communication with imaging device, also can be the antenna carrying out wireless telecommunications with imaging device.
Sampling module 23, be connected with this internal clocking module 21 and interface module 22, carry out sampling acquisition clock signal samples sequence according to the external timing signal that this internal clock signal docking port module 22 receives, the write data-signal that docking port module 22 receives carries out sampling and obtains data signal samples sequence.
The sampling of sampling module 23 pairs of external timing signals and the sampling of write data-signal are synchronously carried out.According to the frequency that this internal clock signal is sampled to this external timing signal and write data-signal, higher than the frequency of the external timing signal that this imaging device is sent.
Temporary storage module 24, is connected with this sampling module 23, and the clock signal samples sequence obtain the sampling of this sampling module 23 and data signal samples sequence are kept in.By keeping in clock signal samples sequence and data signal samples sequence, can asynchronous communication be realized, first data sampled and keep in, wait during the free time and carry out subsequent storage reason again, improve the processing power of chip, make chip have stronger adaptability to changes.
Data resolution module 25, be connected with temporary storage module 24, reduce according to the data signal samples sequence that this clock signal samples sequence pair sampling module 23 collects, obtain data to be written, also the i.e. data that write to this chip by this interface module 22 of this imaging device.
Memory module 26, is connected with this data resolution module 25, stores the data that the reduction of this data resolution module 25 obtains.
As shown in Figure 2, this data resolution module 25 mainly comprises retrieval unit 251 and extraction unit 252.
Retrieval unit 251, is connected with temporary storage module 24, is set to from clock signal samples sequence, and retrieval meets the clock signal samples data of preset rules.This preset rules can be such as the numerical value of adjacent two clock signal samples data is " 0,1 ", or also can be the numerical value of adjacent two clock signal samples data is " 1,0 ".
Extraction unit 252, is connected with retrieval unit 251 and memory module 26, is set to the clock signal samples data according to retrieval, goes out the data of imaging device write chip from data signal samples extracting data.
In an embodiment of the application, this extraction unit 252 can comprise chooser unit and perform subelement.
Wherein, chooser unit is set to from the clock signal samples data meeting preset rules, and Selective sequence value is the clock signal samples data of effective value.This execution subelement, is set to extract the data signal samples data corresponding with the clock signal samples data selected in data signal samples sequence and writes the data of chip as imaging device.
In the present embodiment, above-mentioned preset rules and effective value specifically according to chip the imaging device feature that is suitable for set.Such as, as fruit chip the imaging device that is suitable for be that write data-signal is effective when outside rising edge clock signal, so, above-mentioned preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", and this effective value is 1.In like manner, as fruit chip the imaging device that is suitable for be that write data-signal is effective when external timing signal negative edge, so, above-mentioned preset rules be the numerical value of adjacent two clock signal samples data for " 1,0 " time, this effective value is 0.
In the another embodiment of the application, this extraction unit 252 also can comprise grouping subelement, chooser unit and perform subelement.The clock signal samples data that grouping subelement is set to according to meeting preset rules are divided into groups to clock signal samples sequence.Chooser unit selection sequential value from each grouping of clock signal samples sequence is the clock signal samples data of effective value.Execution subelement is set to extract the data signal samples data corresponding with the clock signal samples data selected in data signal samples sequence and writes the data of chip as imaging device.
Wherein, it is the clock signal samples data of effective value that chooser unit is set to any selection sequential value from each grouping of clock signal samples sequence, and execution subelement is set to extract the sequential value corresponding with the clock signal samples data selected in data signal samples sequence and writes the data of chip as imaging device.
Or, this chooser unit is set to select all sequences value to be the clock signal samples data of effective value from the same grouping of clock signal samples sequence, and comparing all sequences value is whether sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical; Perform subelement and be set to get the data of a many sequential value of the sequential value frequency of occurrences in corresponding data signal samples sequence as imaging device write chip.
In the present embodiment, above-mentioned effective value specifically according to chip the imaging device feature that is suitable for set.Such as, as fruit chip the imaging device that is suitable for be that write data-signal is effective when outside rising edge clock signal, so, effective value is 1.In like manner, as fruit chip the imaging device that is suitable for be that write data-signal is effective when external timing signal negative edge, so, effective value is 0.And above-mentioned preset rules can be the numerical value of adjacent two clock signal samples data be " 0,1 ", also can be that the numerical value of two adjacent clock signal samples data is " 1,0 ".
Chip structure schematic diagram shown in composition graphs 2, Fig. 3 shows the process sequential chart during write data-signal that chip receives from this imaging device of printer.As shown in Figure 3, when printer writes data in chip, external timing signal CLK1 and write data-signal DATA can be sent respectively to clock line CL and data line DA.The internal clocking module 21 of chip produces the internal clock signal CLK2 of frequency higher than clock signal clk 1.When interface module 22 detects the clock signal clk 1 from clock line CL, sampling module 23 gathers the data on clock line CL and data line DA according to the clock signal clk 2 that internal clocking module 21 produces, and the data sampled is stored in temporary storage module 24.
Concrete, sampling module 23 gathers the data on clock line CL according to internal clock signal CLK2 and is stored in temporary storage module 24 and obtains sequence L1, and the data simultaneously on image data line DA are stored in temporary storage module 24 and obtain sequence L2.This sequence L1 is aforesaid clock signal samples sequence, and this sequence L2 is aforesaid data signal samples sequence.
Wherein, the data collected can be stored in temporary storage module 24 on image data limit, limit by sampling module 23.
For Fig. 3, above-mentioned sampling process is illustrated.
When supposing that this printer is clock falling edge, data are effective, and as shown in Figure 3, external timing signal CLK1 and write data-signal DATA:10100110 sent by printer ...After the interface module 22 of chip detects clock signal clk 1, sampling module 23 gathers the data on clock line CL and data line DA according to the sample frequency that internal clock signal CLK2 provides, obtain sequence L1:110 1,100 110 111,000 111,000 11,100 111,000 110 ... with sequence L2:111000011100000000000011111111111000 ..., be stored in temporary storage module 24.
Data resolution module 25 analyzes the sampled data stored in temporary storage module 24, restores the data that printer writes in chip accordingly.
Wherein, data resolution module 25 can after sampling module 23 gathers complete write data-signal again to temporary storage module 24 in temporary data carry out data processing.Data resolution module 25 also just first can process the data in temporary storage module 24 when sampling module 23 collecting part write data-signal, thus chip can process on collection limit, limit, saves the response time.
Finally, memory module 26 stores data resolution module 25 and processes the valid data obtained.
The embodiment of the application provides the method for several data resolution unit process data.
In first method, data resolution module 25 analyzes the sequence L1 and sequence L2 that store in temporary storage module 24.Because sampling module 23 is the data gathered according to sample frequency on clock line CL and data line DA simultaneously, therefore, the data in sequence L1 and sequence L2 are one to one on clock.As fruit chip the printer that is suitable for be that data DATA is effective when the clock falling edge of clock signal clk 1, so, the data resolution module 25 of this chip judges whether the adjacent values in sequence L1 changes from 1 to 0 successively, if so, the data in sequence L2 corresponding when then to extract this adjacent values be 0 are as valid data.In like manner, as fruit chip the printer that is suitable for be that data DATA is effective when the rising edge clock of clock signal clk 1, so, the data resolution module 25 of this chip judges whether the adjacent values in sequence L1 changes from 0 to 1 successively, if so, the data in sequence L2 corresponding when then to extract this adjacent values be 1 are as valid data.
Below for Fig. 4, above-mentioned Data Analysis process is illustrated.
When supposing that this printer is clock falling edge, data are effective, sampling module 23 gathers the data on clock line CL and data line DA according to the sample frequency that internal clock signal CLK2 provides, obtain sequence L1:110 1,100 110 111,000 111,000 11,100 111,000 110 ..., and sequence L2:111 0,000 111 000,000 000,000 11,111 111,111 000 ...Data resolution module 25 by the data one_to_one corresponding in sequence L1 and sequence L2, and finds out the adjacent values from 1 to 0 change in sequence L1 successively, extracts the data in sequence L2 corresponding when this adjacent values is 0, as valid data.As shown in Figure 4, show that valid data are 10100110 ... be stored in memory module 26.
Because when printer is clock signal clk 1 hopping edge (rise or decline), data are effective, and chip sample frequency (i.e. aforesaid internal clock frequencies) is greater than clock signal clk 1 frequency, therefore whether be from 1 to 0 or from 0 to 1 change by the adjacent values analyzed in the clock sequence L1 that collects, the hopping edge of clock signal clk 1 can be judged, thus data corresponding when finding out this hopping edge, thus restore the data of printer write chip.
In the second approach, correctly effective for guaranteeing the data parsed, data resolution module 25 can also restore the data of printer write chip by the mode that sequence L1 is carried out dividing into groups.Data resolution module 25 judges that whether the adjacent values of sequence L1 is to change from 1 to 0 (or from 1 to 0), if, then be divided into one group with the data between adjacent twice change, wherein before change, data are divided in last group, and the data after change are divided in latter one group.Like this, the one-period of the corresponding clock signal clk 1 of data is often organized.
As fruit chip the printer that is suitable for be that data DATA is effective when the clock falling edge of clock signal clk 1, data in sequence L2 then in same group of data corresponding to 0 are all effective, can select one as printer write data from these valid data.Concrete system of selection can be under same group of data, the data chosen in the sequence L2 of any one 0 correspondence write data as a printer, also can be whether the data judged under same group of data in the sequence L2 of all 0 correspondences must be worth identical, if identical, get this value as printer write data, if difference, get that many value of the frequency of occurrences as printer write data.
In like manner, as fruit chip the printer that is suitable for be that data DATA is effective when the rising edge clock of clock signal clk 1, data in sequence L2 then in same group of data corresponding to 1 are all effective, select one as printer write data from these valid data.Concrete system of selection can be under same group of data, the data chosen in the sequence L2 of any one 1 correspondence write data as a printer, also can be whether the data judged under same group of data in the sequence L2 of all 1 correspondences must be worth identical, if identical, get this value as printer write data, if difference, get that many value of the frequency of occurrences as printer write data.
Change according to clock signal samples sequence is divided into groups to data-signal sample sequence, then by comparing the method selecting valid data from data signal samples sequence, the mistake that can effectively avoid data sampling errors to bring, improves the accuracy of data processing.
Below for Fig. 5, above-mentioned Data Analysis process is illustrated.
When supposing that this printer is clock falling edge, data are effective, sampling module 23 gathers the data on clock line CL and data line DA according to the sample frequency that internal clock signal CLK2 provides, obtain sequence L1:110 1,100 110 111,000 111,000 11,100 111,000 110 ..., and sequence L2:111 0,000 111 000,000 000,000 11,111 111,111 000 ...
Data resolution module 25 is by the data one_to_one corresponding in sequence L1 and sequence L2, and according to the change of the data in sequence L1, data between adjacent twice change are divided into one group, are divided into into 8 groups of data as shown in Figure 5: A1, A2, A3, A4, A5, A6, A7 and A8.The data often organized in the sequence L2 in data corresponding to extracted data 0 form 8 groups of preprocessed datas B1, B2, B3, B4, B5, B6, B7 and B8, each pretreated group selecting data to represent place from 8 groups of preprocessed datas, and form valid data 10100110 accordingly ... be stored in memory module 26.
Concrete system of selection can be select arbitrarily data as valid data often organizing in data.Also can be under same group of data, judge that whether the value of the data in the sequence L2 of all 0 correspondences is identical, if identical, get this value as printer write data, if difference, get that many value of the frequency of occurrences as printer write data.This mode can play error correction, such as, data in the corresponding sequence L2 of array A5 are 000000, if sampling module sample error causes the data in the corresponding sequence L2 of array A5 to be 000010, data so in B5 array are exactly 010, at this moment get the frequency of occurrences many 0 as significant figure, can sample error be corrected.
The chip that the present embodiment provides is when receiving the external timing signal and write data-signal that imaging device sends, clock signal without the need to tracking imaging device passively carries out data sync storage, but the data gathered by the clock signal of chip internal on clock line and data line, the data that arrange by oneself write opportunity in the chips and writing speed, not by the impact of imaging device.
In the prior art, the mode of the synchronous transmission communication between imaging device and chip, requires that chip must be synchronoused working with imaging device constantly, thus is difficult to other tasks of process, limit ability to work and the work efficiency of chip.The embodiment of the application is kept in sampled result, can realize carrying out asynchronous process to sampled result, chip can also process other tasks when receiving the write data that imaging device is sent, and as data check, pre-service etc., can improve the work efficiency of chip.
In addition, the clock signal frequency that the imaging device of different model sends may be different, even the clock signal frequency that same imaging device does not send in the same time also may be different.In the embodiment of the application, chip carries out the frequency of sampling according to internal clocking, and comparatively printer clock frequency is high, and fixed frequency value can be set to or adjust according to chip own situation, therefore chip can be common to the imaging device of various different clock frequencies, its work clock is also without the need to affecting by imaging device, improve the adaptive faculty of chip to imaging device, its Structure and energy is also simpler.
In the embodiment of the application, the frequency that chip carries out according to internal clock signal sampling is higher than the frequency of the clock signal of printer, its internal clock signal time of origin can also can after receiving printer clock signal after chip powers on, and embodiments of the invention do not limit this.
Those skilled in the art should be understood that, each ingredient of the device that above-mentioned the embodiment of the present application provides and/or system, and each step in method, they can concentrate on single calculation element, or are distributed on network that multiple calculation element forms.Alternatively, they can realize with the executable program code of calculation element.Thus, they can be stored and be performed by calculation element in the storage device, or they are made into each integrated circuit modules respectively, or the multiple module in them or step are made into single integrated circuit module to realize.Like this, the present invention is not restricted to any specific hardware and software combination.
Although the embodiment disclosed by the present invention is as above, the embodiment that described content only adopts for ease of understanding technical solution of the present invention, and be not used to limit the present invention.Those of skill in the art belonging to any the present invention; under the prerequisite not departing from the spirit and scope disclosed by the present invention; any amendment and change can be carried out in the form implemented and details; but scope of patent protection of the present invention, the scope that still must define with appending claims is as the criterion.
Claims (12)
1. data are write to the method responded, wherein, the method comprises:
Produce internal clock signal;
Receive external timing signal and write data-signal;
According to described internal clock signal, synchronized sampling is carried out to described external timing signal and write data-signal, obtain clock signal samples sequence and data signal samples sequence respectively;
Temporary described clock signal samples sequence and data signal samples sequence;
The described data signal samples sequence temporary according to described clock signal samples sequence pair is reduced, and obtains data to be written;
Store described data to be written;
Wherein, the frequency of described sampling is higher than the frequency of described external timing signal.
2. method according to claim 1, wherein, the described data signal samples sequence temporary according to described clock signal samples sequence pair is reduced, and obtains described data to be written, comprising:
From described clock signal samples sequence, retrieval meets the clock signal samples data of preset rules;
According to the clock signal samples data retrieved, from described data signal samples sequence certificate, extract described data to be written;
Wherein, the one of described preset rules specifically in following rule: the numerical value of two adjacent clock signal samples data is " 0,1 ", and the numerical value of two adjacent clock signal samples data is " 1,0 ".
3. method according to claim 2, wherein, according to the clock signal samples data retrieved, extracts described data to be written, comprising from described data signal samples sequence certificate:
Meet the clock signal samples data of preset rules from described, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written.
4. method according to claim 2, wherein,
According to the clock signal samples data retrieved, from described data signal samples sequence certificate, extract described data to be written, comprising:
According to the described clock signal samples data meeting preset rules, described clock signal samples sequence is divided into groups;
From each grouping of described clock signal samples sequence, Selective sequence value is the clock signal samples data of effective value, extracts data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written.
5. method according to claim 4, wherein, from each grouping of described clock signal samples sequence, Selective sequence value is the clock signal samples data of effective value, extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence as described data to be written, comprising:
From each grouping of described clock signal samples sequence, selection sequential value is the clock signal samples data of effective value arbitrarily, extract sequential value in the corresponding data signal samples sequence of these clock signal samples data as described data to be written, or
From the same grouping of described clock signal samples sequence, select all sequences value to be the clock signal samples data of effective value, more described all sequences value is whether the sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical, gets a many sequential value of the sequential value frequency of occurrences in described corresponding data signal samples sequence as described data to be written.
6. the method according to claim 3,4 or 5, wherein:
If described preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", then described effective value is 1;
If described preset rules is the numerical value of adjacent two clock signal samples data is " 1,0 ", then described effective value is 0.
7. the chip on imaging cartridge, it comprises:
Internal clocking module, is set to produce internal clock signal;
Interface module, is set to receive the external timing signal from imaging device and write data-signal;
Sampling module, is set to carry out synchronized sampling according to described internal clock signal to described external timing signal and write data-signal, obtains clock signal samples sequence and data signal samples sequence respectively;
Temporary storage module, is set to temporary described clock signal samples sequence and data signal samples sequence;
Data resolution module, is set to the described data signal samples sequence temporary according to described clock signal samples sequence pair and reduces, obtain the data that described imaging device writes described chip;
Memory module, is set to store the data that described imaging device writes described chip;
Wherein, the frequency of described sampling is higher than the frequency of described external timing signal.
8. chip according to claim 7, wherein, described data resolution module comprises:
Retrieval unit, is set to from described clock signal samples sequence, and retrieval meets the clock signal samples data of preset rules;
Extraction unit, is set to, according to the clock signal samples data retrieved, go out from described data signal samples extracting data the data that described imaging device writes described chip;
Wherein, the one of described preset rules specifically in following rule: the numerical value of two adjacent clock signal samples data is " 0,1 ", and the numerical value of two adjacent clock signal samples data is " 1,0 ".
9. chip according to claim 8, wherein, described extraction unit comprises:
Chooser unit, be set to meet the clock signal samples data of preset rules from described, Selective sequence value is the clock signal samples data of effective value;
Perform subelement, be set to extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence write described chip data as described imaging device.
10. chip according to claim 8, wherein, described extraction unit comprises:
Grouping subelement, the clock signal samples data being set to meet described in basis preset rules are divided into groups to described clock signal samples sequence;
Chooser unit, being set to Selective sequence value from each grouping of described clock signal samples sequence is the clock signal samples data of effective value;
Perform subelement, be set to extract data signal samples data corresponding with the described clock signal samples data selected in described data signal samples sequence write described chip data as described imaging device.
11. chips according to claim 10, wherein:
It is the clock signal samples data of effective value that described chooser unit is set to any selection sequential value from each grouping of described clock signal samples sequence, described execution subelement is set to extract sequential value corresponding with the described clock signal samples data selected in described data signal samples sequence writes described chip data as described imaging device, or
Described chooser unit is set to select all sequences value to be the clock signal samples data of effective value from the same grouping of described clock signal samples sequence, and more described all sequences value is whether the sequential value in the corresponding data signal samples sequence of the clock signal samples data of effective value is identical; Described execution subelement is set to get a many sequential value of the sequential value frequency of occurrences in described corresponding data signal samples sequence writes described chip data as described imaging device.
12. chips according to claim 9,10 or 11, wherein:
If described preset rules is the numerical value of adjacent two clock signal samples data is " 0,1 ", then described effective value is 1;
If described preset rules is the numerical value of adjacent two clock signal samples data is " 1,0 ", then described effective value is 0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410404615.0A CN104267909B (en) | 2014-08-15 | 2014-08-15 | A kind of chip on imaging cartridge and the method responded is write to data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410404615.0A CN104267909B (en) | 2014-08-15 | 2014-08-15 | A kind of chip on imaging cartridge and the method responded is write to data |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104267909A true CN104267909A (en) | 2015-01-07 |
| CN104267909B CN104267909B (en) | 2017-09-22 |
Family
ID=52159435
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410404615.0A Active CN104267909B (en) | 2014-08-15 | 2014-08-15 | A kind of chip on imaging cartridge and the method responded is write to data |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104267909B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109143907A (en) * | 2018-11-26 | 2019-01-04 | 光梓信息科技（上海）有限公司 | synchronous sampling system and automatic phase selection method |
| CN115755670A (en) * | 2022-10-24 | 2023-03-07 | 常州德尔科机电设备有限公司 | Method for realizing sampling of asynchronous signals based on FPGA |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5696639A (en) * | 1995-05-12 | 1997-12-09 | Cirrus Logic, Inc. | Sampled amplitude read channel employing interpolated timing recovery |
| CN1505266A (en) * | 2002-12-04 | 2004-06-16 | 其乐达科技股份有限公司 | Signal synchronization method and circuit thereof |
| CN1983920A (en) * | 2006-04-11 | 2007-06-20 | 华为技术有限公司 | Hybrid transmitting system and method for processing its signal |
| CN103078650A (en) * | 2013-01-06 | 2013-05-01 | 中国电子科技集团公司第十研究所 | High speed data transmission receiver |
| CN103501398A (en) * | 2013-09-24 | 2014-01-08 | 珠海艾派克微电子有限公司 | Chip, imaging box and method for communication between chip and imaging device |
-
2014
- 2014-08-15 CN CN201410404615.0A patent/CN104267909B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5696639A (en) * | 1995-05-12 | 1997-12-09 | Cirrus Logic, Inc. | Sampled amplitude read channel employing interpolated timing recovery |
| CN1505266A (en) * | 2002-12-04 | 2004-06-16 | 其乐达科技股份有限公司 | Signal synchronization method and circuit thereof |
| CN1983920A (en) * | 2006-04-11 | 2007-06-20 | 华为技术有限公司 | Hybrid transmitting system and method for processing its signal |
| CN103078650A (en) * | 2013-01-06 | 2013-05-01 | 中国电子科技集团公司第十研究所 | High speed data transmission receiver |
| CN103501398A (en) * | 2013-09-24 | 2014-01-08 | 珠海艾派克微电子有限公司 | Chip, imaging box and method for communication between chip and imaging device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109143907A (en) * | 2018-11-26 | 2019-01-04 | 光梓信息科技（上海）有限公司 | synchronous sampling system and automatic phase selection method |
| CN109143907B (en) * | 2018-11-26 | 2019-02-26 | 光梓信息科技（上海）有限公司 | Synchronous sampling system and automatic phase selection method |
| CN115755670A (en) * | 2022-10-24 | 2023-03-07 | 常州德尔科机电设备有限公司 | Method for realizing sampling of asynchronous signals based on FPGA |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104267909B (en) | 2017-09-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104385787B (en) | A kind of control method of laser marking machine and laser marking machine | |
| CN105320490A (en) | Method and apparatus for asynchronous FIFO circuit | |
| CN106951587A (en) | FPGA debugging systems and method | |
| DE112013001809T5 (en) | Cycle-accurate and cycle-replicable memory for a hardware accelerator based on FPGAs | |
| CN101141238B (en) | Superframe frame synchronization method and device | |
| CN103593271A (en) | Method and device for chip tracking debugging of system on chip | |
| CN102004678B (en) | Operation system performance analysis method and device | |
| CN104375952A (en) | Method for reading data from ring buffer | |
| CN110535551B (en) | Method and system for synchronizing fault recording sampling data in power system | |
| CN201657014U (en) | Data acquisition card of dual-interface gigabit Ethernet | |
| CN102880718B (en) | A kind of storage of flexible daily record and acquisition methods | |
| CN104267909A (en) | Chip on imaging box and data writing response method | |
| CN102629235A (en) | Method for increasing read-write speed of double data rate (DDR) memory | |
| CN104331637A (en) | Digital beam forming technique verification system and data processing method | |
| CN100470524C (en) | Small-capacity FIFO storage device data-moving trigger and method | |
| CN109412939B (en) | Communication gateway for recording industrial network communication period process data and working method | |
| CN105227288B (en) | GMII data transmission method for uplink and device | |
| CN103856365A (en) | Automatic testing method and system of client terminal access equipment | |
| CN105634861A (en) | New type serial error code tester | |
| CN106371770B (en) | Method for writing data and device | |
| CN105488047B (en) | Metadata reading/writing method and device | |
| JP4470582B2 (en) | Hardware / software co-simulation method and method | |
| CN109256998A (en) | Control the method and system and servo motor of current of electric sampling with high precision | |
| CN101739338B (en) | Processor address data tracking device and method | |
| CN105843768B (en) | A kind of single line communication time-after-time programmable memory method for burn-recording and the burning device based on this method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 7th Floor, Building 04, No. 63, Qianshan Mingzhu North Road, Zhuhai City, Guangdong Province, 519000 Patentee after: Jihai Microelectronics Co.,Ltd. Address before: 7th Floor, Building 04, No. 63, Qianshan Mingzhu North Road, Zhuhai City, Guangdong Province, 519000 Patentee before: APEX MICROELECTRONICS Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder |