CN104218060A - Organic light emitting diode display - Google Patents

Abstract

An organic light emitting diode display including a first electrode disposed in a display area of a display panel, and electrically connected to a transistor connected to a gate wiring and a data wiring; a pixel definition film provided on the display panel, and having an opening through which the first electrode is exposed; organic emission layers disposed on the first electrode; column spacers disposed on non-display areas of the display panel, and disposed on the pixel definition layer; a second electrode disposed on the organic emission layers and the column spacers; and signal blocking metal wirings disposed on both side edges of the organic emission layers, and disposed between the first electrode and the second electrode.

Description

Organic Light Emitting Diode Display

technical field

Exemplary embodiments of the present invention relate to organic light emitting diode displays.

Background technique

An organic light emitting diode display includes two electrodes and an organic light emitting diode (OLED) interposed therebetween. Electrons injected from the cathode as one electrode and holes injected from the anode as the other electrode are combined in the organic light emitting member to form excitons, and light is emitted when the excitons release energy.

The cathode and the anode are generally formed of metal, and a display panel having organic light emitting diodes, a sealing member opposing the display panel to protect the organic light emitting diodes of the display panel, and bonding and sealing the display panel and the sealing member are provided between the cathode and the anode. Sealants. The cathode is formed on the entire surface of the emission portion (pixel region) and the non-emission portion (spacer formation region) of the display panel, and the anode is formed corresponding to the emission portion. A spacer forming a gap is arranged between the cathode and the anode.

A short circuit may be generated by contact between the cathode and the anode due to extrusion, collision, etc. due to pressure from the outside of the display panel. Such a short circuit may induce localized burning of the display, resulting in a defect of the display.

The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.

Contents of the invention

Exemplary embodiments of the present invention provide an organic light emitting diode display including separate wires within a panel to prevent localized burning when a short circuit occurs between a cathode and an anode due to extrusion due to external pressure of the display panel.

Additional features of the invention will be set forth in the description which follows, and will be apparent from the description, or may be learned by practice of the invention.

An exemplary embodiment of the present invention discloses an organic light emitting diode display including: a display panel; a first electrode arranged in a display area of the display panel and electrically connected to a transistor connected to a gate wiring and a data Wiring; a pixel defining layer arranged on the display panel and having an opening through which the first electrode is exposed; an organic emission layer arranged on the first electrode; a non-display layer arranged on the display panel a column spacer on the region and on the pixel defining layer; a second electrode disposed on the organic emission layer and the column spacer; and disposed on both side edges of the organic emission layer and disposed Signal blocking metal wiring between the first electrode and the second electrode.

The exemplary embodiment of the present invention also discloses an organic light emitting diode display, including: a display panel; a first electrode arranged in a display area of the display panel, the first electrode is electrically connected to a transistor, and the transistor is connected to to gate wiring and data wiring; a pixel defining layer arranged on the display panel and including an opening through which the first electrode is exposed; an organic emission layer arranged on the first electrode; A spacer on the non-display area of the display panel and on the pixel defining layer; a second electrode disposed on the organic emission layer and the spacer; disposed on both sides of the organic emission layer metal wiring on and between the first electrode and the second electrode; disposed on the metal wiring and configured to prevent electrical connection between the second electrode and the metal wiring Insulation.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

Description of drawings

The accompanying drawings, which are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the principle of the invention.

FIG. 1 is a plan view schematically illustrating an organic light emitting diode display according to an exemplary embodiment of the present invention.

FIG. 2 is an enlarged layout view of a portion "A" illustrated in FIG. 1 .

FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2 .

4 is a plan view schematically illustrating a structure of a signal blocking metal wiring of an organic light emitting diode display according to an exemplary embodiment of the present invention.

Detailed ways

The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. However, this invention may be embodied in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure is thorough, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of elements may be exaggerated for clarity. Like reference numerals in the figures denote like elements.

Further, in the exemplary embodiments, since the same reference numerals designate the same elements having the same configuration, the first exemplary embodiment will be representatively described, and in the other exemplary embodiments, the same Different configurations of the first exemplary embodiment.

It should be noted that the drawings are illustrative and not drawn to scale. Relative sizes and proportions of parts in the drawings are exaggerated or reduced in size for the sake of accuracy and convenience, and the predetermined dimensions are only illustrative and not restrictive. Further, identical structures, elements or components depicted in two or more figures will be designated by the same reference numerals to depict similar features. It will be understood that when an element is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. It should be understood that for the purposes of this disclosure, "at least one of X, Y, and Z" may be construed to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z (e.g., XYZ , XYY, YZ, ZZ).

The exemplary embodiment specifically shows an exemplary embodiment of the present invention. As such, various improvements to the schematic are contemplated. Thus, exemplary embodiments are not limited to the particular shapes of regions shown and also include modification of shapes, for example, through manufacturing.

Hereinafter, an organic light emitting diode display according to an exemplary embodiment will be described with reference to FIGS. 1 to 4 .

1 is a plan view schematically illustrating an organic light emitting diode display according to an exemplary embodiment, FIG. 2 is an enlarged layout view of a portion "A" illustrated in FIG. 1 , and FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2 . . 4 is a plan view schematically illustrating a structure of a signal blocking metal wiring of an organic light emitting diode display according to an exemplary embodiment of the present invention.

As illustrated in FIG. 1 , an organic light emitting diode display 100 according to an exemplary embodiment includes a display panel 110 , a sealing member 210 covering the display panel 110 , and a sealant 1 disposed between the display panel and the sealing member 210 .

The sealant 1 is arranged along the edge of the sealing member 210 , and the sealant 1 bonds and seals the display panel 110 and the sealing member 210 . Hereinafter, an inner area surrounded by the sealant 1 between the display panel 110 and the sealing member 210 is referred to as a display area DA. Also, pixels are formed in the display area DA to display images.

The size of the sealing member 210 is smaller than that of the display panel 110 . Also, the driver 2 may be installed in an edge of a side of the display panel 110 not covered by the sealing member 210 .

Conductive wiring 3 electrically connecting the driver 2 and elements formed in the space sealed by the sealant 1 is formed at the edge of the display panel 110 . Therefore, the conductive wiring 3 can be formed to partially overlap the sealant 1 .

As illustrated in FIG. 2, one pixel may include red R, green G, blue B organic emission layers 230, and column spacers 330 are arranged in the pixels of the non-display area 325 along opposite sides of the area of each organic emission layer 230. on the defined layer 310 . Also, the signal blocking metal wiring 320 is commonly formed to overlap opposite sides of the organic emission layer 230 .

As illustrated in FIG. 3 , an insulating layer 340 for preventing electrical connection between the second electrode 240 and the signal blocking metal wiring 320 may be further included on the signal blocking metal wiring 320 . The signal blocking metal wirings 320 commonly formed on the organic emission layer 230 are connected to each other at one side of the non-display region 325 so as to be connected to the driver 2 . In this way, the signal blocking metal wiring 320 forms a mesh. Also, the signal blocking metal wiring 320 may be formed in a rectangular planar shape.

Referring to FIG. 3 , a switching thin film transistor (not shown), a driving thin film transistor 80 , a capacitor element 16 and an organic light emitting diode 200 are included on the display panel 110 formed for each pixel. Further included on the display panel 110 are gate lines arranged in one direction, data lines insulated from and intersecting the gate lines, and common wires. Here, one pixel may be defined based on boundaries of gate lines, data lines, and common lines, but is not limited thereto.

The organic light emitting diode 200 includes a first electrode 220 , an organic emission layer 230 formed on the first electrode 220 and a second electrode 240 formed on the organic emission layer 230 . Here, the first electrode 220 is an anode (positive (+) electrode), which is a hole injection electrode, and the second electrode 240 is a cathode (negative (−) electrode), which is an electron injection electrode. Holes and electrons are respectively injected from the first electrode 220 and the second electrode 240 into the organic emission layer 230 to form excitons. Light emission occurs when the excitons change from an excited state to a ground state.

A pixel defining layer 310 having an opening through which the first electrode 220 is exposed is provided on the display panel 110 . The column spacer 330 may be provided on the pixel defining layer 310 of the non-display area 325 of the display panel 110 . The second electrode 240 may be disposed while extending on the organic emission layer 230 and the column spacer 330 .

The capacitor element 16 includes a first capacitor plate 12 and a second capacitor plate 14 with an interlayer insulating layer 140 interposed therebetween. Here, the insulating interlayer 140 may be a dielectric body. Capacitance is determined by the charge stored by capacitor element 16 and the voltage between both capacitor plates 12 and 14 .

The driving thin film transistor 80 applies driving power for causing the organic emission layer 230 of the selected pixel to emit light to the first electrode 220 . The drive gate electrode 70 is connected to the first capacitor plate 12 . Each of the driving source electrode 50 and the second capacitor plate 14 is connected to the common wire 18 . The driving drain electrode 60 is connected to the first electrode 220 of the organic light emitting diode 200 through the electrode contact hole.

The display panel 110 may be formed as an insulating panel formed of glass, quartz, ceramics, plastic, or the like. But the present invention is not limited thereto. Therefore, the display panel 110 may also be formed as a metal panel formed of stainless steel or the like.

The buffer layer 120 is formed on the display panel 110 . The buffer layer 120 prevents impurity elements from penetrating the surface of the display panel 110 and also planarizes the surface of the display panel 110 . The buffer layer 120 may be formed of various materials capable of performing the aforementioned functions. For example, any one of a silicon nitride (SiNx) film, a silicon oxide (SiO ₂ ) film, and a silicon oxynitride (SiO _x N _y ) film can be used as the buffer layer 120 . However, the buffer layer 120 is not necessary but may be omitted according to the type of the display panel 110 and process conditions.

The driving semiconductor layer 40 is formed on the buffer layer 120 . The driving semiconductor layer 40 is formed of a polysilicon film. Also, the driving semiconductor layer 40 includes a channel region 10 not doped with impurities therein, a source region 20 and a drain region 30 formed by P+ doping both sides of the channel region 10 . In this case, the doped ion material is a P-type impurity such as boron (B), and B ₂ H ₆ may be used as the doped ion material. Here, the impurities depend on the type of thin film transistor.

In an exemplary embodiment, a thin film transistor having a PMOS structure using P-type impurities is used as the driving thin film transistor 80, but the present invention is not limited thereto. Therefore, a thin film transistor having an NMOS structure or a CMOS structure can be used as the driving thin film transistor 80 . Also, the driving thin film transistor 80 may be a polysilicon thin film transistor including a polysilicon film.

A gate insulating layer 130 formed of silicon nitride (SiN _x ), silicon oxide (SiO ₂ ), or the like is formed on the driving semiconductor layer 40 . Gate wiring including the driving gate electrode 70 is formed on the gate insulating layer 130 . Also, the gate wiring further includes a gate line, the first capacitor plate 12 and other wiring. Also, the driving gate electrode 70 is formed so as to overlap at least a portion of the driving semiconductor layer 40 which may include the channel region 10 .

An interlayer insulating film 140 covering the driving gate electrode 70 is formed on the gate insulating layer 130 . The gate insulating layer 130 and the interlayer insulating layer 140 commonly have a through hole through which the source region 20 and the drain region 30 of the driving semiconductor layer 40 are exposed. The interlayer insulating layer 140 is formed using a ceramic-based material such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ), similar to the gate insulating layer 130 .

Data wiring including the driving source electrode 50 and the driving drain electrode 60 is formed on the interlayer insulating layer 140 . Also, the data wiring further includes a data line, a common wire 18, a second capacitor plate 14, and other wiring. Also, the driving source electrode 50 and the driving drain electrode 60 are respectively connected to the source region 20 and the drain region 30 of the driving semiconductor layer 40 through via holes formed in the interlayer insulating layer 140 and the gate insulating layer 130 .

As described above, the driving thin film transistor 80 including the driving semiconductor layer 40 , the driving gate electrode 70 , the driving source electrode 50 and the driving drain electrode 60 is formed. The configuration of the driving thin film transistor 80 is not limited to the foregoing example, but may be variously modified to a well-known configuration easily implemented by those skilled in the art.

A planarization film 150 covering the data wiring is formed on the interlayer insulating layer 140 . The planarization film 150 is used to remove steps and planarize the interlayer insulating layer 140 to improve luminous efficiency of the organic light emitting diode 200 to be formed on the planarization film 150 . Also, the planarization film 150 has an electrode contact hole through which a part of the driving drain electrode 60 is exposed.

The planarizing film 150 can be made of acrylate resin, epoxy resin, carbolic acid resin, polyamide resin, polyindene resin, unsaturated polyester resin, polyethylene phenylene resin, polyethylene polyphenylene sulfide resin, and benzocyclidine Formation of any one of the vinyl (BCB) resins.

Also, exemplary embodiments are not limited to the aforementioned structure, but any one of the planarization film 150 and the interlayer insulating layer 140 may also be omitted.

The first electrode 220 of the organic light emitting diode 200 is formed on the planarization film 150 . That is, the organic light emitting diode display 100 includes each of the first electrodes 220 respectively arranged at each of the pixels. In this case, the first electrodes 220 are spaced apart from each other. The first electrode 220 is connected to the driving drain electrode 60 through the electrode contact hole in the planarization film 150 .

A pixel defining layer 310 having an opening through which the first electrode 220 is exposed is formed on the planarization film 150 . That is, the pixel defining layer 310 has an opening formed at each pixel. Also, the first electrode 220 is arranged to correspond to the opening of the pixel defining layer 310 . However, the first electrode 220 does not need to be disposed only at the opening of the pixel defining layer 310 , but may be disposed under the pixel defining layer 310 so that a part of the first electrode 220 overlaps the pixel defining layer 310 . The pixel defining layer 310 may be formed of a resin such as polyacrylate resin or polyimide resin, or a silicon-based inorganic material.

The organic emission layer 230 is formed on the first electrode 220 , and the second electrode 240 is formed on the organic emission layer 230 . As described above, the organic light emitting diode 200 including the first electrode, the organic emission layer 230 and the second electrode 240 is formed.

The organic emission layer 230 is formed of a low molecular weight organic material or a high molecular weight organic material. Also, the organic emission layer 230 may be formed of a multilayer including one or more of an emission layer, a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). . When the organic emission layer 230 includes all layers, a hole injection layer (HIL) is disposed on the first electrode 220 as an anode, a hole transport layer (HTL), an emission layer, an electron transport layer (ETL), and an electron injection layer ( EIL) are sequentially stacked on top of it.

In FIG. 3 , the organic emission layer 230 is disposed only within the opening of the pixel defining layer 310 , but exemplary embodiments are not limited thereto. Accordingly, the organic emission layer 230 may be formed on the first electrode 220 within the opening of the pixel defining layer 310 , or may also be disposed between the pixel defining layer 310 and the second electrode 240 . The organic emission layer 230 may further include (together with the emission layer) several layers such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). In this case, the hole injection layer (HIL), the hole transport layer (HTL), the electron transport layer (ETL), and the electron injection layer (EIL) (except for the emission layer) can be passed through the layer similar to the second electrode 240 The opening mask is formed not only on the first electrode 220 but also on the pixel defining layer 310 during the manufacturing process. That is, one or more layers among several layers included in the organic emission layer 230 may be disposed between the pixel defining layer 310 and the second electrode 240 .

Each of the first electrode 220 and the second electrode 240 may be formed of a transparent conductive material, or a transflective or reflective conductive material. According to the type of material forming the first electrode 220 and the second electrode 240, the organic light emitting diode display 100 may be a top emission type, a bottom emission type, or a dual emission type.

Indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In ₂ O ₃ ) can be used as the transparent conductive material. Lithium (Li), calcium (Ca), lithium fluoride/calcium (LiF/Ca), lithium fluoride/aluminum (LiF/Al), aluminum (Al), silver (Ag), magnesium (Mg), gold (Au), etc. Can be used as reflective material and transflective material.

The sealing member 210 is disposed to face the display panel 110 on the second electrode 240 . The sealing member 210 may be formed of a transparent material such as glass or plastic. The sealing member 210 is bonded to the display panel 110 to be sealed by the sealant 1 (shown in FIG. 1 ) formed along the edge of the sealing member 210 .

Signal blocking metal wirings 320 are provided on upper portions of both side edges of the organic emission layer 230 between the first electrode 220 and the second electrode 240 . The signal blocking metal wiring 320 cuts off power applied to the display when a short circuit occurs due to contact between the first electrode 220 and the second electrode 240 caused by pressing the column spacer 330 by an external force, and the signal blocking metal wiring 320 It may be located at both edges of the first electrode 220 . Also, the signal blocking metal wiring 320 may be provided to be in contact with the second electrode 240 at an opposite side of the first electrode 220 . Also, an insulating layer 340 may be further included on the signal blocking metal wiring 320 . That is, the signal blocking metal wiring 320 may be provided to be in contact with the insulating layer 340 at the opposite side of the organic emission layer 230 .

The signal blocking metal wiring 320 may extend in one direction at a position overlapping the pixel defining layer 310 corresponding to the non-display area 325 of the pixel. Also, the respective extended signal blocking metal wirings 320 are connected to each other at one side of the non-display region 325 of the pixel at the outermost non-display region 325 arranged in the sealing member 210 to be connected to the driver 2 . When the voltage is applied to the display 100 by the power-on signal of the driver 2, and the first electrode 220 contacts the second electrode 240 due to external pressure or collision squeezing the column spacer 330, the power-on signal is blocked by the signal blocking metal wiring 320, To prevent power from being applied to the transistor element 80 . Accordingly, it is possible to prevent occurrence of burning in the display 100 when a short circuit occurs between the first electrode 220 and the second electrode 240 .

As illustrated in FIG. 4 , the signal blocking metal wiring 320 may be formed in a mesh shape by connecting a portion of the wiring extending from a position corresponding to the non-display area 325 of the pixel. As illustrated in FIG. 2 , the mesh-type signal blocking metal wiring 320 is connected to the driver 2, and may be connected to the driver 2 at both sides of the wiring extending from a position corresponding to the non-display area 325 of the pixel in the outermost area. . That is, when a short circuit is generated in any one pixel due to the collapse of the column spacer 330 or the generation of a collision, the power supplied by the power-up signal is not directly applied from the driver 2 to the display, and the path of the power-up signal is diverted through loop, so that the power is cut off by the power down signal, so it doesn't drive the whole display.

As described above, in the display according to the exemplary embodiment, it is possible to prevent local combustion of the display from being generated when a short circuit is generated between the cathode and the anode due to the collapse of the column spacer due to the external force applied to the display panel. Defects in organic light-emitting diode displays.

It will be apparent to those skilled in the art that various modifications and changes can be made in the present invention without departing from the spirit or scope of the inventions. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims (9)

1. an organic light emitting diode display, comprising:

Display floater;

Be arranged in the first electrode in the viewing area of described display floater, each first electrode is electrically connected to transistor, and this transistor is connected to gate wirings and data wiring;

Arrange pixel confining layers on said display panel, described pixel confining layers comprises opening, and described first electrode is exposed by this opening;

Arrange organic emission layer on the first electrode;

Row distance piece on the non-display area being arranged in described display floater and in described pixel confining layers;

Be arranged in the second electrode on described organic emission layer and described row distance piece; And

Signal barrier metal distribution on the opposite side being arranged in described organic emission layer and between described first electrode and described second electrode.

2. organic light emitting diode display as claimed in claim 1, comprises further:

Insulating barrier, is arranged on described signal barrier metal distribution, and is configured to prevent the electrical connection between described second electrode and described signal barrier metal distribution.

3. organic light emitting diode display as claimed in claim 1, wherein said signal barrier metal distribution is connected to driver, and be configured to when described first electrode and described second electric pole short circuit, by shutoff voltage is sent to described second electrode from described driver, and cut off the electric power supplied to described organic light emitting diode display.

4. organic light emitting diode display as claimed in claim 1, wherein said signal barrier metal distribution is arranged between the opposite side of described organic emission layer and described row distance piece.

5. organic light emitting diode display as claimed in claim 1, the second electrode described in wherein said signal barrier metal wiring contacts.

6. organic light emitting diode display as claimed in claim 2, insulating barrier described in wherein said signal barrier metal wiring contacts.

7. organic light emitting diode display as claimed in claim 1, wherein said signal barrier metal distribution extends from position corresponding with the non-display area of pixel respectively in one direction.

8. organic light emitting diode display as claimed in claim 7, the end of wherein said signal barrier metal distribution comprises the net formed by being connected by the distribution extended from position corresponding with the non-display area of described pixel respectively in one direction.

9. organic light emitting diode display as claimed in claim 1, wherein said signal barrier metal distribution is formed with rectangular planar shape.