CN104202092A - Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication - Google Patents
Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication Download PDFInfo
- Publication number
- CN104202092A CN104202092A CN201410477542.8A CN201410477542A CN104202092A CN 104202092 A CN104202092 A CN 104202092A CN 201410477542 A CN201410477542 A CN 201410477542A CN 104202092 A CN104202092 A CN 104202092A
- Authority
- CN
- China
- Prior art keywords
- circuit
- chip
- module
- optical
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Optical Communication System (AREA)
Abstract
Disclosed is a receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication. A CMOS technology is adopted, and a main control module, an optical transmitting module, an optical receiving module, a power source module and a functional circuit comprising an A/D (analog/digital) conversion unit and an internal storage unit are effectively integrated in one chip; for the power source module, a DC-DC (direct current-direct current) circuit and an LDO (low dropout regulator) circuit are combined, so that conversion efficiency is improved, entire power consumption of the chip is lowered, and power source quality is guaranteed; an CDR circuit has three states and manual and automatic detection modes, so that a user can achieve the best state of equilibrium of performance and power consumption under different application scenarios. The design of the three-in-one chip for the SFP+ high-speed photoelectric communication is effectively implemented, the BOM size and cost of an SFP+ module are reduced on the basis of not sacrificing performance and power consumption, board level circuit design of the user is further simplified, difficulty in design is lowered, and production cycle is shortened.
Description
Technical field
The present invention relates to SPF+ system field, concrete, relate to the communication of a kind of SFP+ of being applicable to high speed optoelectronic sending and receiving, control three-in-one chip.
Background technology
Along with popularizing of optical communication technique, people are more and more higher for the requirement of speed.SFP+ (Small Form-factor Pluggables), as a kind of specification of high speed small size, receives increasing concern.And due to the requirement of cost, volume and power consumption etc., SFP+ single-chip solution becomes the focus that people pay close attention to.
In order to reduce BOM cost and the outer member quantity of PCB, some chip manufacturer has developed the two-in-one opto-electronic conversion chip of transmitting terminal laser driver and the combination of receiving terminal limiting amplifier.
But because market competition is more and more fierce, optical module manufacturer is bearing the pressure that reduces product price for many years always, market is in the urgent need to a three-in-one high performance chips group with high integration, low cost and low-power consumption characteristic.
SFP+ chip manufacturer mainly adopts SiGe technology at present, but this technology cannot be used for manufacturing and realize MCU Main Processing Unit, and cost is very high, therefore, do not having on the market similarly chip solution three-in-one to optical transmission module, Optical Receivers and main control module.
Therefore, how integrated MCU Main Processing Unit, takes into account chip performance, reaches and reduces SFP+ module machine volume, cost, and the even object of power consumption, becomes a focus of SFP+ single-chip solution.
Summary of the invention
The object of the invention is to propose the communication of a kind of SFP+ of being applicable to high speed optoelectronic sending and receiving, control three-in-one chip implementing method, effectively needed SFP+ module transmitter, receiver and MCU Main Processing Unit are integrated on a chip, do not sacrificing on the basis of performance and power consumption, reduce BOM volume and the cost of SFP+ module, and then the board-level circuit of simplifying user designs, reduce design difficulty, shorten the production cycle.
For reaching this object, the present invention by the following technical solutions:
The sending and receiving of a kind of SFP+ of being applicable to high speed optoelectronic communication, control three-in-one chip, it is characterized in that: adopt CMOS manufacturing process, by the Optical Receivers in SFP+ high speed optical communication, optical transmission module, main control module, power module with comprise that other functional module of A/D converting unit and internal storage unit is integrated in sending and receiving, controls in three-in-one chip.
Preferably, described CMOS manufacturing process, is CMOS 28-90nm technique.
Preferably, described main control module comprises MCU Main Processing Unit, described MCU Main Processing Unit is connected with Optical Receivers and optical transmission module, by relevant parameter control Optical Receivers and optical transmission module, realize analysis, processing, control and the transmission of coherent signal, input signal and output signal are compensated and adjusted;
Described optical transmission module, comprise laser driver element, clock data recovery circuit CDR and automated power control unit, be used for controlling light emission component described input electrical signal is converted to output optical signal, described automated power control unit, the target light power of the Output optical power obtaining by light emission component and described MCU Main Processing Unit setting compares and draws analog voltage signal, and be sent to described laser driver element, described laser driver element, for generating corresponding bias current and modulated current according to described analog voltage signal, and be used for driving light emission component that outside input electrical signal is converted to described output optical signal, also integrated clock data recovery circuit CDR of described laser driver element, for recovering from passing the electrical signal data of coming in the clock embedding, then carry out data bit alignment according to the clock recovering,
Described Optical Receivers, comprise amplitude limiting amplifier circuit unit and clock data recovery circuit CDR, be used for controlling optical fiber receive module input optical signal is converted to output electrical signals, described amplitude limiting amplifier circuit unit, carry out three grades of amplifications to generate described output electrical signals for the signal of telecommunication that optical fiber receive module is changed out, and this output electrical signals is sent to outside electric interface unit; Described amplitude limiting amplifier circuit unit is also integrated with described clock data recovery circuit CDR, and the clock for recovering to embed from data equally, then carries out data bit alignment according to the clock recovering.
Preferably, described A/D converting unit, for the analog signal of external voltage, temperature, received optical power, utilizing emitted light power, bias current etc. is converted to digital signal, completes digital diagnosis function jointly with MCU Main Processing Unit; Described internal storage unit is for storage program and data.
Preferably, described power module comprises DC-DC circuit and LDO circuit, and external power source first carries out transformation one time by the higher DC-DC circuit of conversion efficiency, converts low voltage to, reaches the object of saving power consumption; The voltage again DC-DC being converted to, carries out secondary conversion by the LDO circuit of low noise, supplies with internal circuit and uses, and reaches the object that improves power quality.
Further preferably, described power module comprises LDO_DIG circuit, DC-DC circuit, with the LDO_RX circuit and the LDO_TX circuit that are connected with described DC-DC circuit, described LDO_RX circuit is connected with Optical Receivers, described LDO_TX circuit is connected with optical transmission module, and described LDO_DIG circuit is directly given described MCU Main Processing Unit power supply.
Preferably, in the parameter designing of voltage conversion circuit, the magnitude of voltage that DC-DC circuit conversion need to be obtained, presses close to the supply power voltage that chip internal circuit needs as far as possible.
Preferably, described ce circuit has normal, bypass and tri-kinds of states of powered-down,
Described normal state, represents that ce circuit can carry out Clock Extraction and position alignment operation to the data of input,
Described bypass state, represents that ce circuit only has rate detection function, and can not carry out Clock Extraction and position alignment operation to the data of input,
Described powered-down state, represents that ce circuit is in closed condition.
Further preferably, described ce circuit has pattern and/or autosensing mode is manually set.
Enter while manually pattern being set, user can carry out opening and closing CDR, and when unlatching, CDR acquiescence is operated in normal pattern, can carry out Clock Extraction and position alignment operation to the data of input, and when closing, CDR is in powered-down state;
While entering autosensing mode, CDR can detect input data rate, and in the time data rate being detected lower than 14.025Gb/s, CDR is operated in bypass pattern, circuit only has rate detection function, but can not carry out Clock Extraction and position alignment operation to the data of input; In the time system data rates being detected greater than or equal to 14.025Gb/s, CDR is operated in normal pattern.
Therefore, the invention discloses the communication of a kind of SFP+ of being applicable to high speed optoelectronic sending and receiving, control three-in-one chip, by using CMOS technique, effectively by needed SFP+ module three parts: Optical Receivers, optical transmission module and MCU main control module are integrated on a chip, simultaneously integrated also including power control unit, comprise other correlation function circuit A/D converting unit and internal storage unit.And by the selection of processing procedure, and the design of the internal electric source control unit that combines of DC-DC circuit and LDO circuit uses, and can take into account the demand of performance, cost and power consumption.Finally reach and reduce SFP+ module BOM volume and cost, reduce design difficulty, shorten the object of production cycle.
Brief description of the drawings
Fig. 1 is according to the sending and receiving of a specific embodiment of the present invention, controls the structured flowchart of three-in-one chip;
Fig. 2 is according to the sending and receiving of another specific embodiment of the present invention, controls the structured flowchart that the employing 1.5V of three-in-one chip is intermediate voltage;
Fig. 3 is according to the sending and receiving of another specific embodiment of the present invention, controls the chip power conversion block diagram that the employing 1.5V of three-in-one chip is intermediate voltage;
Fig. 4 is according to the sending and receiving of another specific embodiment of the present invention, controls the chip power conversion block diagram that the employing 1.8V of three-in-one chip is intermediate voltage.
The technical characterictic that Reference numeral in figure refers to is respectively:
1, optical transmission module; 2, Optical Receivers; 3, main control module; 4, power module; 5, outside electric interface unit; 101, laser driver element/CDR; 102, automated power control unit; 201, amplitude limiting amplifier circuit unit/CDR; 301, MCU Main Processing Unit; 302, A/D converting unit; 303, internal storage unit; 401, DC-DC circuit; 402, LDO_TX circuit; 403, LDO_RX circuit; 404, LDO_DIG circuit.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, in accompanying drawing, only show part related to the present invention but not entire infrastructure.
Embodiment 1:
To, by optical transmission module, Optical Receivers and main control module, integrate, must consider manufacturing process and the cost of these three modules.Referring to Fig. 1, show according to the sending and receiving of a specific embodiment of the present invention, control the structured flowchart of three-in-one chip.The present invention adopts CMOS manufacturing process, by the optical transmission module in SFP+ high speed optical communication 1, Optical Receivers 2 and main control module 3, and power module 4 and comprise that other functional module of A/D converting unit 302 and internal storage unit 303 is integrated in sending and receiving, controls in three-in-one chip.Therefore, with respect to Si-Ge technique of the prior art, SFP+ sending and receiving of the present invention, control three-in-one integrated chip and solved the problem of implementation of the logic function of MCU Main Processing Unit, thereby do not sacrificing on the basis of performance and power consumption, reduce BOM volume and the cost of SFP+ module, and then simplify user's board-level circuit design, and reduce design difficulty, shorten the production cycle.
As everyone knows, the characteristic size of CMOS technique is less, and volume is less, and speed is faster, and power consumption is lower, but corresponding, and manufacturing cost is also higher.In actual application, designer needs synthesise various factor to choose a kind of best CMOS processing procedure.For the high speed sfp+chip that is greater than 10G for speed, for example, be the three-in-one integrated chip of SFP+ of 10G or 14G for speed, can choose the manufacturing process of 28nm-90nm, be preferably the technique of 90nm.90nm manufacturing process not only can reach requirement completely on speed and volume, and technology is quite ripe, and cost is also lower.Certainly, also can choose more advanced technique, such as realizations such as 55nm, 40nm, 28nm, but corresponding cost also can increase thereupon.
If the manufacturing process of choosing more than 90nm characteristic size is realized, in performance and power consumption, be difficult to reach standard.
Embodiment 2:
Referring to Fig. 1, and adopt CMOS 90nm technique to make, described three-in-one chip comprises optical transmission module 1, Optical Receivers 2 and main control module 3, and power module 4 and comprise A/D converting unit 302 and internal storage unit 303, match with external light emission component and optical fiber receive module, composition SFP+ module.
Wherein, described main control module comprises MCU Main Processing Unit 301, described MCU Main Processing Unit 301 is connected with optical transmission module 1 and Optical Receivers 2, by relevant parameter control optical transmission module 1 and Optical Receivers 2, realize analysis, processing, control and the transmission of coherent signal, input signal and output signal are compensated and adjusted, determine function and the performance index of SFP+ module at receiving terminal and transmitting terminal.
Preferably, described MCU Main Processing Unit 301 is also connected with A/D converting unit 302, and the digital diagnosis signal that A/D converting unit 302 is generated is carried out data processing, finally sends digital diagnosis signal by outside electric interface unit 5 to telecommunication device.
Described optical transmission module 1, comprise laser driver element 101, clock data recovery circuit CDR and automated power control unit 102, be used for controlling light emission component described input electrical signal is converted to output optical signal, described automated power control unit 102, the target light power that the Output optical power obtaining by light emission component and described MCU Main Processing Unit 301 arrange compares and draws analog voltage signal, and is sent to described laser driver element 101; Described laser driver element, for generating corresponding bias current and modulated current according to described analog voltage signal, and is used for driving light emission component that outside input electrical signal is converted to described output optical signal; Also integrated clock data recovery circuit CDR of described laser driver element, for recovering from passing the electrical signal data of coming in the clock embedding, then carries out data bit alignment according to the clock recovering.
Described Optical Receivers 2, comprise amplitude limiting amplifier circuit unit 201 and clock data recovery circuit CDR, be used for controlling optical fiber receive module input optical signal is converted to output electrical signals, described amplitude limiting amplifier circuit unit 201, carry out three grades of amplifications to generate described output electrical signals for the signal of telecommunication that optical fiber receive module is changed out, and this output electrical signals is sent to outside electric interface unit; Described amplitude limiting amplifier circuit unit 201 is also integrated with described clock data recovery circuit CDR, and the clock for recovering to embed from data equally, then carries out data bit alignment according to the clock recovering.
In concrete application, external modulation signal enters SFP+ module by outside electric interface unit, be sent to the laser driver element/ce circuit of chip internal, be sent to after treatment the light emission component of chip exterior, so control light emission component produce light signal by Optical Fiber Transmission in optical communication network.On the other hand, light signal in optical communication network arrives optical fiber receive module by Optical Fiber Transmission, optical fiber receive module is converted to the signal of telecommunication by light signal and imports chip into, and through processing such as amplification and Clock Extraction data shapings, the signal of telecommunication is sent to external system by outside electric interface unit the most at last.Wherein, MCU Main Processing Unit can, by providing voltage signal to make laser driver element/ce circuit produce corresponding bias current and modulated current, also can compensate and process input/output signal by relevant parameters such as equalizer, preemphasis in adjustment Optical Receivers and optical transmission module.
Preferably, described A/D converting unit 302 receives the characterization signals such as utilizing emitted light power, received optical power, temperature, operate outside voltage and the bias current of the associated monitoring circuit of light emission component, optical fiber receive module, temperature sensor (inner or outside) and inside, and the analog signal of above-mentioned transmission is converted to digital signal passes to MCU Main Processing Unit, MCU Main Processing Unit is according to these data analysis and processing, the result obtaining is transferred to remote equipment, is convenient to be shown to user; On the other hand, also can utilize these results that obtain to carry out automated power control, put the operation such as RxLos and TxFault.
Described internal storage unit is for storage program and data.
Embodiment 3:
According to SFF 8431 specifications, SFP+ chip requires power consumption to be less than 1W, and client is also at the product of constantly seeking more low-power consumption.In the prior art, often more low-power consumption is had in mind on functional circuit, caused circuit to connect complicated, difficulty uprises, and it is large that risk becomes.
The present invention mainly has in mind on power supply circuits, first external power source is first carried out to transformation one time by the higher DC-DC circuit of conversion efficiency, converts low voltage to, reaches the object of saving power consumption; The voltage again DC-DC being converted to, carries out secondary conversion by the LDO circuit of low noise, supplies with internal circuit and uses, and reaches the object that improves power quality.
Referring to Fig. 2, show according to the sending and receiving of another specific embodiment of the present invention, control the structured flowchart that the employing 1.5V of three-in-one chip is intermediate voltage.
Described power module 4 comprises LDO_DIG circuit 404, DC-DC circuit 402, with two LDO circuit that are connected with described DC-DC circuit, two LDO circuit comprise LDO_RX circuit 403 and LDO_TX circuit 402, be connected with Optical Receivers 2 and optical transmission module 1 respectively, described LDO_DIG circuit 404, directly gives described MCU Main Processing Unit power supply.
Referring to Fig. 3, showing 1.5V is the chip power conversion block diagram of intermediate voltage.The input voltage of SFP+ chip is 3.3V, is first an intermediate voltage 1.5V by DC-DC circuit conversion, then goes out 1.2V by LDO_TX and LDO_RX circuit conversion respectively, supplies with sending module and receiver module and uses.
The conversion efficiency of DC-DC circuit is generally 85% left and right, and the electric current of LDO input and output is constant, therefore, and the ratio that the ratio of its power conversion efficiency is output voltage.
According to above-mentioned design, the final service efficiency of the power supply of this programme is:
85％*(1.2/1.5)＝68％ (1)
If do not add DC-DC circuit, directly use LDO circuit to be converted to 1.2V from 3.3V, the service efficiency of power supply is:
(1.2/3.3)*100％＝36.4％ (2)
Therefore, visible, the technology of employing DC-DC circuit and the combination of LDO circuit, had both made the service efficiency of power supply be greatly improved, and had ensured again final power quality.
Because DC-DC circuit working needs the regular hour, and MCU Main Processing Unit need to enter operating state faster, and the operating current of MCU Main Processing Unit is less, therefore, generally for the power supply of MCU Main Processing Unit, can not pass through DC-DC circuit.Therefore, the present invention also has LDO_DIG circuit, directly gives described MCU Main Processing Unit power supply.
Embodiment 4:
Referring to Fig. 4, showing 1.8V is the chip power conversion block diagram of intermediate voltage.The same CMOS 90nm manufacturing process that adopts embodiment 1, the operating voltage of chip internal circuit is elected 1.2V as.
If the voltage that we are converted to DC-DC is set as 1.8V, be the 3.3V of SFP+ chip input voltage, be first an intermediate voltage 1.8V by DC-DC circuit conversion, and then go out 1.2V by LDO_TX and LDO_RX circuit conversion and supply with respectively optical transmission module and Optical Receivers and use.
Now final power supply service efficiency is:
85％*(1.2/1.8)＝56.7％ (3)
Can see, power supply service efficiency is lower than embodiment 3, therefore in the parameter designing of voltage conversion circuit, the magnitude of voltage that DC-DC circuit conversion need to be obtained, press close to as far as possible the supply power voltage that chip internal circuit needs, promote to greatest extent power supply service efficiency, and then reduce the overall power of SFP+ module.
Embodiment 5:
The same CMOS 90nm manufacturing process that adopts embodiment 1, the operating voltage of chip internal circuit is elected 1.2V as.
Because ce circuit has certain power consumption, and for the application lower than 10G lower than data rate, do not need the participation of CDR.Meanwhile, can be applied to the SFP+ module of high-speed communication, requirement can be backward compatible compared with the communication of low rate.Therefore, three-in-one chip of the present invention, for balanced module performance and power consumption reach a more suitable point, ce circuit should be able to or open or close with concrete applied environment (at different rates).In the present embodiment, select 14.025Gb/s as boundary.In the time that speed is more than or equal to 14.025Gb/s, open ce circuit, in the time that speed is less than 14.025Gb/s, close ce circuit.
Described ce circuit has normal, bypass and tri-kinds of states of powered-down.
Described normal state, represents that ce circuit can carry out Clock Extraction and position alignment operation to the data of input.
Described bypass state, represents that ce circuit only has rate detection function, and can not carry out Clock Extraction and position alignment operation to the data of input.
Described powered-down state, represents that ce circuit is in closed condition.
Preferably, ce circuit has manual setting and two kinds of different control modes of autosensing mode.
By manual setting, user can carry out opening and closing CDR.When unlatching, CDR acquiescence is operated in normal pattern, can carry out Clock Extraction and position alignment operation to the data of input.When closing, CDR is in powered-down state.
In the time that CDR opens, can open autosensing mode, CDR can detect input data rate, in the time data rate being detected lower than 14.025Gb/s, CDR is operated in bypass pattern, circuit only has rate detection function, but can not carry out Clock Extraction and position alignment operation to the data of input; In the time system data rates being detected greater than or equal to 14.025Gb/s, CDR is operated in normal pattern.
Therefore, the present invention is by adopting CMOS technology to replace SiGe technique, by main control module, optical transmission module, Optical Receivers, power module, effectively be integrated on a chips with other functional circuit that comprises A/D converting unit and internal storage unit etc., and by the selection of suitable manufacturing process, reach the equilibrium of performance, cost and power consumption.For the low-power consumption demand of SFP+ module, adopt the technology of DC-DC circuit and the combination of LDO circuit, in completing power supply conversion, improve conversion efficiency and reduced the overall power of chip, and ensured the quality of power supply.Meanwhile, the CDR of sending controling unit inside also has three kinds of states, manually and automatically detects two kinds of set-up modes, facilitates user to be issued to the optimum balance state of performance and power consumption at different application scenarioss.
The present invention can effectively realize the three-in-one single chip design may of SFP+ high speed optoelectronic communication, do not sacrificing on the basis of performance and power consumption, reducing BOM volume and the cost of SFP+ module, and then simplifying user's board-level circuit design, reduce design difficulty, shorten the production cycle.
Above content is in conjunction with concrete preferred implementation further description made for the present invention; can not assert that the specific embodiment of the present invention only limits to this; for general technical staff of the technical field of the invention; without departing from the inventive concept of the premise; can also make some simple deduction or replace, all should be considered as belonging to the present invention and determine protection range by submitted to claims.
Claims (10)
1. be applicable to the communication of SFP+ high speed optoelectronic sending and receiving, control a three-in-one chip, it is characterized in that:
Adopt CMOS manufacturing process, by the Optical Receivers in SFP+ high speed optical communication, optical transmission module, main control module, power module with comprise that other functional module of A/D converting unit and internal storage unit is integrated in sending and receiving, controls in three-in-one chip.
2. sending and receiving according to claim 1, control three-in-one chip, it is characterized in that:
Described CMOS manufacturing process is CMOS 28-90nm technique.
3. sending and receiving according to claim 1, control three-in-one chip, it is characterized in that:
Described main control module comprises MCU Main Processing Unit, described MCU Main Processing Unit is connected with Optical Receivers and optical transmission module, by relevant parameter control Optical Receivers and optical transmission module, realize analysis, processing, control and the transmission of coherent signal, input signal and output signal are compensated and adjusted;
Described optical transmission module, comprise laser driver element, clock data recovery circuit CDR and automated power control unit, be used for controlling light emission component described input electrical signal is converted to output optical signal, described automated power control unit, the target light power of the Output optical power obtaining by light emission component and described MCU Main Processing Unit setting compares and draws analog voltage signal, and be sent to described laser driver element, described laser driver element, for generating corresponding bias current and modulated current according to described analog voltage signal, and be used for driving light emission component that outside input electrical signal is converted to described output optical signal, also integrated clock data recovery circuit CDR of described laser driver element, for recovering from passing the electrical signal data of coming in the clock embedding, then carry out data bit alignment according to the clock recovering,
Described Optical Receivers, comprise amplitude limiting amplifier circuit unit and clock data recovery circuit CDR, be used for controlling optical fiber receive module input optical signal is converted to output electrical signals, described amplitude limiting amplifier circuit unit, carry out three grades of amplifications to generate described output electrical signals for the signal of telecommunication that optical fiber receive module is changed out, and this output electrical signals is sent to outside electric interface unit; Described amplitude limiting amplifier circuit unit is also integrated with described clock data recovery circuit CDR, and the clock for recovering to embed from data equally, then carries out data bit alignment according to the clock recovering.
4. sending and receiving according to claim 3, control three-in-one chip, it is characterized in that:
Described A/D converting unit, for the analog signal of external voltage, temperature, received optical power, utilizing emitted light power, bias current etc. is converted to digital signal, completes digital diagnosis function jointly with MCU Main Processing Unit;
Described internal storage unit is for storage program and data.
5. sending and receiving according to claim 1, control three-in-one chip, it is characterized in that:
Described power module comprises DC-DC circuit and LDO circuit,
External power source first carries out transformation one time by the higher DC-DC circuit of conversion efficiency, converts low voltage to, reaches the object of saving power consumption; The voltage again DC-DC being converted to, carries out secondary conversion by the LDO circuit of low noise, supplies with internal circuit and uses, and reaches the object that improves power quality.
6. sending and receiving according to claim 5, control three-in-one chip, it is characterized in that:
Described power module comprises LDO_DIG circuit, DC-DC circuit, with the LDO_RX circuit and the LDO_TX circuit that are connected with described DC-DC circuit, described LDO_RX circuit is connected with Optical Receivers, described LDO_TX circuit is connected with optical transmission module, described LDO_DIG circuit, directly gives described MCU Main Processing Unit power supply.
7. sending and receiving according to claim 6, control three-in-one chip, it is characterized in that:
In the parameter designing of voltage conversion circuit, the magnitude of voltage that DC-DC circuit conversion need to be obtained, presses close to the supply power voltage that chip internal circuit needs as far as possible.
8. sending and receiving according to claim 3, control three-in-one chip, it is characterized in that:
Described ce circuit has normal, bypass and tri-kinds of states of powered-down,
Described normal state, represents that ce circuit can carry out Clock Extraction and position alignment operation to the data of input,
Described bypass state, represents that ce circuit only has rate detection function, and can not carry out Clock Extraction and position alignment operation to the data of input,
Described powered-down state, represents that ce circuit is in closed condition.
9. sending and receiving according to claim 8, control three-in-one chip, it is characterized in that:
Described ce circuit has pattern and/or autosensing mode is manually set.
10. sending and receiving according to claim 9, control three-in-one chip, it is characterized in that:
Enter while manually pattern being set, user can carry out opening and closing CDR, and when unlatching, CDR acquiescence is operated in normal pattern, can carry out Clock Extraction and position alignment operation to the data of input, and when closing, CDR is in powered-down state;
While entering autosensing mode, CDR can detect input data rate, and in the time data rate being detected lower than 14.025Gb/s, CDR is operated in bypass pattern, circuit only has rate detection function, but can not carry out Clock Extraction and position alignment operation to the data of input; In the time system data rates being detected greater than or equal to 14.025Gb/s, CDR is operated in normal pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410477542.8A CN104202092A (en) | 2014-09-18 | 2014-09-18 | Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410477542.8A CN104202092A (en) | 2014-09-18 | 2014-09-18 | Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104202092A true CN104202092A (en) | 2014-12-10 |
Family
ID=52087331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410477542.8A Pending CN104202092A (en) | 2014-09-18 | 2014-09-18 | Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104202092A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104503037A (en) * | 2014-12-16 | 2015-04-08 | 昂纳信息技术（深圳）有限公司 | Optical transceiver module |
| CN105915292A (en) * | 2016-04-08 | 2016-08-31 | 武汉华工正源光子技术有限公司 | 28G SFP packaged optical module |
| CN106253990A (en) * | 2016-09-05 | 2016-12-21 | 飞昂通讯科技南通有限公司 | A kind of high-speed low-power-consumption light transceiving chip |
| CN108650071A (en) * | 2018-05-22 | 2018-10-12 | 联想(北京)有限公司 | A kind of communication control method, communication controler and electronic equipment |
| CN108880674A (en) * | 2018-08-28 | 2018-11-23 | 成都新易盛通信技术股份有限公司 | A kind of optical module for local loopback test |
| CN112968732A (en) * | 2019-12-13 | 2021-06-15 | 海思光电子有限公司 | Photoelectric signal converter and network interaction equipment |
| CN113609804A (en) * | 2021-07-27 | 2021-11-05 | 西安芯海微电子科技有限公司 | Case generation method and device, test method and testability design method |
| CN113640922A (en) * | 2020-04-24 | 2021-11-12 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN114614669A (en) * | 2022-03-18 | 2022-06-10 | 成都亿芯源半导体科技有限公司 | Power supply configuration scheme capable of reducing overall power consumption and cost of driving chip of EML laser |
| CN114785413A (en) * | 2022-03-30 | 2022-07-22 | 山东华云光电技术有限公司 | Optical module with automatic adjustment balanced gain circuit |
| WO2023108794A1 (en) * | 2021-12-16 | 2023-06-22 | 厦门亿芯源半导体科技有限公司 | Configuration scheme for dfb laser diode direct-current coupling output power supply with adjustable voltage difference |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101098077A (en) * | 2007-06-25 | 2008-01-02 | 福建师范大学 | A beacon terminal power circuit with high power stability and wide adaptability |
| CN101185247A (en) * | 2005-03-07 | 2008-05-21 | 菲尼萨公司 | Xfp transceiver with 8.5g cdr bypass |
| CN101394230A (en) * | 2008-10-30 | 2009-03-25 | 武汉电信器件有限公司 | Intelligent 10Gbps pluggable light transceiving module and main work flow thereof |
| CN102299620A (en) * | 2010-06-24 | 2011-12-28 | 安凯(广州)微电子技术有限公司 | Voltage conversion circuit and handheld device |
| CN202189170U (en) * | 2011-08-29 | 2012-04-11 | 青岛海信宽带多媒体技术有限公司 | Low-cost plug-in optical module |
| CN202256890U (en) * | 2011-09-09 | 2012-05-30 | 利尔达科技有限公司 | 3D glasses hardware system |
| CN102545574A (en) * | 2010-12-27 | 2012-07-04 | 北京中电华大电子设计有限责任公司 | Low-power consumption power network designing method for system on chip (SOC) chip |
| US20120177380A1 (en) * | 2004-01-14 | 2012-07-12 | Peter De Dobbelaere | Novel Low-Cost Transceiver Approach |
| CN202652227U (en) * | 2012-04-28 | 2013-01-02 | 张敬彬 | Bidirectional fiber optical transceiver and bidirectional fiber optical transceiver chip |
| CN103269217A (en) * | 2013-01-21 | 2013-08-28 | 威盛电子股份有限公司 | output buffer |
| CN103414465A (en) * | 2013-06-03 | 2013-11-27 | 上海华力微电子有限公司 | Dynamic second-order low-pass filter applied to charge pump phase-locked loop |
| CN103490626A (en) * | 2013-09-30 | 2014-01-01 | 中国科学技术大学 | Charge pump based on shunt feedback |
| CN203590233U (en) * | 2013-12-04 | 2014-05-07 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN203734676U (en) * | 2014-03-12 | 2014-07-23 | 索尔思光电（成都）有限公司 | CDR-power-supplying SFP+ light module |
| CN104052548A (en) * | 2014-06-20 | 2014-09-17 | 武汉鑫森华科技产业发展有限公司 | Small pluggable optical module used for electrical equipment communication |
-
2014
- 2014-09-18 CN CN201410477542.8A patent/CN104202092A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120177380A1 (en) * | 2004-01-14 | 2012-07-12 | Peter De Dobbelaere | Novel Low-Cost Transceiver Approach |
| CN101185247A (en) * | 2005-03-07 | 2008-05-21 | 菲尼萨公司 | Xfp transceiver with 8.5g cdr bypass |
| CN101098077A (en) * | 2007-06-25 | 2008-01-02 | 福建师范大学 | A beacon terminal power circuit with high power stability and wide adaptability |
| CN101394230A (en) * | 2008-10-30 | 2009-03-25 | 武汉电信器件有限公司 | Intelligent 10Gbps pluggable light transceiving module and main work flow thereof |
| CN102299620A (en) * | 2010-06-24 | 2011-12-28 | 安凯(广州)微电子技术有限公司 | Voltage conversion circuit and handheld device |
| CN102545574A (en) * | 2010-12-27 | 2012-07-04 | 北京中电华大电子设计有限责任公司 | Low-power consumption power network designing method for system on chip (SOC) chip |
| CN202189170U (en) * | 2011-08-29 | 2012-04-11 | 青岛海信宽带多媒体技术有限公司 | Low-cost plug-in optical module |
| CN202256890U (en) * | 2011-09-09 | 2012-05-30 | 利尔达科技有限公司 | 3D glasses hardware system |
| CN202652227U (en) * | 2012-04-28 | 2013-01-02 | 张敬彬 | Bidirectional fiber optical transceiver and bidirectional fiber optical transceiver chip |
| CN103269217A (en) * | 2013-01-21 | 2013-08-28 | 威盛电子股份有限公司 | output buffer |
| CN103414465A (en) * | 2013-06-03 | 2013-11-27 | 上海华力微电子有限公司 | Dynamic second-order low-pass filter applied to charge pump phase-locked loop |
| CN103490626A (en) * | 2013-09-30 | 2014-01-01 | 中国科学技术大学 | Charge pump based on shunt feedback |
| CN203590233U (en) * | 2013-12-04 | 2014-05-07 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN203734676U (en) * | 2014-03-12 | 2014-07-23 | 索尔思光电（成都）有限公司 | CDR-power-supplying SFP+ light module |
| CN104052548A (en) * | 2014-06-20 | 2014-09-17 | 武汉鑫森华科技产业发展有限公司 | Small pluggable optical module used for electrical equipment communication |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104503037A (en) * | 2014-12-16 | 2015-04-08 | 昂纳信息技术（深圳）有限公司 | Optical transceiver module |
| CN105915292A (en) * | 2016-04-08 | 2016-08-31 | 武汉华工正源光子技术有限公司 | 28G SFP packaged optical module |
| CN105915292B (en) * | 2016-04-08 | 2019-03-05 | 武汉华工正源光子技术有限公司 | A kind of optical module of 28G SFP encapsulation |
| CN106253990A (en) * | 2016-09-05 | 2016-12-21 | 飞昂通讯科技南通有限公司 | A kind of high-speed low-power-consumption light transceiving chip |
| CN106253990B (en) * | 2016-09-05 | 2019-07-16 | 飞昂创新科技南通有限公司 | A kind of high-speed low-power-consumption light transceiving chip |
| CN108650071A (en) * | 2018-05-22 | 2018-10-12 | 联想(北京)有限公司 | A kind of communication control method, communication controler and electronic equipment |
| CN108880674A (en) * | 2018-08-28 | 2018-11-23 | 成都新易盛通信技术股份有限公司 | A kind of optical module for local loopback test |
| CN108880674B (en) * | 2018-08-28 | 2023-08-22 | 成都新易盛通信技术股份有限公司 | An optical module for local loopback testing |
| CN112968732B (en) * | 2019-12-13 | 2022-07-29 | 海思光电子有限公司 | Photoelectric signal converter and network interaction equipment |
| CN112968732A (en) * | 2019-12-13 | 2021-06-15 | 海思光电子有限公司 | Photoelectric signal converter and network interaction equipment |
| CN113640922A (en) * | 2020-04-24 | 2021-11-12 | 青岛海信宽带多媒体技术有限公司 | Optical module |
| CN113609804A (en) * | 2021-07-27 | 2021-11-05 | 西安芯海微电子科技有限公司 | Case generation method and device, test method and testability design method |
| CN113609804B (en) * | 2021-07-27 | 2023-10-20 | 西安芯海微电子科技有限公司 | Case generation method and device, test method and testability design method |
| WO2023108794A1 (en) * | 2021-12-16 | 2023-06-22 | 厦门亿芯源半导体科技有限公司 | Configuration scheme for dfb laser diode direct-current coupling output power supply with adjustable voltage difference |
| CN114614669A (en) * | 2022-03-18 | 2022-06-10 | 成都亿芯源半导体科技有限公司 | Power supply configuration scheme capable of reducing overall power consumption and cost of driving chip of EML laser |
| CN114614669B (en) * | 2022-03-18 | 2022-12-06 | 成都亿芯源半导体科技有限公司 | Power supply configuration scheme capable of reducing overall power consumption and cost of driving chip of EML laser |
| CN114785413A (en) * | 2022-03-30 | 2022-07-22 | 山东华云光电技术有限公司 | Optical module with automatic adjustment balanced gain circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104202092A (en) | Receiving, transmitting and controlling three-in-one chip applicable to SFP (small form-factor pluggable) + high-speed photoelectric communication | |
| CN102213806B (en) | Temperature control type 10G 80km SFP+ (enhanced 8.5 and 10 gigabit small form factor pluggable module) optical module with low power consumption | |
| WO2011056233A8 (en) | High speed communication | |
| CN101527602B (en) | Transmit-receive integrated optical module and plastic optical fiber communication system | |
| CN203590233U (en) | Optical module | |
| CN202841143U (en) | 40GE CFP optical module compatible with LR4 and ER4 | |
| CN101394230A (en) | Intelligent 10Gbps pluggable light transceiving module and main work flow thereof | |
| CN205430254U (en) | Transmission rate 32Kbps~80Mbps receives and dispatches integrative SFP optical module | |
| CN102739318B (en) | The small form factor pluggable transmitting-receiving unification optical module of polymer optical fiber communication | |
| CN208903424U (en) | A kind of internet of things data acquisition module | |
| CN102386967B (en) | Reverse biasing circuit of dual channel optical module avalanche photodiode | |
| CN105915292B (en) | A kind of optical module of 28G SFP encapsulation | |
| US20160079936A1 (en) | Trans-impedance amplifier arrangement and control module | |
| CN205430253U (en) | Low rate DC~20Mbps receives and dispatches integrative SFP optical module | |
| CN103762938A (en) | Intelligent power source management circuit applicable to optical energy supply system | |
| CN103310618A (en) | Household appliance control system based on Android and Arduino | |
| CN106470071A (en) | A kind of infrared communication system | |
| CN202772900U (en) | Output level control circuit for digital optical receiver | |
| CN116192267A (en) | Data transmission device based on optical fiber | |
| CN209283248U (en) | 100Gbps optical module | |
| CN202582726U (en) | Digital illumination sensor device based on zigbee technology | |
| CN102571205B (en) | The transmission method of free space optical communication FSO signal and system | |
| CN103647605B (en) | SFP + optical module | |
| CN105846903A (en) | Low-speed rate DC-20Mbps receiving-transmitting integrated SFP optical module | |
| CN112073122A (en) | Intelligent power grid optical communication module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20141210 |