CN104184575A - Rikitake-system-based four-dimensional non-balance-point hyperchaotic system and simulation circuit - Google Patents

Abstract

The invention provides a four-dimensional non-balance-point hyperchaotic system based on a three-dimensional Rikitake chaotic system and a simulation circuit. An operational amplifier U1, an operational amplifier U2, a resistor and a capacitor are used to form an inverting adder and an inverting integrator. Multiplication is achieved through a multiplying unit U3, a multiplying unit U4 and a multiplying unit U5. Constant input is achieved through a 1 V direct current power source. The LF347N is adopted for the operational amplifier U1 and the operational amplifier U2. The AD633JN is adopted for the multiplying unit U3, the multiplying unit U4 and the multiplying unit U5. The operational amplifier U1 is connected with the operational amplifier U2, the multiplying unit U3 and the multiplying unit U4. The operational amplifier U2 is connected with the multiplying unit U5, the direct current power source and the operational amplifier U1. The multiplying unit U3 is connected with the operational amplifier U1. The multiplying unit U4 is connected with the operational amplifier U1. The multiplying unit U5 is connected with the operational amplifier U2. The 1 V direct current power source is connected with the operational amplifier U2. The four-dimensional non-balance-point hyperchaotic system is put forward on the basis of the three-dimensional Rikitake chaotic system and is implemented through the simulation circuit, and a new method and thought are provided for the chaotic system to be applied to communication and other engineering fields.

Description

The four-dimension based on Rikitake system is without balance point hyperchaotic system and analog circuit

Technical field

The present invention relates to a chaos system and analog circuit, particularly one based on three-dimensional Rikitake chaos system without balance point hyperchaotic system and analog circuit.

Background technology

At present, the hyperchaotic system that oneself has is generally on the basis of three-dimensional chaotic system with three balance points, increase one dimension, formation has the four-dimensional hyperchaotic system that has a balance point at least, four-dimensional hyperchaotic system without balance point is not also suggested, the present invention is on the basis of three-dimensional Rikitake chaos system, a four-dimensional hyperchaotic system without balance point has been proposed, and realize with analog circuit, for chaos system, be applied to the engineering fields such as communication a kind of new method and thinking are provided.

Summary of the invention

The technical problem to be solved in the present invention be to provide a kind of based on three-dimensional Rikitake chaos system without balance point hyperchaotic system and analog circuit, the present invention adopts following technological means to realize goal of the invention:

1, the four-dimension based on Rikitake chaos system, without balance point hyperchaotic system, is characterized in that being, comprises the following steps:

(1) three-dimensional Rikitake chaos system i is:

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xt}\end{array}& i& \mathrm{\μ}=2,a=5\end{array}\right.$

(2) on the basis of three-dimensional Rikitake chaos system i, increase a differential equation dw/dt=-kx, and w is fed back on first equation of system i, obtain chaos system ii

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}+w\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xy}\\ \mathrm{dw}/\mathrm{dt}=-\mathrm{dk}\end{array}& \mathrm{ii}& \mathrm{\μ}=2,a=5,k=0.05\end{array}\right.$

(3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3, U4 and U5 to realize multiplying, utilize 1V DC power supply to realize constant input, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3, U4 and U5 adopt AD633JN;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.

2, the four-dimension based on Rikitake chaos system, without the analog circuit of balance point hyperchaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4, multiplier U5 and 1V DC power supply, consists of;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2, described operational amplifier U1 and operational amplifier U2 adopt LF347D, and described multiplier U3, U4 and U5 adopt AD633JN;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U4, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin of U1, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.

Useful fruit of the present invention is: on the basis of three-dimensional Rikitake chaos system, a four-dimensional hyperchaotic system without balance point has been proposed, and realize with analog circuit, for chaos system, be applied to the engineering fields such as communication a kind of new method and thinking are provided.

Accompanying drawing explanation

Fig. 1 is the circuit connection structure schematic diagram of the preferred embodiment of the present invention.

Fig. 2 and Fig. 3 are the actual connection layout of circuit of the present invention.

Embodiment

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, referring to Fig. 1-Fig. 3.

1, the four-dimension based on Rikitake chaos system, without balance point hyperchaotic system, is characterized in that being, comprises the following steps:

(1) three-dimensional Rikitake chaos system i is:

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xt}\end{array}& i& \mathrm{\μ}=2,a=5\end{array}\right.$

(2) on the basis of three-dimensional Rikitake chaos system i, increase a differential equation dw/dt=-kx, and w is fed back on first equation of system i, obtain chaos system ii

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}+w\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xy}\\ \mathrm{dw}/\mathrm{dt}=-\mathrm{dk}\end{array}& \mathrm{ii}& \mathrm{\μ}=2,a=5,k=0.05\end{array}\right.$

(3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3, U4 and U5 to realize multiplying, utilize 1V DC power supply to realize constant input, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3, U4 and U5 adopt AD633JN;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.

2, the four-dimension based on Rikitake chaos system, without the analog circuit of balance point hyperchaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4, multiplier U5 and 1V DC power supply, consists of;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2, described operational amplifier U1 and operational amplifier U2 adopt LF347D, and described multiplier U3, U4 and U5 adopt AD633JN;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U4, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin of U1, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.

Resistance R 1=R12=100k Ω in circuit, R2=R3=R5=R6=R7=R8=R11=10k Ω, R4=R10=50k Ω, R9=20k Ω, R13=2000k Ω, C1=C2=C3=C4=10nF.

Certainly, above-mentioned explanation is not limitation of the present invention, and the present invention is also not limited only to above-mentioned giving an example, and the variation that those skilled in the art make in essential scope of the present invention, remodeling, interpolation or replacement, also belong to protection scope of the present invention.

Claims (2)

1. the four-dimension based on Rikitake system, without balance point hyperchaotic system, is characterized in that being, comprises the following steps:

(1) Rikitake three-dimensional chaotic system i is:

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xt}\end{array}& i& \mathrm{\μ}=2,a=5\end{array}\right.$

(2) on the basis of three-dimensional chaotic system i, increase a differential equation dw/dt=-kx, and w is fed back on first equation of system i, obtain chaos system ii

$\left\{\begin{array}{ccc}\begin{array}{c}\mathrm{dx}/\mathrm{dt}=-\mathrm{\μx}+\mathrm{yz}+w\\ \mathrm{dy}/\mathrm{dt}=-\mathrm{\μy}+(z-a)x\\ \mathrm{dz}/\mathrm{dt}=1-\mathrm{xy}\\ \mathrm{dw}/\mathrm{dt}=-\mathrm{dk}\end{array}& \mathrm{ii}& \mathrm{\μ}=2,a=5,k=0.05\end{array}\right.$

(3) according to without balance point hyperchaotic system ii constructing analog Circuits System, utilize operational amplifier U1, operational amplifier U2 and resistance and electric capacity to form anti-phase adder and inverting integrator, utilize multiplier U3, U4 and U5 to realize multiplying, utilize 1V DC power supply to realize constant input, described operational amplifier U1 and operational amplifier U2 adopt LF347N, and described multiplier U3, U4 and U5 adopt AD633JN;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U5, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.

2. the four-dimension based on Rikitake system, without the analog circuit of balance point hyperchaotic system, is characterized in that being, operational amplifier U1, operational amplifier U2 and multiplier U3, multiplier U4, multiplier U5 and 1V DC power supply, consists of;

Described operational amplifier U1 concatenation operation amplifier U2, multiplier U3 and multiplier U4, described operational amplifier U2 connects multiplier U5, DC power supply and operational amplifier U1, described multiplier U3 concatenation operation amplifier U1, described multiplier U4 concatenation operation amplifier U1, described multiplier U5 concatenation operation amplifier U2, described 1V DC power supply concatenation operation amplifier U2, described operational amplifier U1 and operational amplifier U2 adopt LF347D, and described multiplier U3, U4 and U5 adopt AD633JN;

The 1st pin of described operational amplifier U1 joins by resistance R 6 and the 2nd pin, by resistance R 8 and the 6th pin, join, the 3rd, 5, 10, 12 pin ground connection, the 4th pin meets VCC, the 11st pin meets VEE, the 6th pin joins by capacitor C 2 and the 7th pin, the 7th pin meets output y, by resistance R 10 and the 6th pin, join, connect the 1st pin of multiplier U3, connect the 3rd pin of multiplier U5, the 8th pin output x, by capacitor C 1 and the 9th pin, join, connect the 1st pin of multiplier U4, connect the 1st pin of multiplier U4, by resistance R 9 and the 6th pin, join, by resistance R 4 and the 9th pin of U1, join, by resistance R 13 and the 6th pin of U2, join, the 13rd pin joins by resistance R 3 and the 14th pin, the 14th pin joins by resistance R 5 and the 9th pin,

The 1st, 2,13,14 pins of described operational amplifier U2 are unsettled, 3rd, 5,10,12 pin ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, the 6th pin joins by capacitor C 4 and the 7th pin, the 7th pin output w, joins by resistance R 1 and the 13rd pin of U1, and the 8th pin meets output z, connect the 3rd pin of multiplier U3, connect the 3rd pin of multiplier U4, the 9th pin joins by capacitor C 3 and the 8th pin, by resistance R 12, connects ground connection after 1V power supply;

The 1st pin of described multiplier U3 connects the 7th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 13rd pin by resistance R 2, and the 8th pin meets VCC;

The 1st pin of described multiplier U4 connects the 8th pin of U1, and the 3rd pin connects the 8th pin of U2, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U1 the 2nd pin by resistance R 7, and the 8th pin meets VCC.

The 1st pin of described multiplier U5 connects the 8th pin of U1, and the 3rd pin connects the 7th pin of U1, the equal ground connection of the 2nd, 4,6 pin, and the 5th pin meets VEE, and the 7th pin connects U2 the 9th pin by resistance R 11, and the 8th pin meets VCC.