CN104135404B - A kind of method for realizing the detection of CFM medium-high frequencies continuity - Google Patents

Abstract

The present invention provides a method for realizing CFM medium and high frequency continuity detection, comprising: dividing MEPs on the FPGA into several MEP groups; creating a MEP fault state table corresponding to the MEP group, and each bit of the MEP fault state table corresponds to a MEP current state Fault status; the corresponding MEP group creates an interrupt flag bit table; the CPU traverses the interrupt flag bit table, and if the interrupt flag bit is 1, a CPU interrupt is generated to traverse the corresponding MEP group, inform the user of the MEP failure, and clear the corresponding interrupt flag bit. After adopting the method of the present invention, if the current MEP group has a fault, the corresponding flag is 1, and a CPU interrupt is generated to traverse the MEPs of the corresponding MEP group, instead of traversing all MEPs. The time of MEP is greatly reduced, which greatly reduces the burden on the CPU.

Description

A Method to Realize Middle and High Frequency Continuity Detection of CFM

technical field

The invention relates to Ethernet operation, management and maintenance based on the IEEE802.1ag standard, in particular to a method for realizing CFM medium and high frequency continuity detection.

Background technique

Continuity Check (CC, Continuity Check) function is one of the most basic and important functions in CFM, which provides the possibility for the realization of CFM.

The idea of CC function realization is: after the network environment is established and configured with the corresponding correct Ethernet operation, management and maintenance (OAM, Operation Administration and Maintains) configuration, local maintenance in the same maintenance set (MA, Maintenance Associations) The set endpoint (MEP, Maintenance Associations EndPoint) will send a CCM (Continuity Check Message) to all other non-local MEPs; at the same time, other non-local MEPs will also send CCMs to all peers. Note that the CC function is unidirectional, that is to say, a MEP only sends periodically and does not expect to get a reply. When the local MEP receives the CCM sent from the remote end, it first checks whether the information in the CCM is valid, and if it is valid, then compares it with the locally stored MEP CCM database. If there is no entry for the MEP, it learns the content in the CCM to create a New MEP entry; no action if present. At this point, a bidirectionally connected link is guaranteed.

The IEEE802.1ag protocol defines the sending interval of CCM as 3.33 milliseconds, 10 milliseconds, 100 milliseconds, 1 second, 10 seconds, 1 minute, and 10 minutes. For the CCM interval period less than 1 second, the common practice in the industry is to realize it through FPGA (Field-Programmable Gate Array). As shown in Figure 1, the MEP (Maintenance association End Point) is deployed on the FPGA, so that the MEP can support a 3.33 millisecond CCM cycle, that is, 3.33 milliseconds to send a CCM, and 10 milliseconds to detect a link failure and notify the CPU through an interrupt. The problem with this solution is that MEP specifications cannot be too many. If there are too many MEP specifications, and each MEP detects a link fault within a short period of time, the resulting interruption will impact the CPU and affect the operation of other services.

Contents of the invention

In view of this, a method for realizing high-frequency continuity detection in CFM and reducing the CPU burden is provided.

A method for realizing high-frequency continuity detection in CFM, comprising:

According to the MEP on the FPGA, it is divided into several MEP groups;

Create a MEP fault state table corresponding to the MEP group, and each bit of the MEP fault state table corresponds to a current fault state of a MEP;

Corresponding MEP team creates interrupt flag bit table;

The CPU traverses the interrupt flag bit table. If the interrupt flag bit is 1, a CPU interrupt is generated to traverse the corresponding MEP group, inform the user of the MEP failure, and clear the corresponding interrupt flag bit.

Preferably, every 64 MEPs is an MEP group.

Preferably, when the MEP fault state table changes, the corresponding interrupt flag bit is set to 1.

Preferably, the step of traversing the interrupt flag bit table of the CPU specifically includes:

When the interrupt flag bit is 1, a CPU interrupt is generated;

The CPU traverses the MEP group corresponding to the interrupt flag bit;

Read the current MEP fault state table, and XOR with the fault state table read last time, inform the user of the MEP whose MEP fault has changed, and save the current MEP fault state;

Clear the corresponding interrupt flag bit.

Preferably, the method for implementing CFM mid-high frequency continuity detection further includes: querying the MEP fault status of the MEP group according to user requirements.

After adopting the method of the present invention, MEPs are grouped, according to the MEP failure status table, if the current MEP group does not have a MEP failure, the corresponding interrupt flag bit is not 1, and the CPU does not need to traverse it to check whether there is a MEP failure, if the current MEP group When there is a fault, the corresponding flag bit is 1, and a CPU interrupt is generated to traverse the MEPs of the corresponding MEP group, instead of traversing all MEPs. Especially when the MEP specification is large, the time for the CPU to traverse the MEPs is greatly reduced, and the CPU burden.

Description of drawings

FIG. 1 is a schematic diagram of an existing method for realizing CFM medium and high frequency continuity detection;

Fig. 2 is the flow chart of the method for realizing CFM middle and high frequency continuity detection of the present invention;

FIG. 3 is a specific method flowchart of step S400 in FIG. 2 .

detailed description

In order to enable those skilled in the art to better understand the technical solutions of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, but not all of them.

The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

Referring to Fig. 2, the method for realizing the high-frequency continuity detection in CFM in an embodiment provided by the present invention includes:

Step S100, divide into several MEP groups according to the MEPs on the FPGA;

On FPGAs, MEPs have different specifications. For example, the specification of the MEP may be 1K or 4K.

In a preferred implementation manner, every 64 MEPs is a MEP group, that is, if the specification of 4K is used, it can be divided into 64 MEP groups. It can be understood that 128 MEPs can also be one MEP group, depending on the specifications of the FPGA.

Step S200, the corresponding MEP group creates a MEP fault state table, and each bit of the MEP fault state table corresponds to a current fault state of a MEP;

"1" in the MEP fault status table indicates that the corresponding MEP is faulty, and "0" indicates that the MEP is normal. The MEP fault status is constantly changing, but only when the CPU is interrupted to read, can the current MEP fault status be known.

Step S300, the corresponding MEP group creates an interrupt flag bit table;

In the interrupt flag bit table, "1" indicates that a CPU interrupt needs to be generated to traverse the corresponding MEP group, and "0" indicates that a CPU interrupt does not need to be generated. Set the corresponding interrupt flag bit to 1 when the MEP fault state table changes.

In step S400, the CPU traverses the interrupt flag table. If the interrupt flag is 1, a CPU interrupt is generated to traverse the corresponding MEP group, inform the user of the MEP failure, and clear the corresponding interrupt flag.

When the CPU traverses the interrupt flag bit table, if the interrupt flag bit is 1, a CPU interrupt is generated to traverse the corresponding MEP group, and the user is notified of the MEP failure so that the staff can repair and clear the corresponding interrupt flag bit.

In a preferred embodiment, referring to FIG. 3, step S400 includes:

Step S401, generating a CPU interrupt when the interrupt flag bit is 1;

Step S402, the CPU traverses the MEP group corresponding to the interrupt flag bit;

Step S403, read the current MEP fault state table, and XOR with the fault state table read last time, inform the user of the MEP whose MEP fault has changed, and save the current MEP fault state;

Step S404, clearing the corresponding interrupt flag bit.

Through steps S401-S404, the CPU interrupts to traverse the MEP group, reads the MEP fault state table, compares the current MEP fault state with the last MEP fault state, and can clearly understand the MEP whose MEP fault state has changed, and inform the user.

In a preferred embodiment, the method for implementing the CFM middle-frequency continuity detection further includes: querying the MEP fault status of the MEP group according to user requirements.

In the above steps, when the CPU interrupts to traverse the MEP group corresponding to the interrupt flag bit, it will only notify the user of the MEP whose MEP fault status has changed, and not the others. At this time, if the user wants to know the fault status of other MEPs, he can generate The CPU interrupts to query the corresponding MEP group, and notifies the user of the MEP fault status of all members of the MEP group.

After adopting the method of the present invention, MEPs are grouped, according to the MEP failure status table, if the current MEP group does not have a MEP failure, the corresponding interrupt flag bit is not 1, and the CPU does not need to traverse it to check whether there is a MEP failure, if the current MEP group When there is a fault, the corresponding flag bit is 1, and a CPU interrupt is generated to traverse the MEPs of the corresponding MEP group, instead of traversing all MEPs. Especially when the MEP specification is large, the time for the CPU to traverse the MEPs is greatly reduced, and the CPU burden.

The above only expresses several embodiments of the present invention, and the description thereof is relatively specific and detailed, but should not be construed as limiting the patent scope of the present invention. It should be pointed out that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention should be based on the appended claims.

Claims (5)

1. A method for high-frequency continuity detection in realizing connectivity fault management CFM, is characterized in that, comprises: according to the maintenance set endpoint MEP on the FPGA, be divided into some MEP groups; Create a MEP fault state table corresponding to the MEP group, and each bit of the MEP fault state table corresponds to a current fault state of a MEP; Corresponding MEP team creates interrupt flag bit table; The CPU traverses the interrupt flag bit table. If the interrupt flag bit is 1, a CPU interrupt is generated to traverse the corresponding MEP group, inform the user of the MEP failure in the MEP group, and clear the corresponding interrupt flag bit. 2. the method for high-frequency continuity detection in realizing CFM according to claim 1, is characterized in that, the step of described CPU traversal interrupt flag bit table specifically comprises: When the interrupt flag bit is 1, a CPU interrupt is generated; The CPU traverses the MEP group corresponding to the interrupt flag bit; Read the current MEP fault state table, and XOR with the fault state table read last time, inform the user of the MEP whose MEP fault has changed, and save the current MEP fault state; Clear the corresponding interrupt flag bit. 3. The method for realizing CFM middle-frequency continuity detection according to claim 1, wherein every 64 MEPs is a MEP group. 4. the method for realizing the high-frequency continuity detection in CFM according to claim 1, is characterized in that, when the MEP fault status table changes, the corresponding interrupt flag bit is set as 1. 5. The method for realizing CFM mid-high frequency continuity detection according to claim 1, characterized in that, according to user requirements, query the MEP fault status of the MEP group.