CN104133751A - Chip debugging method and chip - Google Patents
Chip debugging method and chip Download PDFInfo
- Publication number
- CN104133751A CN104133751A CN201410384386.0A CN201410384386A CN104133751A CN 104133751 A CN104133751 A CN 104133751A CN 201410384386 A CN201410384386 A CN 201410384386A CN 104133751 A CN104133751 A CN 104133751A
- Authority
- CN
- China
- Prior art keywords
- register
- module
- host computer
- chip
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 33
- 230000002159 abnormal effect Effects 0.000 claims description 25
- 238000012545 processing Methods 0.000 claims description 10
- 238000012544 monitoring process Methods 0.000 abstract description 5
- 238000011084 recovery Methods 0.000 description 8
- 238000013461 design Methods 0.000 description 3
- 230000005856 abnormality Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Abstract
本发明公开了一种芯片,包括:寄存器代理模块、调试接口模块和多个底层模块;底层模块,用于如检测到本底层模块工作异常,则产生对应的错误指示信号,向寄存器代理模块发送错误通知;寄存器代理模块,用于如接收到底层模块发送的错误通知,则记录错误信息,向上位机发送错误报告;如接收到上位机发送的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果;调试接口模块,用于连接所述芯片和上位机,在所述寄存器代理模块和所述上位机之间转发信息。本发明能够在对芯片进行调试的过程中快速、精确定位bug位置,提高调试效率,实现对芯片运行状态的实时监控。本发明还公开了一种对芯片进行调试的方法。
The invention discloses a chip, comprising: a register agent module, a debugging interface module and a plurality of bottom modules; the bottom module is used to generate a corresponding error indication signal and send it to the register agent module if it detects that the bottom module is working abnormally. Error notification; the register agent module is used to record error information and send an error report to the upper computer if it receives an error notification sent by the underlying module; if it receives a register access command sent by the upper computer, it reads the corresponding register , return the reading result to the upper computer; the debugging interface module is used to connect the chip and the upper computer, and forward information between the register agent module and the upper computer. The invention can quickly and accurately locate the bug position in the process of debugging the chip, improve the debugging efficiency, and realize real-time monitoring of the running state of the chip. The invention also discloses a method for debugging the chip.
Description
技术领域technical field
本发明涉及集成电路设计领域,尤其涉及的是一种监控芯片的方法和芯片。The invention relates to the field of integrated circuit design, in particular to a method for monitoring a chip and the chip.
背景技术Background technique
随着半导体技术的发展,集成电路持续向更小的外型尺寸发展,使得每个芯片可以封装更多的电路,这就使得集成电路设计逻辑越来越复杂,设计调试过程出现bug时,精确定位bug原因比较困难,降低了调试的效率。With the development of semiconductor technology, integrated circuits continue to develop towards smaller dimensions, so that each chip can package more circuits, which makes the logic of integrated circuit design more and more complicated. When a bug occurs in the design and debugging process, the precise It is difficult to locate the cause of the bug, which reduces the efficiency of debugging.
因此,如何在系统调试出现bug后进行精确定位成为影响项目进程的关键。Therefore, how to accurately locate bugs after system debugging has become the key to affecting the project process.
发明内容Contents of the invention
本发明所要解决的技术问题是提供一种对芯片进行调试的方法和芯片,能够在对芯片进行调试的过程中快速、精确定位bug位置,提高调试效率,实现对芯片运行状态的实时监控。The technical problem to be solved by the present invention is to provide a method for debugging the chip and the chip, which can quickly and accurately locate the bug position during the debugging process of the chip, improve the debugging efficiency, and realize real-time monitoring of the running state of the chip.
为了解决上述技术问题,本发明提供了一种芯片,包括:寄存器代理模块、调试接口模块和多个底层模块;In order to solve the above technical problems, the present invention provides a chip, including: a register agent module, a debugging interface module and a plurality of bottom modules;
底层模块,用于如检测到本底层模块工作异常,则产生对应的错误指示信号,向寄存器代理模块发送错误通知;The underlying module is used to generate a corresponding error indication signal and send an error notification to the register agent module if it detects that the underlying module is working abnormally;
寄存器代理模块,用于如接收到底层模块发送的错误通知,则记录错误信息,向上位机发送错误报告;如接收到上位机发送的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果;The register agent module is used to record the error information and send an error report to the upper computer if it receives an error notification sent by the underlying module; The machine returns the read result;
调试接口模块,用于连接所述芯片和上位机,在所述寄存器代理模块和所述上位机之间转发信息。The debugging interface module is used to connect the chip and the upper computer, and forward information between the register agent module and the upper computer.
该芯片进一步包括下述特点:The chip further includes the following features:
所述读取结果指示工作异常的底层模块的信息和异常类型信息。The reading result indicates the information of the underlying module that is working abnormally and the abnormal type information.
进一步地,该芯片还包括下述特点:Further, the chip also includes the following features:
所述寄存器代理模块,还用于如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理。The register proxy module is further configured to write a corresponding register to perform abnormal recovery processing on the chip if it receives a register control instruction sent by the host computer.
进一步地,该芯片还包括下述特点:Further, the chip also includes the following features:
底层模块,用于如检测到本底层模块工作异常,则产生对应的错误指示信号,包括:The underlying module is used to generate a corresponding error indication signal if it detects that the underlying module is working abnormally, including:
如检测到本底层模块工作异常,则将本底层模块的本地错误寄存器中对应于所述异常类型的位置位;其中,所述本地错误寄存器中的每一位对应于一种异常类型;If it is detected that the underlying module is working abnormally, the position corresponding to the abnormal type in the local error register of the underlying module is set; wherein, each bit in the local error register corresponds to an abnormal type;
寄存器代理模块,用于如接收到底层模块发送的错误通知,则记录错误信息,包括:The register proxy module is used to record error information if an error notification sent by the underlying module is received, including:
如接收到底层模块发送的错误通知,则将全局错误寄存器中对应于所述底层模块的位置位;其中,所述全局错误寄存器中的每一位对应于一个底层模块。If the error notification sent by the bottom module is received, the bit corresponding to the bottom module in the global error register is set; wherein, each bit in the global error register corresponds to a bottom module.
进一步地,该芯片还包括下述特点:Further, the chip also includes the following features:
寄存器代理模块,用于如接收到上位机发送的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回操作结果,包括:The register proxy module is used to read the corresponding register and return the operation result to the host computer if it receives the register access instruction sent by the host computer, including:
接收上位机发送的对全局错误寄存器进行访问的指令,读取所述全局错误寄存器的值,将所述值返回给上位机;receiving an instruction from the host computer to access the global error register, reading the value of the global error register, and returning the value to the host computer;
接收上位机发送的对某个底层模块的本地错误寄存器进行访问的指令,读取所述本地错误寄存器的值,将所述值返回给上位机。An instruction for accessing a local error register of a bottom module sent by the host computer is received, the value of the local error register is read, and the value is returned to the host computer.
进一步地,该芯片还包括下述特点:Further, the chip also includes the following features:
调试接口模块,用于连接所述芯片和上位机,包括:通过采用JTAG接口或串口连接所述芯片和上位机。The debugging interface module is used to connect the chip and the upper computer, including: connecting the chip and the upper computer by using a JTAG interface or a serial port.
为了解决上述技术问题,本发明还提供了一种对芯片进行调试的方法,所述芯片包括:寄存器代理模块、调试接口模块和多个底层模块,该方法包括:In order to solve the above technical problems, the present invention also provides a method for debugging a chip, the chip comprising: a register agent module, a debugging interface module and a plurality of bottom modules, the method comprising:
底层模块如检测到本底层模块工作异常,则产生对应的错误指示信号,向寄存器代理模块发送错误通知;If the underlying module detects that the underlying module is working abnormally, it will generate a corresponding error indication signal and send an error notification to the register agent module;
寄存器代理模块如接收到底层模块发送的错误通知,则记录错误信息,通过调试接口模块向上位机发送错误报告;If the register agent module receives the error notification sent by the underlying module, it will record the error information and send an error report to the upper computer through the debugging interface module;
上位机如接收到来自所述芯片的错误报告,则通过所述调试接口模块向所述寄存器代理模块发送寄存器访问指令;If the host computer receives an error report from the chip, it sends a register access instruction to the register proxy module through the debugging interface module;
所述寄存器代理模块如接收到来自所述上位机的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果;If the register proxy module receives a register access instruction from the host computer, it reads the corresponding register and returns the read result to the host computer;
其中,所述调试接口模块用于连接所述芯片和上位机,在所述寄存器代理模块和所述上位机之间转发信息。Wherein, the debugging interface module is used to connect the chip and the upper computer, and forward information between the register agent module and the upper computer.
进一步地,该方法还包括下述特点:Further, the method also includes the following features:
所述读取结果指示工作异常的底层模块的信息和异常类型信息。The reading result indicates the information of the underlying module that is working abnormally and the abnormal type information.
进一步地,该方法还包括下述特点:Further, the method also includes the following features:
底层模块如检测到本底层模块工作异常,则产生对应的错误指示信号,包括:If the underlying module detects that the underlying module is working abnormally, it will generate a corresponding error indication signal, including:
底层模块如检测到本底层模块工作异常,则将本底层模块的本地错误寄存器中对应于所述异常类型的位置位;其中,所述本地错误寄存器中的每一位对应于一种异常类型;If the underlying module detects that the underlying module is working abnormally, the position corresponding to the abnormal type in the local error register of the underlying module is set; wherein, each bit in the local error register corresponds to an abnormal type;
寄存器代理模块如接收到底层模块发送的错误通知,则记录错误信息,包括:If the register agent module receives the error notification sent by the underlying module, it will record the error information, including:
寄存器代理模块如接收到底层模块发送的错误通知,则将全局错误寄存器中对应于所述底层模块的位置位;其中,所述全局错误寄存器中的每一位对应于一个底层模块。If the register agent module receives the error notification sent by the bottom module, it will set the position corresponding to the bottom module in the global error register; wherein, each bit in the global error register corresponds to a bottom module.
进一步地,该方法还包括下述特点:Further, the method also includes the following features:
所述寄存器代理模块如接收到来自所述上位机的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果,包括:If the register proxy module receives a register access instruction from the host computer, it will read the corresponding register and return the read result to the host computer, including:
所述寄存器代理模块接收上位机发送的对全局错误寄存器进行访问的指令,读取所述全局错误寄存器的值,将所述值返回给上位机;The register proxy module receives an instruction to access the global error register sent by the host computer, reads the value of the global error register, and returns the value to the host computer;
所述寄存器代理模块接收上位机发送的对某个底层模块的本地错误寄存器进行访问的指令,读取所述本地错误寄存器的值,将所述值返回给上位机。The register proxy module receives an instruction from the upper computer to access a local error register of a certain underlying module, reads the value of the local error register, and returns the value to the upper computer.
进一步地,该方法还包括下述特点:Further, the method also includes the following features:
上位机接收到芯片返回的读取结果后,还包括:After the host computer receives the reading result returned by the chip, it also includes:
上位机通过所述调试接口模块向所述寄存器代理模块发送寄存器控制指令;The host computer sends register control instructions to the register proxy module through the debugging interface module;
寄存器代理模块如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理。If the register proxy module receives the register control instruction sent by the host computer, it will write into the corresponding register to perform abnormal recovery processing on the chip.
进一步地,该方法还包括下述特点:Further, the method also includes the following features:
所述调试接口模块通过采用JTAG接口或串口连接所述芯片和上位机。The debugging interface module connects the chip and the upper computer by using a JTAG interface or a serial port.
与现有技术相比,本发明提供的一种对芯片进行调试的方法和芯片,芯片内的底层模块如检测到工作异常,则产生错误指示信号并通知芯片内的寄存器代理模块,寄存器代理模块接到通知后记录错误信息并通过调试接口模块向上位机发送错误报告,然后如接收到上位机发送的寄存器访问/控制指令,则对相应寄存器进行读取/写入操作,向上位机返回操作结果。本发明能够在对芯片进行调试的过程中快速、精确定位bug位置,提高调试效率,实现对芯片运行状态的实时监控。Compared with the prior art, the present invention provides a method for debugging a chip and the chip. If the underlying module in the chip detects an abnormal operation, it will generate an error indication signal and notify the register agent module in the chip. The register agent module After receiving the notification, record the error information and send an error report to the upper computer through the debugging interface module, and then if it receives a register access/control command sent by the upper computer, it will read/write the corresponding register and return to the upper computer. result. The invention can quickly and accurately locate the bug position in the process of debugging the chip, improve the debugging efficiency, and realize real-time monitoring of the running state of the chip.
附图说明Description of drawings
图1为本发明实施例的一种芯片的结构示意图。FIG. 1 is a schematic structural diagram of a chip according to an embodiment of the present invention.
图2为本发明实施例的一种对芯片进行调试的方法的流程图。FIG. 2 is a flowchart of a method for debugging a chip according to an embodiment of the present invention.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚明白,下文中将结合附图对本发明的实施例进行详细说明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互任意组合。In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.
如图1所示,本发明实施例提供了一种芯片,包括:寄存器代理模块、调试接口模块和多个底层模块;As shown in FIG. 1, the embodiment of the present invention provides a chip, including: a register agent module, a debugging interface module and a plurality of underlying modules;
底层模块,用于如检测到本底层模块工作异常,则产生对应的错误指示信号,向寄存器代理模块发送错误通知;The underlying module is used to generate a corresponding error indication signal and send an error notification to the register agent module if it detects that the underlying module is working abnormally;
寄存器代理模块,用于如接收到底层模块发送的错误通知,则记录错误信息,向上位机发送错误报告;如接收到上位机发送的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果;The register agent module is used to record the error information and send an error report to the upper computer if it receives an error notification sent by the underlying module; The machine returns the read result;
调试接口模块,用于连接所述芯片和上位机,在所述寄存器代理模块和所述上位机之间转发信息。The debugging interface module is used to connect the chip and the upper computer, and forward information between the register agent module and the upper computer.
该芯片进一步包括下述特点:The chip further includes the following features:
其中,底层模块可以通过检查各寄存器的状态获知是否工作异常。比如,底层模块如检查到FIFO寄存器溢出,则判断工作异常。Among them, the underlying module can know whether it is working abnormally by checking the status of each register. For example, if the underlying module checks that the FIFO register overflows, it will judge that the work is abnormal.
优选地,所述读取结果指示工作异常的底层模块的信息和异常类型信息。也即,所述寄存器访问指令用于获取工作异常的底层模块的信息以及异常类型信息;Preferably, the reading result indicates the information of the underlying module that is working abnormally and the abnormal type information. That is, the register access instruction is used to obtain the information of the underlying module that is working abnormally and the abnormal type information;
优选地,所述寄存器代理模块,还用于如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理。Preferably, the register agent module is further configured to, if receiving a register control instruction sent by the host computer, write to the corresponding register to perform exception recovery processing on the chip.
优选地,底层模块,用于如检测到本底层模块工作异常,则产生对应的错误指示信号,包括:Preferably, the underlying module is used to generate a corresponding error indication signal if it detects that the underlying module is working abnormally, including:
如检测到本底层模块工作异常,则将本底层模块的本地错误寄存器中对应于所述异常类型的位置位;其中,所述本地错误寄存器中的每一位对应于一种异常类型;也即,本地错误寄存器用于指示本底层模块是否工作异常以及出现了哪些类型的异常。If it is detected that the underlying module is working abnormally, the position corresponding to the abnormal type in the local error register of the underlying module is set; wherein, each bit in the local error register corresponds to an abnormal type; that is , the local error register is used to indicate whether the underlying module is working abnormally and what types of abnormalities have occurred.
优选地,寄存器代理模块,用于如接收到底层模块发送的错误通知,则记录错误信息,包括:Preferably, the register proxy module is configured to record error information if receiving an error notification sent by the underlying module, including:
如接收到底层模块发送的错误通知,则将全局错误寄存器中对应于所述底层模块的位置位;其中,所述全局错误寄存器中的每一位对应于一个底层模块;也即,全局错误寄存器用于指示各底层模块是否出现了工作异常;If the error notification sent by the bottom module is received, the position corresponding to the bottom module in the global error register is set; wherein, each bit in the global error register corresponds to a bottom module; that is, the global error register It is used to indicate whether there is an abnormality in the work of each underlying module;
优选地,寄存器代理模块,用于如接收到上位机发送的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回操作结果,包括:Preferably, the register agent module is used to read the corresponding register and return the operation result to the host computer if it receives the register access instruction sent by the host computer, including:
接收上位机发送的对全局错误寄存器进行访问的指令,读取所述全局错误寄存器的值,将所述值返回给上位机;receiving an instruction from the host computer to access the global error register, reading the value of the global error register, and returning the value to the host computer;
接收上位机发送的对某个底层模块的本地错误寄存器进行访问的指令,读取所述本地错误寄存器的值,将所述值返回给上位机。An instruction for accessing a local error register of a bottom module sent by the host computer is received, the value of the local error register is read, and the value is returned to the host computer.
其中,寄存器代理模块,用于如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理,包括:Wherein, the register proxy module is used to write the corresponding register to perform abnormal recovery processing on the chip if receiving the register control instruction sent by the host computer, including:
如接收到上位机发送的寄存器控制指令,所述指令中携带某个寄存器的地址和待写数据,则将所述待写数据写入所述寄存器中以对所述芯片进行异常恢复处理,如写入成功,则向所述上位机返回控制成功响应。If the register control instruction sent by the host computer is received, and the instruction carries the address of a certain register and the data to be written, the data to be written is written into the register to perform abnormal recovery processing on the chip, such as If the writing is successful, a control success response is returned to the host computer.
优选地,调试接口模块,用于连接所述芯片和上位机,包括:通过采用JTAG接口或串口连接所述芯片和上位机。Preferably, the debugging interface module, used to connect the chip and the host computer, includes: connecting the chip and the host computer by using a JTAG interface or a serial port.
如图2所示,本发明实施例提供了一种对芯片进行调试的方法,所述芯片包括:寄存器代理模块、调试接口模块和多个底层模块,该方法包括:As shown in FIG. 2, the embodiment of the present invention provides a method for debugging a chip. The chip includes: a register agent module, a debugging interface module, and a plurality of underlying modules. The method includes:
底层模块如检测到本底层模块工作异常,则产生对应的错误指示信号,向寄存器代理模块发送错误通知;If the underlying module detects that the underlying module is working abnormally, it will generate a corresponding error indication signal and send an error notification to the register agent module;
寄存器代理模块如接收到底层模块发送的错误通知,则记录错误信息,通过调试接口模块向上位机发送错误报告;If the register agent module receives the error notification sent by the underlying module, it will record the error information and send an error report to the upper computer through the debugging interface module;
上位机如接收到来自所述芯片的错误报告,则通过所述调试接口模块向所述寄存器代理模块发送寄存器访问指令;If the host computer receives an error report from the chip, it sends a register access instruction to the register proxy module through the debugging interface module;
所述寄存器代理模块如接收到来自所述上位机的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果;If the register proxy module receives a register access instruction from the host computer, it reads the corresponding register and returns the read result to the host computer;
其中,所述调试接口模块用于连接所述芯片和上位机,在所述寄存器代理模块和所述上位机之间转发信息。Wherein, the debugging interface module is used to connect the chip and the upper computer, and forward information between the register agent module and the upper computer.
该方法进一步包括下述特点:The method further includes the following features:
优选地,所述调试接口模块通过采用JTAG接口或串口连接所述芯片和上位机。Preferably, the debugging interface module is connected to the chip and the host computer by using a JTAG interface or a serial port.
优选地,所述读取结果指示工作异常的底层模块的信息和异常类型信息。Preferably, the reading result indicates the information of the underlying module that is working abnormally and the abnormal type information.
优选地,底层模块如检测到本底层模块工作异常,则产生对应的错误指示信号,包括:Preferably, if the underlying module detects that the underlying module is working abnormally, it will generate a corresponding error indication signal, including:
底层模块如检测到本底层模块工作异常,则将本底层模块的本地错误寄存器中对应于所述异常类型的位置位;其中,所述本地错误寄存器中的每一位对应于一种异常类型;If the underlying module detects that the underlying module is working abnormally, the position corresponding to the abnormal type in the local error register of the underlying module is set; wherein, each bit in the local error register corresponds to an abnormal type;
优选地,寄存器代理模块如接收到底层模块发送的错误通知,则记录错误信息,包括:Preferably, if the register agent module receives the error notification sent by the underlying module, it will record the error information, including:
寄存器代理模块如接收到底层模块发送的错误通知,则将全局错误寄存器中对应于所述底层模块的位置位;其中,所述全局错误寄存器中的每一位对应于一个底层模块;If the register agent module receives the error notification sent by the bottom module, it will set the position corresponding to the bottom module in the global error register; wherein, each bit in the global error register corresponds to a bottom module;
优选地,所述寄存器代理模块如接收到来自所述上位机的寄存器访问指令,则对相应寄存器进行读取操作,向上位机返回读取结果,包括:Preferably, if the register proxy module receives a register access instruction from the host computer, it performs a read operation on the corresponding register, and returns a read result to the host computer, including:
所述寄存器代理模块接收上位机发送的对全局错误寄存器进行访问的指令,读取所述全局错误寄存器的值,将所述值返回给上位机;The register proxy module receives an instruction to access the global error register sent by the host computer, reads the value of the global error register, and returns the value to the host computer;
所述寄存器代理模块接收上位机发送的对某个底层模块的本地错误寄存器进行访问的指令,读取所述本地错误寄存器的值,将所述值返回给上位机。The register proxy module receives an instruction from the upper computer to access a local error register of a certain underlying module, reads the value of the local error register, and returns the value to the upper computer.
优选地,上位机接收到芯片返回的读取结果后,还包括:Preferably, after the host computer receives the read result returned by the chip, it also includes:
上位机通过所述调试接口模块向所述寄存器代理模块发送寄存器控制指令;The host computer sends register control instructions to the register proxy module through the debugging interface module;
寄存器代理模块如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理。If the register proxy module receives the register control instruction sent by the host computer, it will write into the corresponding register to perform abnormal recovery processing on the chip.
其中,寄存器代理模块如接收到上位机发送的寄存器控制指令,则对相应寄存器进行写入操作以对所述芯片进行异常恢复处理,包括:Wherein, if the register proxy module receives the register control instruction sent by the host computer, it will write the corresponding register to perform abnormal recovery processing on the chip, including:
寄存器代理模块如接收到上位机发送的寄存器控制指令,所述指令中携带某个寄存器的地址和待写数据,则将所述待写数据写入所述寄存器中以对所述芯片进行异常恢复处理,如写入成功,则向所述上位机返回控制成功响应。If the register proxy module receives a register control instruction sent by the host computer, the instruction carries the address of a certain register and the data to be written, then writes the data to be written into the register to perform abnormal recovery on the chip Processing, if the writing is successful, return a control success response to the host computer.
上述实施例提供的一种对芯片进行调试的方法和芯片,芯片内的底层模块如检测到工作异常,则产生错误指示信号并通知芯片内的寄存器代理模块,寄存器代理模块接到通知后记录错误信息并通过调试接口模块向上位机发送错误报告,然后如接收到上位机发送的寄存器访问/控制指令,则对相应寄存器进行读取/写入操作,向上位机返回操作结果。上述方法和芯片能够在对芯片进行调试的过程中快速、精确定位bug位置,提高调试效率,实现对芯片运行状态的实时监控。A kind of method and chip that above-mentioned embodiment provides to debug chip, if the underlying module in the chip detects abnormal operation, then produce error indication signal and notify the register agent module in the chip, the register agent module records error after receiving the notification Information and send an error report to the upper computer through the debugging interface module, and then if the register access/control instruction sent by the upper computer is received, the corresponding register is read/written, and the operation result is returned to the upper computer. The above method and chip can quickly and accurately locate the bug position during the debugging process of the chip, improve the debugging efficiency, and realize real-time monitoring of the running state of the chip.
本领域普通技术人员可以理解上述方法中的全部或部分步骤可通过程序来指令相关硬件完成,所述程序可以存储于计算机可读存储介质中,如只读存储器、磁盘或光盘等。可选地,上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现,相应地,上述实施例中的各模块/单元可以采用硬件的形式实现,也可以采用软件功能模块的形式实现。本发明不限制于任何特定形式的硬件和软件的结合。Those skilled in the art can understand that all or part of the steps in the above method can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium, such as a read-only memory, a magnetic disk or an optical disk, and the like. Optionally, all or part of the steps in the above embodiments can also be implemented using one or more integrated circuits. Correspondingly, each module/unit in the above embodiments can be implemented in the form of hardware, or can be implemented in the form of software function modules. The form is realized. The present invention is not limited to any specific combination of hardware and software.
需要说明的是,本发明还可有其他多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。It should be noted that the present invention can also have other various embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these Corresponding changes and deformations should belong to the scope of protection of the appended claims of the present invention.
Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410384386.0A CN104133751A (en) | 2014-08-06 | 2014-08-06 | Chip debugging method and chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410384386.0A CN104133751A (en) | 2014-08-06 | 2014-08-06 | Chip debugging method and chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN104133751A true CN104133751A (en) | 2014-11-05 |
Family
ID=51806434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410384386.0A Pending CN104133751A (en) | 2014-08-06 | 2014-08-06 | Chip debugging method and chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104133751A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105591839A (en) * | 2015-12-23 | 2016-05-18 | 浪潮集团有限公司 | Device, method and system of testing network exchange chip |
CN111027103A (en) * | 2019-01-31 | 2020-04-17 | 哈尔滨安天科技集团股份有限公司 | Chip detection method and device based on register fuzzy configuration and storage equipment |
CN111682966A (en) * | 2020-05-26 | 2020-09-18 | 中国人民解放军国防科技大学 | Network communication device, system and method with active fault reporting function |
CN112084050A (en) * | 2019-06-14 | 2020-12-15 | 北京北方华创微电子装备有限公司 | Information recording method and system |
CN113032177A (en) * | 2021-03-31 | 2021-06-25 | 杭州迪普信息技术有限公司 | Soft error monitoring method and device |
CN113055468A (en) * | 2021-03-11 | 2021-06-29 | 新华三半导体技术有限公司 | Chip management and control method, device and system |
CN111552190B (en) * | 2020-04-24 | 2024-01-30 | 杭州涂鸦信息技术有限公司 | Method, system and device for controlling functions of hardware equipment |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5930470A (en) * | 1996-09-03 | 1999-07-27 | Kabushiki Kaisha Toshiba | Debugging system and debugging method |
US6591369B1 (en) * | 1999-10-01 | 2003-07-08 | Stmicroelectronics, Ltd. | System and method for communicating with an integrated circuit |
CN1481010A (en) * | 2003-07-09 | 2004-03-10 | 北京港湾网络有限公司 | Broadband data communication chip detection method and chip |
CN1996898A (en) * | 2005-12-28 | 2007-07-11 | 中兴通讯股份有限公司 | A system and method for real time detection of the data channel states |
CN102681930A (en) * | 2012-05-15 | 2012-09-19 | 浪潮电子信息产业股份有限公司 | Chip-level error recording method |
CN102841307A (en) * | 2012-09-29 | 2012-12-26 | 南京理工大学常熟研究院有限公司 | Method for positioning logic fault |
-
2014
- 2014-08-06 CN CN201410384386.0A patent/CN104133751A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5930470A (en) * | 1996-09-03 | 1999-07-27 | Kabushiki Kaisha Toshiba | Debugging system and debugging method |
US6591369B1 (en) * | 1999-10-01 | 2003-07-08 | Stmicroelectronics, Ltd. | System and method for communicating with an integrated circuit |
CN1481010A (en) * | 2003-07-09 | 2004-03-10 | 北京港湾网络有限公司 | Broadband data communication chip detection method and chip |
CN1996898A (en) * | 2005-12-28 | 2007-07-11 | 中兴通讯股份有限公司 | A system and method for real time detection of the data channel states |
CN102681930A (en) * | 2012-05-15 | 2012-09-19 | 浪潮电子信息产业股份有限公司 | Chip-level error recording method |
CN102841307A (en) * | 2012-09-29 | 2012-12-26 | 南京理工大学常熟研究院有限公司 | Method for positioning logic fault |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105591839A (en) * | 2015-12-23 | 2016-05-18 | 浪潮集团有限公司 | Device, method and system of testing network exchange chip |
CN111027103A (en) * | 2019-01-31 | 2020-04-17 | 哈尔滨安天科技集团股份有限公司 | Chip detection method and device based on register fuzzy configuration and storage equipment |
CN111027103B (en) * | 2019-01-31 | 2023-11-10 | 安天科技集团股份有限公司 | Chip detection method and device based on fuzzy configuration of register and storage device |
CN112084050A (en) * | 2019-06-14 | 2020-12-15 | 北京北方华创微电子装备有限公司 | Information recording method and system |
CN111552190B (en) * | 2020-04-24 | 2024-01-30 | 杭州涂鸦信息技术有限公司 | Method, system and device for controlling functions of hardware equipment |
CN111682966A (en) * | 2020-05-26 | 2020-09-18 | 中国人民解放军国防科技大学 | Network communication device, system and method with active fault reporting function |
CN111682966B (en) * | 2020-05-26 | 2022-08-19 | 中国人民解放军国防科技大学 | Network communication device with fault active reporting function, system and method thereof |
CN113055468A (en) * | 2021-03-11 | 2021-06-29 | 新华三半导体技术有限公司 | Chip management and control method, device and system |
CN113032177A (en) * | 2021-03-31 | 2021-06-25 | 杭州迪普信息技术有限公司 | Soft error monitoring method and device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104133751A (en) | Chip debugging method and chip | |
US9952963B2 (en) | System on chip and corresponding monitoring method | |
US8291379B2 (en) | Runtime analysis of a computer program to identify improper memory accesses that cause further problems | |
CN102760090B (en) | Debugging method and computer system | |
US20140372814A1 (en) | Method for testing a memory and memory system | |
CN101556551B (en) | Hardware acquisition system and method for equipment failure log | |
CN112650612B (en) | A memory fault location method and device | |
CN102681930A (en) | Chip-level error recording method | |
WO2015111176A1 (en) | Programmable device, error-storage system, and electronic system device | |
CN103645963A (en) | Storage system and data consistency verification method thereof | |
CN102760109A (en) | Data communication method, device and system | |
JP5545771B2 (en) | Diagnostic device, diagnostic method, and diagnostic program diagnostic method | |
CN101853198B (en) | Detection method, equipment and system of address bus | |
US8880957B2 (en) | Facilitating processing in a communications environment using stop signaling | |
US8589722B2 (en) | Methods and structure for storing errors for error recovery in a hardware controller | |
US11294757B2 (en) | System and method for advanced detection of failures in a network-on-chip | |
US10922023B2 (en) | Method for accessing code SRAM and electronic device | |
JP5440673B1 (en) | Programmable logic device, information processing apparatus, suspected part indication method and program | |
CN114363211A (en) | Network connectivity verification method of disaster recovery backup system network and related equipment | |
CN106610878A (en) | Fault debugging method for dual-controller system | |
CN112346919A (en) | SSD (solid State disk) testing method and system and storage medium | |
JP2009276985A (en) | Semiconductor integrated circuit device | |
CN119003225B (en) | A fault location method and device, storage medium and computer program product | |
JP6309919B2 (en) | Numerical control device with data acquisition function | |
CN110618891A (en) | Solid state disk fault online processing method and solid state disk |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20141105 |