CN104125466B - A kind of HEVC parallel decoding methods based on GPU - Google Patents

Abstract

The invention discloses a HEVC parallel decoding method based on GPU, comprising: GPU performs entropy decoding, reordering and inverse quantization on read code stream files, thereby obtaining transformation coefficient matrix, and at the same time, GPU parses the acquired code stream files , so as to obtain the motion vector and the reference frame; the GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix to obtain the residual data of the image, and at the same time, the GPU uses the HEVC motion compensation parallel algorithm to obtain the The predicted pixel value of the image; the GPU will sequentially sum the residual data of the image and the predicted pixel value of the image, perform deblocking filtering and sample adaptive compensation processing, so as to obtain the reconstructed image, and copy the pixel value of the reconstructed image to the CPU in memory. The invention effectively improves the decoding speed and decoding efficiency, and can be widely used in the field of video encoding and decoding.

Description

A parallel HEVC decoding method based on GPU

technical field

The invention relates to the field of video encoding and decoding, in particular to a GPU-based HEVC parallel decoding method.

Background technique

With the rapid development of Internet and mobile communication technology, digital video is moving towards the direction of high definition, high frame rate, and high compression rate. The format of video has developed from 720P to 1080P. In some occasions, 4Kx2K and 8Kx4K have even appeared. ultra-high-definition digital video. In video applications, transmission bandwidth and storage space are undoubtedly the core resources. How to realize high-definition video storage in a limited space and achieve good transmission in a network environment with bandwidth bottlenecks is a big problem. High-definition video can bring people a higher quality of life, but it will inevitably have a huge amount of data. For example, for 1080P high-definition video, the pixels are 1920X1080, the format is 4:2:0, and the data volume of one frame of image is 24.88Mbit. Such a high-definition video has a problem, that is, the video bit rate is greatly increased. Video coding is to use as few bits as possible to represent video information, but the compression efficiency of the widely used H.264 coding standard still cannot fully meet the application requirements of ultra-high-definition video.

HEVC (High Efficiency Video Coding) high-efficiency video coding is a next-generation new video compression coding scheme jointly formulated by ISO's MPEG and ITU-T's VCEG. The HEVC standard inherits the coding concept of the existing video coding scheme H.264, continues to use some of the coding technologies, and improves related technologies, with larger coding unit sizes and block-based inter/intra prediction selection methods More diverse, more complex interpolation filters, etc. Compared with the previous video coding technology, HEVC has the advantages of higher compression efficiency, better video quality, better robustness, stronger error recovery capability, and is more suitable for transmission in IP networks. Compared with the H.264/AVC encoding standard, HEVC doubles the compression efficiency when encoding high-definition and high-fidelity video images. In this way, when the quality of the reconstructed image after decoding is the same, the code of the video stream rate reduced by 50%.

However, the reduction of the bit rate is based on the increase in the complexity of the codec software. After adopting more complex and flexible coding techniques, the complexity of the HEVC codec software has also increased greatly, making the high-definition video The time spent on compression and decompression also increases, which cannot meet the high real-time decoding and playback requirements of application fields such as video conferencing and video telephony.

When high-definition video becomes the mainstream, relying solely on CPU obviously cannot realize real-time decoding of high-definition video well. GPU has excellent floating-point computing capability and powerful parallel computing capability. If the decoding algorithm has a huge amount of computation and a relatively high complexity module is transferred to the GPU for implementation, it can effectively solve the problem of real-time decoding. However, there is currently no GPU-based HEVC video codec solution in the industry.

Contents of the invention

In order to solve the above technical problems, the object of the present invention is to provide a GPU-based HEVC parallel decoding method with high decoding speed and high efficiency.

The technical solution adopted by the present invention to solve the technical problems is: a GPU-based HEVC parallel decoding method, comprising:

A. The GPU performs entropy decoding, reordering, and dequantization on the read code stream file to obtain the transformation coefficient matrix. At the same time, the GPU parses the obtained code stream file to obtain the motion vector and reference frame;

B. The GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix to obtain the residual data of the image. At the same time, the GPU uses the HEVC motion compensation parallel algorithm to obtain the predicted pixel value of the image according to the reference frame position pointed by the motion vector;

C. The GPU sequentially performs summation, deblocking filtering, and sample adaptive compensation processing on the residual data of the image and the predicted pixel value of the image to obtain a reconstructed image, and copies the pixel value of the reconstructed image to the memory of the CPU.

Further, in the step B, the GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix, which includes:

B11, initialize the GPU, and apply for device-side global memory for storing the transformation coefficient matrix and residual data on the GPU;

B12, the grid size of the thread and the size of the thread block are set, and assign a corresponding number of threads and a corresponding thread ID number to each transformation unit according to the size of the transformation unit;

B13. Read the transformation coefficient matrix corresponding to each transformation unit on the global memory of the device, and then perform column-parallel one-dimensional IDCT inverse transformation and row-parallel one-dimensional IDCT inverse transformation on each transformation coefficient matrix according to the thread ID number, thereby obtaining Residual data of the entire image block;

B14. Copy the calculated residual data of each image block back to the CPU memory to obtain the residual data of the entire image, and then release the device-side global memory space.

Further, the step B13 includes:

B131. Read the transformation coefficient matrix corresponding to each transformation unit on the device-side global memory;

B132. Perform one-dimensional IDCT inverse transformation on each column of each transformation coefficient matrix according to the thread ID number, obtain the transformed coefficient matrix and temporarily store the transformed result in the shared memory of the thread block;

B133. Perform one-dimensional IDCT inverse transformation on each row of the transformed coefficient matrix in the shared memory at the same time according to the thread ID number to obtain a residual data matrix, and calculate the residual data of the entire image block according to the residual data matrix.

Further, in the step B, the GPU adopts the HEVC motion compensation parallel algorithm to calculate the predicted pixel value of the image according to the reference frame position pointed by the motion vector, which includes:

S1, initialize the GPU, and apply for storage space in the GPU for storing the motion vector corresponding to each pixel in the inter-frame prediction mode, the reference frame and the predicted pixel value;

S2. Copy the motion vector and the corresponding reference frame image to the device, and bind the reference frame to the texture memory at the same time;

S3. Perform thread configuration, assign a thread ID number for the processing of each predicted pixel value, and open up a global memory space for storing predicted pixel values at the device side;

S4. Each thread performs direct texture reading or interpolation filtering processing at the same time according to its own thread ID number and motion vector pointing to the position of the reference frame, thereby obtaining the pixel prediction value of each thread;

S5. Copy the pixel prediction value of each thread back to the CPU memory, and then release the global memory space of the device.

Further, the step S4 is specifically:

Each thread performs direct reading or interpolation filtering processing at the same time according to its own thread ID number and the position of the motion vector pointing to the reference frame: if the motion vector of the thread points to an integer pixel value position, the motion in the texture memory is directly read The pixel value at the position of the reference frame pointed to by the vector, and the read pixel value is used as the pixel prediction value of the thread; if the motion vector of the thread points to a sub-pixel position, select the corresponding pixel according to the position Luminance or chroma is calculated by pixel interpolation filter formula, so as to obtain the pixel prediction value of this thread.

Further, the brightness-by-pixel interpolation filter formula is an 8-point interpolation filter formula, and the degree-by-pixel interpolation filter formula is a 4-point interpolation filter formula.

The beneficial effects of the present invention are: a decoding framework composed of CPU and GPU is constructed, the inverse transformation processing and motion compensation processing with relatively high decoding complexity are transferred to the GPU for implementation, and a GPU-based HEVC inverse transformation parallel algorithm and HEVC motion compensation parallel algorithm effectively improves decoding speed and decoding efficiency.

Description of drawings

The present invention will be further described below in conjunction with drawings and embodiments.

Fig. 1 is a flow chart of the steps of a GPU-based HEVC parallel decoding method of the present invention;

Fig. 2 is the flow chart that GPU adopts HEVC inverse transform parallel algorithm to process transform coefficient matrix in step B of the present invention;

Fig. 3 is the flowchart of step B13 of the present invention;

Fig. 4 is the flow chart of calculating the predicted pixel value of the image according to the reference frame position pointed to by the motion vector using the HEVC motion compensation parallel algorithm by the GPU in step B of the present invention;

FIG. 5 is a frame diagram of HEVC decoding according to Embodiment 1 of the present invention;

FIG. 6 is a schematic diagram of pixel-by-pixel interpolation of luminance in the present invention.

detailed description

Referring to Figure 1, a GPU-based HEVC parallel decoding method includes:

A. The GPU performs entropy decoding, reordering, and dequantization on the read code stream file to obtain the transformation coefficient matrix. At the same time, the GPU parses the obtained code stream file to obtain the motion vector and reference frame;

B. The GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix to obtain the residual data of the image. At the same time, the GPU uses the HEVC motion compensation parallel algorithm to obtain the predicted pixel value of the image according to the reference frame position pointed by the motion vector;

C. The GPU sequentially performs summation, deblocking filtering, and sample adaptive compensation processing on the residual data of the image and the predicted pixel value of the image to obtain a reconstructed image, and copies the pixel value of the reconstructed image to the memory of the CPU.

Referring to Fig. 2, further as a preferred embodiment, in the step B, the GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix, which includes:

B11, initialize the GPU, and apply for device-side global memory for storing the transformation coefficient matrix and residual data on the GPU;

B12, the grid size of the thread and the size of the thread block are set, and assign a corresponding number of threads and a corresponding thread ID number to each transformation unit according to the size of the transformation unit;

B13. Read the transformation coefficient matrix corresponding to each transformation unit on the global memory of the device, and then perform column-parallel one-dimensional IDCT inverse transformation and row-parallel one-dimensional IDCT inverse transformation on each transformation coefficient matrix according to the thread ID number, thereby obtaining Residual data of the entire image block;

B14. Copy the calculated residual data of each image block back to the CPU memory to obtain the residual data of the entire image, and then release the device-side global memory space.

Among them, the grid size of the thread is set to Grid(4,4,1), and the size of the thread block is set to Block(16,16,1), that is, a Grid allocates 16 Blocks, and each Block allocates 256 threads . The number of threads is allocated accordingly according to the size of the transform unit. An image block consists of at least one transform unit, and an image consists of at least one image block.

With reference to Fig. 3, further as a preferred embodiment, described step B13, it comprises:

B131. Read the transformation coefficient matrix corresponding to each transformation unit on the device-side global memory;

B132. Perform one-dimensional IDCT inverse transformation on each column of each transformation coefficient matrix according to the thread ID number, obtain the transformed coefficient matrix and temporarily store the transformed result in the shared memory of the thread block;

B133. Perform one-dimensional IDCT inverse transformation on each row of the transformed coefficient matrix in the shared memory at the same time according to the thread ID number to obtain a residual data matrix, and calculate the residual data of the entire image block according to the residual data matrix.

Referring to Fig. 4, further as a preferred embodiment, in the step B, the GPU adopts the HEVC motion compensation parallel algorithm, and obtains the step of predicting the pixel value of the image according to the reference frame position pointed to by the motion vector, which includes:

S1, initialize the GPU, and apply for storage space in the GPU for storing the motion vector corresponding to each pixel in the inter-frame prediction mode, the reference frame and the predicted pixel value;

S2. Copy the motion vector and the corresponding reference frame image to the device, and bind the reference frame to the texture memory at the same time;

S3. Perform thread configuration, assign a thread ID number for the processing of each predicted pixel value, and open up a global memory space for storing predicted pixel values at the device side;

S4. Each thread performs direct texture reading or interpolation filtering processing at the same time according to its own thread ID number and motion vector pointing to the position of the reference frame, thereby obtaining the pixel prediction value of each thread;

S5. Copy the pixel prediction value of each thread back to the CPU memory, and then release the global memory space of the device.

Further as a preferred embodiment, the step S4 is specifically:

Each thread performs direct reading or interpolation filtering processing at the same time according to its own thread ID number and the position of the motion vector pointing to the reference frame: if the motion vector of the thread points to an integer pixel value position, the motion in the texture memory is directly read The pixel value at the position of the reference frame pointed to by the vector, and the read pixel value is used as the pixel prediction value of the thread; if the motion vector of the thread points to a sub-pixel position, select the corresponding pixel according to the position Luminance or chroma is calculated by pixel interpolation filter formula, so as to obtain the pixel prediction value of this thread.

Wherein, reading the pixel value at the position of the reference frame pointed to by the motion vector in the texture memory is realized by calling the texture extraction function tex2D() function.

As a further preferred embodiment, the brightness-by-pixel interpolation filter formula is an 8-point interpolation filter formula, and the degree-by-pixel interpolation filter formula is a 4-point interpolation filter formula.

The present invention will be described in further detail below in conjunction with specific examples.

Embodiment one

Referring to Fig. 5, the first embodiment of the present invention:

The HEVC decoding framework is shown in Figure 5. The HEVC decoding process is the reverse of the encoding process. The decoder reads the code stream file and obtains the bit stream from the NAL (Network Abstraction Layer). The decoding is performed in a frame-by-frame order, and a frame of image is divided into several maximum encoding Unit LCU, in the order of raster scanning, entropy decoding is performed with LCU as the basic unit, and then reordered to obtain the residual coefficient of the corresponding coding unit; then the residual coefficient is dequantized and inversely transformed to obtain the image residual data. At the same time, the decoder generates a prediction block based on the header information decoded from the code stream: if it is an inter-frame prediction mode, it will generate a corresponding prediction block based on the motion vector and the reference frame; if it is an intra-frame prediction mode, it will generate a prediction block from the adjacent The prediction unit of generates a prediction block. Next, the predicted block data and residual block data are summed to obtain reconstructed image block data, and finally the image block data is processed by deblocking filtering and sample adaptive compensation to obtain a reconstructed image and output.

Motion compensation describes the difference between adjacent frames in the encoding relationship, that is to say, it describes how the macroblock of the previous reference frame moves to a certain position in the current frame, and predicts the value of the block according to the same size of the reference frame pointed to by the motion vector Added to the residual value to get the reconstructed value. This approach is often used by video codecs to reduce temporal redundancy in video sequences. Motion compensation is used for image reconstruction and is an essential key module in video codecs.

Motion compensation means that a frame of image is divided into coding units of different sizes according to the image texture, and the prediction unit is divided on the basis of the coding unit. The prediction unit includes a luma block and two chrominance blocks, and each macro of the inter-coded macro block A block is predicted from a macroblock of the same size in the reference picture. The accuracy of motion compensation is determined by the accuracy of the motion vector, which is directly related to the quality of the reconstructed image and the size of the code stream. The motion vector is the size of the translation during the prediction process, which is obtained by estimating the motion of the encoder. The higher the accuracy of motion vectors, the higher the accuracy of motion compensation. Interpolation filtering is a very critical technology in motion compensation. The H.264 standard uses a six-tap Wiener filter, and its motion compensation accuracy is 1/4 pixel accuracy. HEVC uses a more advanced and efficient interpolation filter, that is, an interpolation filter based on discrete cosine transform. In contrast, the generation of sub-pixels in the HEVC standard is more concise and efficient. Only one filtering formula is needed, and one filtering process is enough. The luminance signal uses an 8-point interpolation filter based on DCT discrete cosine transform, while the chrominance signal uses a 4-point interpolation filter based on DCT discrete cosine transform to interpolate pixels. However, a large number of interpolation calculations lead to a corresponding increase in complexity, and the coding efficiency will be low. The luminance and chrominance pixels at sub-pixel positions in the reference frame do not actually exist, so pixel interpolation through interpolation filtering algorithm is required to obtain the pixel values at sub-pixel positions. This kind of motion compensation belongs to sub-pixel precision motion compensation.

Embodiment two

This embodiment describes the HEVC inverse transformation parallel algorithm process of the present invention.

The inverse transform module is a process of converting the transform coefficient matrix of the current block into a residual sample matrix, and prepares for subsequent reconstruction. The inverse transformation is performed after the inverse quantization process, and the TU transformation unit is also used as the basic unit for processing, and the source data used is the result of inverse quantization. When the HEVC decoder of the present invention performs two-dimensional IDCT inverse transform, it first performs one-dimensional IDCT inverse discrete cosine transform in the horizontal direction, then performs one-dimensional IDCT inverse discrete cosine transform in the vertical direction, and finally multiplies the matrix to obtain The transformation coefficient matrix is converted into a residual data matrix of the same size, thereby completing the transformation from the frequency domain to the time domain.

The IDCT operations of different transformation blocks in a frame of image are independent of each other, and when the transformation coefficient matrix on the same transformation unit performs one-dimensional IDCT transformation in the horizontal direction, each column is independent of each other, so parallel calculation of each column can be realized . Similarly, when the one-dimensional IDCT inverse transformation in the vertical direction is performed, there is no data correlation between rows, so parallel computing can be realized. According to the size of the transformation coefficient matrix, the present invention allocates the corresponding number of threads to process, and each column allocates a thread to process at the same time, and each column performs one-dimensional IDCT inverse transformation at the same time. After processing, each row allocates a thread to simultaneously perform one-dimensional IDCT inverse transformation. After the transformation calculation is completed, the parallel processing of the two-dimensional IDCT inverse transformation of the transformation coefficient matrix is realized.

Since HEVC transform units are of size 4x4, 8x8, 16x16 or 32x32. The larger the transformation unit, the higher the degree of parallelism and the more obvious the acceleration effect. For example, for the transformation coefficient matrix corresponding to the 32x32 transformation unit, firstly, the one-dimensional inverse IDCT transformation of 32 columns can be performed simultaneously, and the syncthreads() function is called to synchronize after completion, and then the one-dimensional inverse IDCT transformation of 32 rows can be performed simultaneously. In addition, IDCT inverse transformation may also be performed on the transformation coefficient matrix corresponding to each transformation unit at the same time. In order to obtain a better acceleration effect, the present invention directly uses the transformation coefficients in the global memory space obtained after dequantization and parallel processing. The transformation unit includes one luma transformation block and two chroma transformation blocks, therefore, the inverse transformation of luma and chroma needs to be performed respectively, and the steps of the two are the same.

The GPU-based inverse transformation algorithm of the present invention comprises:

(1) At the beginning of decoding, initialize the GPU, apply for a global memory space on the GPU for storing the residual data obtained after inverse transformation, and read the transformation coefficients obtained after inverse quantization on the GPU directly from the global memory space .

(2) Configure the number of threads, configure the thread grid size as Grid(4,4,1), and the thread block size as Block(16,16,1), that is, a Grid allocates 16 Blocks, and each Block allocates 256 threads, and then allocate the number of threads according to the size of the transformation unit.

(3) Assign the transformation coefficient matrix corresponding to a transformation unit to a thread block for inverse transformation processing: first, each thread performs one-dimensional IDCT inverse transformation on each column of the transformation coefficient matrix according to its own thread ID number, and each column is simultaneously , and call the syncthreads() function to synchronize, and the obtained results are temporarily stored in the shared memory in the thread block; then, one-dimensional IDCT inverse transformation is performed on each row in the coefficient matrix in the shared memory at the same time, and a thread is allocated for a row to perform Processing, thereby completing the two-dimensional IDCT inverse transform of the transform coefficients, and obtaining the residual data matrix. The inverse transformation process is performed on the transformation coefficient matrix corresponding to each transformation unit at the same time, and the residual data of the entire image block is obtained.

(4) Copy the calculated residual data of each image block from the GPU global memory space to the CPU memory, so as to obtain the residual data of the entire image.

(5) Release the global memory space allocated in the decoding process.

Embodiment three

This embodiment describes the HEVC motion compensation parallel algorithm process of the present invention.

The implementation principle of inter-frame motion compensation, simply put, is that the motion vector obtained by parsing the code stream is obtained according to the position pointed to on the reference frame to obtain the predicted value, and the position pointed to by the whole pixel point of the reference frame is directly read. If it is a sub-pixel position, it is necessary to obtain the sub-pixel predicted value through pixel interpolation, and then add the predicted value to the image residual value obtained through inverse quantization and inverse transformation to obtain the image reconstruction value. In the motion compensation module, the calculation of pixel interpolation and filtering takes up about 70% of the computational load. Therefore, the realization of the motion compensation of the present invention on the GPU is mainly to perform pixel interpolation. The motion vector is originally continuous, but when performing inter-frame prediction motion compensation, in order to improve the accuracy of video image inter-frame prediction in the encoding process, when searching for a matching block, the motion vector is sub-pixel precision, and the precision of the luminance motion vector is 1/4 pixel, and 1/8 pixel precision for chroma motion vectors. Therefore, when the motion vector points to a sub-pixel position of the reference frame, it is necessary to interpolate according to surrounding pixel values to obtain the pixel value of the corresponding position.

Table 1 shows the coefficients used for the interpolation filtering of the luminance sub-pixels.

Table 1 Coefficients used in luminance pixel interpolation filtering

sub-pixel position Interpolation filter coefficient 1/4 pixel {-1,4,-10,58,17,-5,1,0} 2/4 pixel {-1,4,-11,40,40,-11,4,-1} 3/4 pixel {0,1,-5,17,58,-10,4,-1}

Figure 6 shows the position of the brightness integer pixel and the position of the sub-pixel obtained through interpolation. The positions represented by uppercase letters are integer pixels, and the positions represented by lowercase letters are sub-pixels.

In the HEVC standard software, the position of the pixel is determined by xFracL and yFracL in the parameter table. xFracL actually represents the fractional part of the horizontal component of the motion vector, and yFracL actually represents the fractional part of the vertical component of the motion vector. The two are combined together In the HEVC standard, it represents the position of the pixel. Both xFracL and yFracL are 0, indicating that the position of the finger is an integer pixel position, and the rest are sub-pixel positions. By determining the position, select the corresponding interpolation coefficient and the adjacent pixels in the reference frame to perform interpolation to obtain the pixel value at the corresponding position. Table 2 shows the correspondence between xFracL and yFracL and the pixel positions in Figure 6.

Table 2 Luminance pixel position mapping relationship

Luminance pixel interpolation needs to select the corresponding interpolation coefficient to solve according to the value of the position of the sub-pixel, a _0,0 , b _0,0 , c _0,0 at the same horizontal position as the integer pixel correspond to 1/4 , 2/4, 3/4 pixel position, according to the coefficients in Table 1 and A- _3,0 , A- _2,0 , A- _1,0 , A _0,0 , A _1,0 , A _{2, 0} , A _3,0 , A _4,O these integer pixels are calculated. Among them, the variable shift1 is equal to (BitDepthY-8), shift2 is set to 6 and shift3 is set to (14-BitDepthY). The specific calculation formula is:

a _0,0 ＝(-A _-3,0 +4*A _-2,0 -10*A _-1,0 +58*A _0,0 +17*A _1,0 -5*A _2,0 + A _3,0 )>>shift1

b _0,0 ＝(-A _-3,0 +4*A _-2,0 -11*A _-1,0 +40*A _0,0 +40*A _1,0 -11*A _2,0 + 4*A _3,0 -A _4,0 )>>shift1

c _0,0 ＝(A _-2,0 -5*A _-1,0 +17*A _0,0 +58*A _1,0 -10*A _2,0 +4*A _3,0 -A _{4 ,0} )>>shift1

And d _0,0 , h _0,0 and n _0,0 correspond to the pixel points at the 1/4, 2/4, 3/4 positions in the vertical direction, and it is necessary to know the pixel points at the same vertical position when performing pixel interpolation. Integer pixels, the interpolation calculation is:

d _0,0 ＝(-A _0,-3 +4*A _0,-2 -10*A _0,-1 +58*A _0,0 +17*A _0,1 -5*A _0,2 + A _0,3 )>>shift1

h _0,0 ＝(-A _0,-3 +4*A _0,-2 -11*A _0,-1 +40*A _0,0 +40*A _0,1 -11*A _0,2 + 4*A _0,3 -A _0,-4 )>>shift1

n _0,0 ＝(A _0,-2 -5*A _0,-1 +17*A _0,0 +58*A _0,1 -10*A _0,2 +4*A _0,3 -A _{0 ,-4} )>>shift1

a _0,0 , b _0,0 , c _0,0 , d _0,0 , h _0,0 and n _0,0 pixel values can be deduced directly from integer pixels and interpolation filter coefficients in one step, when the motion vector points to these positions According to the above algorithm, the corresponding pixel value can be obtained.

However, the values of sub-pixels at other positions need to be obtained in two steps.

Calculation of pixel values for e _0,0 , i _0,0 , p _0,0 . First, calculate a _0,-3 , a _0,-2 , a _0,-1 , a _0,0 , a _0,1 according to the value of the sub-pixel position at the same horizontal or vertical position as the integer pixel previously calculated ,a _0,2 ,a _0,3 ,a _0,4 values, and then the following calculations can be obtained:

e _0,0 ＝(-a _0,-3 +4*a _0,-2 -10*a _0,-1 +58*a _0,0 +17*a _0,1 -5*a _0,2 + a _0,3 )>>shift2

i _0,0 ＝(-a _0,-3 +4*a _0,-2 -11*a _0,-1 +40*a _0,0 +40*a _0,1 -11*a _0,2 + 4*a _0,3 -a _0,4 )>>shift2

p _0,0 ＝(a _0,-2 -5*a _0,-1 +17*a _0,0 +58*a _0,1 -10*a _0,2 +4*a _0,3 -a _{0 ,4} )>>shift2

The calculation of f _0,0 , j _0,0 , q _0,0 pixel values also needs to first obtain b _0,-3 ,b _0,-2 ,b _0,-1 ,b _0,0 ,b _{0, 1} ,b _0,2 ,b _0,3 ,b _0,4 values, and then use the interpolation filter parameters for the following processing:

f _0,0 ＝(-b _0,-3 +4*b _0,-2 -10*b _0,-1 +58*b _0,0 +17*b _0,1 -5*b _0,2 + b _0,3 )>>shift2

j _0,0 ＝(-b _0,-3 +4*b _0,-2 -11*b _0,-1 +40*b _0,0 +40*b _0,1 -11*b _0,2 + 4*b _0,3 -b _0,4 )>>shift2

q _0,0 ＝(b _0,-2 -5*b _0,-1 +17*b _0,0 +58*b _0,1 -10*b _0,2 +4*b _0,3 -b _{0 ,4} )>>shift2

The calculation of g _0,0 , k _0,0 , r _0,0 needs to obtain c _0,-3 ,c _0,-2 ,c _0,-1 ,c _0,0 ,c _0,1 ,c _0,2 ,c _0,3 ,c _0,4 values, and then calculated as follows:

g _0,0 ＝(-c _0,-3 +4*c _0,-2 -10*c _0,-1 +58*c _0,0 +17*c _0,1 -5*c _0,2 + c _0,3 )>>shift2

k _0,0 ＝(-c _0,-3 +4*c _0,-2 -11*c _0,-1 +40*c _0,0 +40*c _0,1 -11*c _0,2 + 4*c _0,3 -c _0,4 )>>shift2

r _0,0 ＝(c _0,-2 -5*c _0,-1 +17*c _0,0 +58*c _0,1 -10*c _0,2 +4*c _0,3 -c _{0 ,4} )>>shift2

When the position pointed by the motion vector MV is exactly an integer pixel on the reference frame, the value of the pointed pixel is the predicted pixel value. In this way, the predicted pixel values of the entire inter-frame prediction block can be calculated by each thread on the GPU according to the corresponding MV and the reference frame.

The process of sub-pixel interpolation of chroma is the same as that of brightness, but chroma uses a 4-tap interpolation filter, which will not be described in detail here. The coefficients used in the interpolation are shown in Table 3.

Table 3 Coefficients used in chroma pixel interpolation filtering

sub-pixel position Interpolation filter coefficient 1/8 pixel {-2,58,10,-2} 2/8 pixel {-4,54,16,-2} 3/8 pixel {-6,46,28,-4} 4/8 pixels {-4,36,36,-4} 5/8 pixels {-4,28,46,-6} 6/8 pixels {-2,16,54,-4} 7/8 pixels {-2,10,58,-2}

In the HEVC codec standard, motion compensation is performed in units of image blocks, but in fact the basic unit of processing is a pixel. There is no interdependence between each pixel when performing motion compensation. It only needs to be calculated according to the position of the MV pointing to the reference frame. The corresponding predicted pixel value is then added to the residual pixel value to obtain the reconstructed pixel value. The basic unit processed by each thread is the pixel point converted from the PU prediction block, and one thread calculates a predicted pixel value, so that the inter-frame predicted pixel value on the entire image block can be calculated at the same time.

The HEVC motion compensation parallel algorithm of the present invention includes:

(1) First, at the beginning of decoding, initialize the GPU, and apply for storage space in the GPU for storing the motion vector corresponding to each pixel in the inter-frame prediction mode, the reference frame and the generated predicted pixel value.

(2) Then copy the motion vector and the corresponding reference frame image to the device through the cudaMemcpy function, and call the cudaBindTexteure function to bind the reference frame to the texture memory. The speed of reading data from the texture memory is negligible, which further improves the efficiency of the operation.

(3) Perform thread configuration, assign a thread ID number to the processing of each predicted pixel value, and open up a global memory space for storing correspondingly generated predicted pixel values on the device side. Set the thread grid size to Grid(4,4,1), and the thread block size to Block(16,16,1). That is, a Grid allocates 16 Blocks, and each Block allocates 256 threads.

(4) Find the predicted pixel value according to the position where the motion vector points to the reference frame: if it points to the position of the integer pixel value, then directly read the value at the position of the reference frame pointed to by the corresponding motion vector to be the predicted pixel value; if it is sub-pixel position, select the corresponding sub-pixel interpolation filter formula for evaluation according to the position of the pixel point, and obtain the corresponding sub-pixel value as the predicted pixel value. Each thread performs the same execution steps according to its own thread ID number to obtain the corresponding pixel prediction value.

(5) Add the obtained pixel value prediction and the corresponding pixel residual value to obtain the pixel reconstruction value, and perform safety verification of data clipping.

(6) Copy the result back to the memory of the host, and release the storage space of the device.

Compared with the prior art, the present invention constructs a decoding framework composed of CPU and GPU, transfers the inverse transformation processing and motion compensation processing with high decoding complexity to the GPU for implementation, and designs a GPU-based HEVC inverse transformation parallel Algorithm and HEVC motion compensation parallel algorithm effectively improve decoding speed and decoding efficiency.

The above is a specific description of the preferred implementation of the present invention, but the invention is not limited to the described embodiments, and those skilled in the art can also make various equivalent deformations or replacements without violating the spirit of the present invention. , these equivalent modifications or replacements are all within the scope defined by the claims of the present application.

Claims (5)

1. A GPU-based HEVC parallel decoding method, characterized in that: comprising: A. The GPU performs entropy decoding, reordering, and dequantization on the read code stream file to obtain the transformation coefficient matrix. At the same time, the GPU parses the obtained code stream file to obtain the motion vector and reference frame; B. The GPU uses the HEVC inverse transform parallel algorithm to process the transformation coefficient matrix to obtain the residual data of the image. At the same time, the GPU uses the HEVC motion compensation parallel algorithm to obtain the predicted pixel value of the image according to the reference frame position pointed by the motion vector; C. The GPU sequentially performs summation, deblocking filtering, and sample adaptive compensation processing on the residual data of the image and the predicted pixel value of the image to obtain the reconstructed image, and copies the pixel value of the reconstructed image to the memory of the CPU; In the step B, the GPU adopts HEVC motion compensation parallel algorithm, and obtains the step of predicting the pixel value of the image according to the reference frame position pointed by the motion vector, which includes: S1. Initialize the GPU, and apply for storage space in the GPU for storing motion vectors, reference frames, and predicted pixel values corresponding to each pixel in the inter-frame prediction mode; S2. Copy the motion vector and the corresponding reference frame image to the device, and bind the reference frame to the texture memory at the same time; S3. Perform thread configuration, assign a thread ID number for the processing of each predicted pixel value, and open up a global memory space for storing predicted pixel values at the device side; S4. Each thread performs direct texture reading or interpolation filtering processing at the same time according to its own thread ID number and motion vector pointing to the position of the reference frame, thereby obtaining the pixel prediction value of each thread; S5. Copy the pixel prediction value of each thread back to the CPU memory, and then release the global memory space of the device. 2. a kind of HEVC parallel decoding method based on GPU according to claim 1, it is characterized in that: in described step B, GPU adopts HEVC inverse transformation parallel algorithm to process this step of transformation coefficient matrix, and it comprises: B11, initialize the GPU, and apply for device-side global memory for storing the transformation coefficient matrix and residual data on the GPU; B12, the grid size of the thread and the size of the thread block are set, and assign a corresponding number of threads and a corresponding thread ID number to each transformation unit according to the size of the transformation unit; B13. Read the transformation coefficient matrix corresponding to each transformation unit on the global memory of the device, and then perform column-parallel one-dimensional IDCT inverse transformation and row-parallel one-dimensional IDCT inverse transformation on each transformation coefficient matrix according to the thread ID number, thereby obtaining Residual data of the entire image block; B14. Copy the calculated residual data of each image block back to the CPU memory to obtain the residual data of the entire image, and then release the device-side global memory space. 3. a kind of HEVC parallel decoding method based on GPU according to claim 2, is characterized in that: described step B13, it comprises: B131. Read the transformation coefficient matrix corresponding to each transformation unit on the device-side global memory; B132. Perform one-dimensional IDCT inverse transformation on each column of each transformation coefficient matrix according to the thread ID number, obtain the transformed coefficient matrix and temporarily store the transformed result in the shared memory of the thread block; B133. Perform one-dimensional IDCT inverse transformation on each row of the transformed coefficient matrix in the shared memory at the same time according to the thread ID number to obtain a residual data matrix, and calculate the residual data of the entire image block according to the residual data matrix. 4. a kind of HEVC parallel decoding method based on GPU according to claim 1, is characterized in that: described step S4, it is specifically: Each thread performs direct reading or interpolation filtering processing at the same time according to its own thread ID number and the position of the motion vector pointing to the reference frame: if the motion vector of the thread points to an integer pixel value position, the motion in the texture memory is directly read The pixel value at the position of the reference frame pointed to by the vector, and the read pixel value is used as the pixel prediction value of the thread; if the motion vector of the thread points to a sub-pixel position, select the corresponding pixel according to the position Luminance or chroma is calculated by pixel interpolation filter formula, so as to obtain the pixel prediction value of this thread. 5. A GPU-based HEVC parallel decoding method according to claim 4, wherein the luminance sub-pixel interpolation filter formula is an 8-point interpolation filter formula, and the chroma sub-pixel interpolation filter formula is a 4-point interpolation filter formula Interpolation filter formula.