CN104103306B - The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility - Google Patents
The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility Download PDFInfo
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- CN104103306B CN104103306B CN201410285236.4A CN201410285236A CN104103306B CN 104103306 B CN104103306 B CN 104103306B CN 201410285236 A CN201410285236 A CN 201410285236A CN 104103306 B CN104103306 B CN 104103306B
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Abstract
The present invention relates to a kind of radioprotective SRAM multi-mode redundant method for designing judged based on data credibility, the method includes: formed multi-mode redundant storage system by multiple identical SRAM memory and a redundant system control circuit；The storage array of the SRAM memory in multi-mode redundant storage system selects multiple data bit as observing position, observe position storage given data；Redundant system control circuit carries out periodic test to the observation position in each SRAM storage array, when finding that observing bit data occurs upset mistake, then refresh the data bit in the suspect region observed around position that upset mistake occurs in corresponding SRAM storage array, and abandon using these data during judgement before refreshing, after having refreshed, the corresponding data observing position are recovered.The present invention can improve the accuracy of redundancy judgement, reduces the data error rate of each memorizer, and the performance finally making multi-mode redundant storage system overall is improved.
Description
Technical field
The present invention relates to the radiation-hardened design technical field of integrated circuit, a kind of radioprotective SRAM multi-mode redundant method for designing judged based on data credibility.
Background technology
Radiate the influencing mechanism to integrated circuit and be divided into total dose effect and Single event upset effecf.After total dose effect refers to the radiation accumulation that chip is subject to, the gate oxide stored charge of its MOS device and defect, make metal-oxide-semiconductor performance degradation cause circuit function to lose efficacy；When Single event upset effecf is source and the drain region that high energy particle passes metal-oxide-semiconductor, a lot of electron-hole pairs is gone out along track collision, electronics or hole are collected into source region or drain region under the depletion region electric field action of active-surface, cause source region or drain voltage to change, thus cause circuit function mistake.In space exploration device with high costs, or critical Ground Application is as in automotive control system, catastrophic consequence all may be caused by radiation-induced small circuit error or inefficacy, one of technical method improving circuit radiation resistance is Redundancy Design, i.e. use the work of multimode circuit parallel, to increase hardware spending for cost to improve system radiation resistance.
In each module of integrated circuit, the ability of SRAM resisting radiation interference, and along with integrated circuit fabrication process advances to less size node, SRAM makes a mistake more susceptible to radiation interference.Because SRAM is essential in high-performance electric subsystem, so the radiation resistance improving SRAM has important using value.Research finds that high energy particle passes SRAM storage array, and the Data flipping mistake phenomenon caused has: (1) single particle effect makes a data bit make a mistake；(2) multiple data bit that single particle effect makes physics adjacent make a mistake: (3) high energy particle and the nucleus collision generation nuclear fission in body silicon, fission discharges more high energy particle, nearby cause more single particle effect, cause multiple data bit that upset mistake occurs.Situation about making a mistake for a data bit, coding checkout method can be used to carry out error correction, if and the adjacent wrong data of physics belongs to a data byte, then with simple coding checkout method cannot error correction, the situation for this many error in data can use multi-mode redundant design method.Such as nine mould redundant data storage, same data are saved into nine identical memorizeies, the data in these memorizer identical address are read out parallel during reading, then according to nine numbers according to putting to the vote, judge final output data with obeying most method, and Refresh Data is returned the memorizer made a mistake.But in strong radiation environment, it is likely to occur five or situation that data above sample makes a mistake simultaneously, now redundant system could be made that the judgement of mistake, the probability that redundant system is made mistakes and the probability positive correlation of single memory corrupt data, memory data error probability is the biggest, then to make the probability of erroneous judgement the highest for redundant system.
Summary of the invention
It is an object of the invention to provide a kind of can improve redundancy judgement accuracy, reduce each memorizer data error rate, improve redundant storage system performance based on data credibility judge radioprotective SRAM multi-mode redundant method for designing.
For achieving the above object, present invention employs techniques below scheme: a kind of judge radioprotective SRAM multi-mode redundant method for designing based on data credibility, the method includes the step of following order:
(1) multi-mode redundant storage system is formed by multiple identical SRAM memory and a redundant system control circuit；
(2) storage array of the SRAM memory in multi-mode redundant storage system selects multiple data bit as observing position, observe position storage given data；
(3) redundant system control circuit carries out periodic test to the observation position in each SRAM storage array, when finding that observing bit data occurs upset mistake, then refresh the data bit in the suspect region observed around position that upset mistake occurs in corresponding SRAM storage array, and abandon using these data during judgement before refreshing, after having refreshed, the corresponding data observing position are recovered.
Before reading data or refreshing during correct judgment data, redundant system control circuit reads all SRAM memory to obtain many parts of data samples simultaneously, then uses obedience majority vote method to judge result.
The given data of described observation position storage is 0 or 1.
Data bit in described suspect region is all data bit around the observation position that data change in the range of contiguous physical.
Abandon using the data of suspect region during the judgement before data are refreshed of the described redundant system control circuit.
As shown from the above technical solution, multi-mode redundant storage system includes the SRAM memory that at least two is identical, and performs the redundant system control circuit of read-write, judgement and refresh function, multiple identical SRAM memory many parts of data samples of interior preservation.The storage array of SRAM memory is provided with the observation position of some preservation given datas, redundant system control circuit periodically checks the observation position in SRAM storage array, when finding that observing bit data occurs upset mistake, then think that the data bit in certain physical extent about has the possibility that upset mistake occurs, multimode redundant system control circuit reads the data in other SRAM same area, use obey most method decide by vote result after refresh the data bit in suspect region, after the data of suspect region are all refreshed, by the corresponding data recovery observing position.By the invention it is possible to improve the accuracy of redundancy judgement, reducing the data error rate of each memorizer, the performance finally making multi-mode redundant storage system overall is improved.
Accompanying drawing explanation
Fig. 1 is the schematic diagram in the present invention with the SRAM storage array observing position.
Fig. 2 is the illustrative view of functional configuration of the SRAM memory in multi-mode redundant storage system.
Fig. 3 is the composition structural representation in multi-mode redundant storage system.
Detailed description of the invention
The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility, the method comprises the following steps: first, multiple identical SRAM memory and a redundant system control circuit form multi-mode redundant storage system；Second, the storage array of the SRAM memory in multi-mode redundant storage system selects multiple data bit as observing position, observe position storage given data；3rd, redundant system control circuit carries out periodic test to the observation position in each SRAM storage array, when finding that observing bit data occurs upset mistake, then refresh the data bit in the suspect region observed around position that upset mistake occurs in corresponding SRAM storage array, and abandon using these data during judgement before refreshing, after having refreshed, the corresponding data observing position are recovered, as shown in Figure 1,3.
As shown in Figure 1, the given data of described observation position storage is 0 or 1, the long numeric data upset the most adjacent wrong feature caused in SRAM storage array based on high energy particle, select some data bit as observing position in storage array, storage given data, such as data " 1 ", redundant system periodically checks the data observed in position, if finding, it is changed to " 0 ", then thinking that the data in certain physical extent about also have the suspicion that upset mistake occurs, these data can be refreshed by multimode redundant system.In other words, observing the known data of storage in position, if redundant system finds that observing bit data occurs upset mistake, then the data in the certain physical extent of its periphery have the possibility that upset mistake occurs, and need to be refreshed.
Data bit in described suspect region is all data bit around the observation position that data change in the range of contiguous physical.The judgement before refreshing data of the described redundant system control circuit abandons using the data of suspect region.Before reading data or refreshing during correct judgment data, redundant system control circuit reads all SRAM memory to obtain many parts of data samples simultaneously, then uses obedience majority vote method to judge result.
As it is shown on figure 3, native system is multimode redundant system, the SRAM memory identical including at least two and redundant system control circuit.Each SRAM memory is read by redundant system control circuit by data/address bus, address bus and control bus.As in figure 2 it is shown, described SRAM memory is made up of storage array, row decoding circuit, array decoding circuit, read/write circuit and interface circuit.
In sum, the present invention utilizes multiple identical SRAM memory to preserve many parts of data samples, the storage array of SRAM memory is wherein provided with the observation position of some preservation given datas, redundant system control circuit periodically checks the observation position in storage array, when finding that observing bit data occurs upset mistake, then refresh the data in suspect region, and the data will abandoned in employing suspect region when refreshing leading decision, after the data of suspect region are all refreshed, by the corresponding data recovery observing position.By the invention it is possible to improve the accuracy of redundancy judgement, reducing the data error rate of each memorizer, the performance finally making multi-mode redundant storage system overall is improved.
Claims (4)
1. the radioprotective SRAM multi-mode redundant method for designing judged based on data credibility, it is characterised in that the method includes following suitable
The step of sequence:
(1) multi-mode redundant storage system is formed by multiple identical SRAM memory and a redundant system control circuit；
(2) storage array of the SRAM memory in multi-mode redundant storage system selects multiple data bit as observing position, see
Examine position storage given data；
(3) redundant system control circuit carries out periodic test to the observation position in each SRAM storage array, when finding to observe position
There is upset mistake in data, then refreshes the suspect region observed around position that upset mistake occurs in corresponding SRAM storage array
In data bit, and abandon using these data during judgement before refreshing, after having refreshed, by the number of corresponding observation position
According to recovery.
The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility the most according to claim 1, its feature
Being: before reading data or refreshing during correct judgment data, redundant system control circuit reads all SRAM storage simultaneously
Device, to obtain many parts of data samples, then uses obedience majority vote method to judge result.
The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility the most according to claim 1, its feature
It is: the given data of described observation position storage is 0 or 1.
The radioprotective SRAM multi-mode redundant method for designing judged based on data credibility the most according to claim 1, its feature
It is: the data bit in described suspect region is all data around the observation position that data change in the range of contiguous physical
Position.
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| CN101930052A (en) * | 2010-07-21 | 2010-12-29 | 电子科技大学 | SRAM type FPGA digital sequential circuit online detection fault-tolerant system and method |
| CN102967823A (en) * | 2012-11-16 | 2013-03-13 | 中国航天科技集团公司第五研究院第五一〇研究所 | Single-particle multi-bit upsetting monitoring system |
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| US20070220367A1 (en) * | 2006-02-06 | 2007-09-20 | Honeywell International Inc. | Fault tolerant computing system |
| US7859292B1 (en) * | 2009-07-14 | 2010-12-28 | United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Methods and circuitry for reconfigurable SEU/SET tolerance |
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| US7764081B1 (en) * | 2005-08-05 | 2010-07-27 | Xilinx, Inc. | Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity |
| CN101930052A (en) * | 2010-07-21 | 2010-12-29 | 电子科技大学 | SRAM type FPGA digital sequential circuit online detection fault-tolerant system and method |
| CN102967823A (en) * | 2012-11-16 | 2013-03-13 | 中国航天科技集团公司第五研究院第五一〇研究所 | Single-particle multi-bit upsetting monitoring system |
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