CN104077453A - Semiconductor nanometer device rapid simulation method based on historical information - Google Patents

Abstract

The invention relates to a fast simulation method for semiconductor nano-devices based on historical information, which includes: recording and saving input and output information to form an input vector space when performing iterative calculations and the output vector space Among them: V ⁱⁿ represents the input voltage, V ^out represents the output voltage, i is the current iteration number, M is a natural number; use the linear equation x=A ^-1 b to find the weighting coefficient Where: A is a matrix of M×M dimensions, A _nm =(d _i -d _in ,d _i -d _im ), b and x are both M×1 dimensional vectors, Both m and n are natural numbers from 1 to M, and the remainder Calculate the i+1th iteration input This simulation method greatly reduces the number of iterations and speeds up the convergence.

Description

A Fast Simulation Method for Semiconductor Nano Devices Based on Historical Information

technical field

The invention relates to the technical field of integrated circuit testing and design, in particular to a fast simulation method for semiconductor nanometer devices based on historical information.

Background technique

In recent years, with the continuous shrinking of the size of semiconductor devices, the devices have entered the nanometer scale, and the use of computers to simulate devices is an important means to study device structures and improve device performance. For the simulation of nano-devices, as the scale shrinks, the precision requirements are getting higher and higher. In the three-dimensional simulation of the device, assuming that there are 100 grid points in each direction, it is necessary to solve 100*100*100 unknown equations, which brings computational complexity. Simulating semiconductor devices requires solving both the potential equation and the carrier transport equation. Among them, in the potential equation, the potential is a function of the carrier density, and in the carrier transport equation, the carrier density is a function of the potential. These two equations are coupled with each other to form a nonlinear equation system. For such To solve a system of nonlinear equations, two equations need to be iterated. For each iteration, the two transport equations need to be solved once, which consumes a lot of computer time.

The traditional method is: In the electronic design automation of semiconductor devices, it is necessary to solve the coupled potential equation and carrier transport equation. Consider two mutually coupled equations as a black box, and suppose the input quantity of the i-th iteration is The output is When the difference between the input quantity and the output quantity is less than a predetermined criterion ε, that is , it is considered that the two equations have reached self-consistency through iteration. The key to solving this problem is how to select the input amount of the next (i+1th) iteration make the equation converge as quickly as possible. The general method is to iterate through the relaxation method, that is, to obtain the next input amount through a relaxation factor α, that is

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&alpha;V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; )</span>$

The limitation of this method is that it is relatively dependent on α. If α is too large, it is easy to cause non-convergence. If α is too small, more iterations are required, and the convergence speed is too slow. The input amount of the next (i+1th) iteration of this method is only the same as the input of the ith time and output relevant, previous historical iteration information is ignored.

When performing iterations in the above-mentioned traditional methods, the general method is based on the results of the last calculation without taking into account historical information. Our research has found that historical iteration information can be used to speed up iterations. Therefore, we introduce a calculation method that reduces the number of iterations and speeds up the convergence speed, which has a positive effect on the automation of electronic design of semiconductor devices.

Contents of the invention

The technical problem to be solved in the present invention is how to provide a fast simulation method for semiconductor nano-devices based on historical information, which can reduce the number of iterations, thereby speeding up the convergence speed, and has a positive effect on the electronic design automation of semiconductor devices.

The above-mentioned technical problem of the present invention is solved like this: build a kind of semiconductor nano-device rapid simulation method based on historical information, it is characterized in that, this simulation method comprises the following steps when performing iterative calculation to solving potential equation and carrier transport equation:

Use historical iteration information: record and save the input and output historical information of the latest M iterations and And this input and output information and Compose the input vector space and the output vector space Among them: V ⁱⁿ represents the input voltage, V ^out represents the output voltage, i is the current iteration number, M is a natural number;

Use the linear equation x=A ^-1 b to find the weighting coefficient Where: A is a matrix of M×M dimensions, A _nm =(d _i -d _in ,d _i -d _im ); b and x are both M×1 dimensional vectors, Both m and n are natural numbers from 1 to M; the remainder

Calculate the i+1th iteration input $V_{i+1}^{\mathrm{in}}=\stackrel{\&OverBar;}{V_i^{\mathrm{out}}}=V_i^{\mathrm{out}}+\underset{m=1}{\overset{m}{\mathrm{\&Sigma;}}}{\mathrm{\&theta;}}_i^m(V_{i-m}^{\mathrm{out}}-V_i^{\mathrm{out}}).$

According to the fast simulation method provided by the present invention, M is a parameter that can be adjusted or changed, including automatic adjustment and artificial adjustment.

According to the fast simulation method provided by the present invention, when the parameter M is 0, $V_{i+1}^{\mathrm{in}}=(1-\mathrm{\&alpha;})V_i^{\mathrm{in}}+{\mathrm{\&alpha;V}}_i^{\mathrm{out}}=V_i^{\mathrm{in}}+\mathrm{\&alpha;}(V_i^{\mathrm{out}}-V_i^{\mathrm{in}}),$ α is the relaxation factor.

According to the fast simulation method provided by the present invention, when i<M+1, M is automatically adjusted to i-1.

According to the fast simulation method provided by the present invention, when i>M, M is equal to the original M value.

The rapid simulation method of semiconductor nano-devices based on historical information provided by the present invention is compared with the traditional relaxation method under the same device structure parameters and the same initial guess value conditions, using different open-source nano-device simulation tools, NanoMOS The device structures of different sizes were simulated with FeMOS, and the convergence speed was compared. While achieving the same solution accuracy, the number of iterations introduced to achieve the iteration is reduced, thereby reducing the calculation time, and the additional memory consumption and calculation time consumption are only used to solve an ordinary M×M dimensional linear equation Group. Therefore, the invention improves the simulation efficiency of nanometer devices, and achieves the effect of accelerating convergence in different device structures and using different software.

Description of drawings

The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

Fig. 1 is the device structural representation of the present invention application NanoMOS emulation in example 1;

Fig. 2 is under the same input initial condition, based on the NanoMOS finite difference method nano-device simulation tool and the Matlab toolkit, respectively applying the method of the present invention and the traditional method without applying the present invention, and comparing the calculation errors;

Fig. 3 is a schematic diagram of the device structure of the present invention using FeMOS simulation in Example 2;

Fig. 4 is under the same initial condition, based on FeMOS finite element nano-device simulation tool and Octave toolkit, apply the method of the present invention and the traditional method of not applying the present invention respectively, compare calculation error and convergence speed;

FIG. 5 is a partial enlargement of FIG. 4 .

Detailed ways

First, the core algorithm of the semiconductor nano-device fast simulation method based on historical information of the present invention is described:

(1) Algorithm principle

Since the historical information before the i-th iteration is also obtained through calculation, it can be used as a reference for obtaining the input of the (i+1)-th iteration. By including this historical information, it is more effective to achieve the purpose of rapid convergence. First define the margin of the i-th iteration as

${\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}$

Consider the input and output history information of the previous M iterations and the current input and output information, and use these input and output to form a vector space and Combine these historical information, after weighting, expand the input vector and output vector in the above space, denoted as and is the weighting coefficient when unfolding, and find the weighting coefficient is the key to effective use of historical iterative information

$\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; m</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; )</span>$

$\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; m</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; )</span>$

Then the corresponding margin expression is:

$\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; +</span>\underset{\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; )</span>$

In order to make the equation converge as soon as possible, it is necessary to make the margin As small as possible, the inner product of the margin is Minimizing the modulus of the remainder has:

$\frac{{<span\; class="notranslate">\; \&PartialD;</span>\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}{{<span\; class="notranslate">\; \&PartialD;</span>\mathrm{<span\; class="notranslate">\; \&theta;</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; m</span>}}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}<span\; class="notranslate">\; ,</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{{\mathrm{<span\; class="notranslate">\; d</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}$

Simplifying the above formula, we can get a system of linear equations

x＝A ^- 1b

Where A is an M×M dimensional matrix, A _nm =(d _i -d _in ,d _i -d _im ), b and x are M×1 dimensional vectors, b _m =(d _i -d _im ,d _i ), Both A and b are known quantities, and the expansion coefficient can be obtained by solving the equation Therefore, it can be expanded in the historical iteration information, and the input of the (i+1)th iteration is obtained as

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; in</span>}}<span\; class="notranslate">\; =</span>\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; out</span>}}}$

Compared with the general method without using the present invention, by making the margin Minimum, contains the input and output history information of the previous M iterations.

(ii) Boundary value

The step number M parameter of the historical iteration information used in the fast iterative method is adjustable, and the value range of M is a natural number greater than or equal to 1, and several boundary values are as follows;

1. When M is 0, only the information of this iteration is used, that is, it degenerates into a relaxation method that does not use historical information;

2. When M is 1, use the information of this iteration and the information of the last iteration;

3. When M is greater than or equal to 1 and less than the number of iterations i, use the historical information from the i-M to the i-th;

4. When M is greater than the number of iterations i, use all historical information from step 1 to step i.

Second, the present invention will be further described below in conjunction with specific implementation examples and accompanying drawings, but the present invention is not limited to the following two embodiments and the two calculation tools of NanoMOS and FeMOS, wherein FeMOS is realized based on the finite element method.

Example 1

Based on the NanoMOS tool, the method without using the present invention was compared with the method using the present invention. (NanoMOS is an open source nano-device two-dimensional simulation software developed by Dr. Ren Zhibin of Purdue University in the United States, which utilizes the finite difference calculation method, based on the Matlab toolkit, and does not use the iterative method of the present invention).

The device structure is shown in Figure 1. The source and drain are n-type doped with a doping concentration of 1020m-3, and the channel is p-type doped with a concentration of 1016m-3. The length of the channel is 10nm, the length of the source and drain is 5nm, and there is a transition region between the source and drain and the channel with a length of 8nm. The width of the bulk silicon is 4nm, and the thickness of the gate oxide layer is 1nm. Based on the requirements of high-performance devices, the power supply voltage is 0.8V, and the gate voltage and drain voltage are scanned from 0.1V to 0.8V with a step size of 0.1 V, while changing the drain voltage/gate voltage, the gate voltage/drain voltage was fixed at 0.8 V, and the convergence criterion was set at 0.5 meV. First set a fixed gate voltage, and then take 0V as the initial value for the drain voltage, and scan to 0.8V with a step size of 0.1V. Then, the gate voltage is scanned from 0V to 0.8V with a step size of 0.1V. There are a total of 64 ((0.8/0.1)*(0.8/0.1)) bias points. Whenever the gate voltage changes, the drain voltage of 0V is taken as the initial value of the classical approximation result, and the other bias points are biased one above the other. Point the result to the initial value. Run in Matlab, based on the built-in cputime command timing, the number of iterations that does not use the method of the present invention is 125 times, and the simulation time is 949 seconds, and the number of iterations that uses the method of the present invention (M value gets 2) is 75 times, and the simulation time is 624 seconds, as shown in Figure 2.

Example 2

Based on the FeMOS tool, without using the method of the present invention, a comparison was made with the method of the present invention. (FeMOS is the open-source nano-device two-dimensional simulation software developed by Dr. Oka Kurniawan of the Singapore High Performance Computing Center, which utilizes the finite element calculation method, based on the Octave toolkit, and does not use the method of the present invention itself.)

The device structure is shown in Figure 3. The default device structure of FeMOS is adopted. The bulk silicon thickness is 3nm, the gate oxide layer thickness is 1nm, the source and drain are 5nm each, the channel length is 10nm, and the total device length is 20nm. In the transport direction, a uniform grid point discretization of 0.25nm is adopted, the source and drain are n-type doped, the doping concentration is 1020m-3, the channel is p-type doped, the concentration is 1016m-3, and the power supply voltage is 0.4V. The gate and the drain are scanned from 0V respectively, with a step size of 0.05V. Among them, the gate voltage is the scan of the outer layer, and the drain voltage is the scan of the inner layer. First set a fixed gate voltage, and then take 0V as the initial value for the drain voltage, and scan to 0.4V with a step size of 0.05V. Then, the gate voltage is scanned from 0V to 0.4V with a step size of 0.05V. There are a total of 81 ((0.4/0.05+1)*(0.4/0.05+1)) bias points. Whenever the gate voltage changes, the drain voltage of 0V is taken as the initial value of the classical approximation result, and other bias points The result at the previous bias point is the initial value. The judging standard location of convergence is 1 millielectron volts, use the built-in order cputime of Octave software package to carry out timing, compare on the same computer, when not using the method of the present invention, time-consuming is 33207 seconds, using the method of the present invention (M value Taking 3), the time spent is 17309 seconds. Without using the method of the present invention, the number of iterations is 611, and using the method of the present invention, the number of iterations is 317, as shown in FIG. 4 .

The partial enlarged view is shown in Figure 5. It can be seen that for a bias point, iterations are performed from the same initial value. In the case of using the present invention, convergence is achieved through 5 iterations. In the case of not using the present invention, it is required 9 iterations.

It can be seen from Examples 1-2 that the nano-device simulation technology based on historical iteration information proposed by the present invention can be effectively applied to different nano-device simulation tools, and the application of historical iteration information can effectively reduce the number of iterations and speed up simulation efficiency.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the claims of the present invention shall fall within the scope of the claims of the present invention.

Claims (5)

1. the semiconductor nano device rapid simulation method based on historical information, is characterized in that, this emulation mode is comprising the following steps solving when potential equation and carrier transport equation carry out interative computation:

Utilize historical iterative information: the input and output historical information of M time nearest iteration preserved in record with and this input/output information with form input vector space with output vector space wherein: V ⁱⁿrepresent input voltage, V ^outrepresent output voltage, i is current iteration number of times, and M is natural number;

Utilize linear equation x=A ^-1b asks for weighting coefficient wherein: A is the matrix of M * M dimension, A _nm=(d _i-d _i-n, d _i-d _i-m); B and x are M * 1 n dimensional vector ns, m, n is 1 to M natural number; Surplus

Calculate the i+1 time iteration input $V_{i+1}^{\mathrm{in}}=\stackrel{\&OverBar;}{V_i^{\mathrm{out}}}=V_i^{\mathrm{out}}+\underset{m=1}{\overset{M}{\mathrm{\&Sigma;}}}{\mathrm{\&theta;}}_i^m(V_{i-m}^{\mathrm{out}}-V_i^{\mathrm{out}}).$

2. rapid simulation method according to claim 1, is characterized in that, M is the parameter that can adjust or change.

3. rapid simulation method according to claim 2, is characterized in that, when parameter M is 0, $V_{i+1}^{\mathrm{in}}=(1-\mathrm{\&alpha;})V_i^{\mathrm{in}}+{\mathrm{\&alpha;V}}_i^{\mathrm{out}}=V_i^{\mathrm{in}}+\mathrm{\&alpha;}(V_i^{\mathrm{out}}-V_i^{\mathrm{in}}),$ α is relaxation factor.

4. according to rapid simulation method described in any one in claim 1-3, it is characterized in that, when i < M+1, M is adjusted into i-1 automatically.

5. rapid simulation method according to claim 4, is characterized in that, when i > M, M equals original M value.