CN104064595A - An Enhanced AlGaN/GaN MISHEMT Device Structure and Fabrication Method Based on Groove Gate Structure - Google Patents
An Enhanced AlGaN/GaN MISHEMT Device Structure and Fabrication Method Based on Groove Gate Structure Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 claims description 16
- 238000005566 electron beam evaporation Methods 0.000 claims description 15
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/472—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having lower bandgap active layer formed on top of wider bandgap layer, e.g. inverted HEMT
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- H—ELECTRICITY
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- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
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Abstract
Description
技术领域 technical field
本发明涉及微电子技术领域，尤其是涉及一种基于槽栅结构的增强型AlGaN/GaN MISHEMT器件结构及其制作方法。 The invention relates to the technical field of microelectronics, in particular to an enhanced AlGaN/GaN MISHEMT device structure based on a trench gate structure and a manufacturing method thereof.
背景技术 Background technique
近年来以SiC和GaN为代表的第三带宽禁带隙半导体以其禁带宽度大、击穿电场高、热导率高、饱和电子速度大和异质结界面二维电子气浓度高等特性，使其受到广泛关注。在理论上，利用这些材料制作的高电子迁移率晶体管HEMT、发光二极管LED、激光二极管LD等器件比现有器件具有明显的优越特性，因此近些年来国内外研究者对其进行了广泛而深入的研究，并取得了令人瞩目的研究成果。 In recent years, the third bandgap semiconductor represented by SiC and GaN has the characteristics of large bandgap, high breakdown electric field, high thermal conductivity, high saturated electron velocity and high concentration of two-dimensional electron gas at the heterojunction interface. It has received widespread attention. In theory, high electron mobility transistor HEMT, light emitting diode LED, laser diode LD and other devices made of these materials have obvious superior characteristics than existing devices, so in recent years, researchers at home and abroad have conducted extensive and in-depth research on them. research and achieved remarkable results.
AlGaN/GaN异质结高电子迁移率晶体管HEMT在高温器件及大功率微波器件方面已显示出了得天独厚的优势，追求器件高频率、高压、高功率吸引了众多的研究。近年来，制作更高频率高压AlGaN/GaN HEMT成为关注的又一研究热点。由于AlGaN/GaN异质结生长完成后，异质结界面就存在大量二维电子气2DEG，并且其迁移率很高，因此我们能够获得较高的器件频率特性。在提高AlGaN/GaN异质结电子迁移率晶体管击穿电压方面，人们进行了大量的研究，发现AlGaN/GaN HEMT器件的击穿主要发生在栅靠漏端，因此要提高器件的击穿电压，必须使栅漏区域的电场重新分布，尤其是降低栅靠漏端的电场，为此，人们提出了采用场板结构的方法： AlGaN/GaN heterojunction high electron mobility transistor HEMT has shown unique advantages in high-temperature devices and high-power microwave devices. The pursuit of high-frequency, high-voltage, and high-power devices has attracted a lot of research. In recent years, fabrication of higher frequency and high voltage AlGaN/GaN HEMTs has become another research focus. Since the growth of the AlGaN/GaN heterojunction is completed, there are a large number of two-dimensional electron gas 2DEG at the interface of the heterojunction, and its mobility is very high, so we can obtain higher device frequency characteristics. A lot of research has been done on improving the breakdown voltage of AlGaN/GaN heterojunction electron mobility transistors, and it was found that the breakdown of AlGaN/GaN HEMT devices mainly occurs at the gate-to-drain end, so it is necessary to increase the breakdown voltage of the device. It is necessary to redistribute the electric field in the gate-drain region, especially to reduce the electric field at the drain end of the gate. For this reason, a method of using a field plate structure has been proposed:
采用场板结构。参见YujiAndo,Akio Wakejima,Yasuhiro Okamoto等的 Novel AlGaN/GaN dual-field-plate FET with high gain,increased linearity and stability,IEDM2005,pp.576-579,2005。在AlGaN/GaN HEMT器件中采用场板结构，将器件的击穿电压有一个大幅度的提高，并且降低了栅漏电容，提高了器件的线性度和稳定性。 Adopt field plate structure. See YujiAndo, Akio Wakejima, Yasuhiro Okamoto et al. Novel AlGaN/GaN dual-field-plate FET with high gain, increased linearity and stability, IEDM2005, pp.576-579, 2005. The field plate structure is adopted in the AlGaN/GaN HEMT device, which greatly increases the breakdown voltage of the device, reduces the gate-to-drain capacitance, and improves the linearity and stability of the device.
发明内容 Contents of the invention
本发明为了克服上述的不足，提供了一种基于槽栅结构的增强型AlGaN/GaN MISHEMT器件结构及其制作方法，同时采用场板结构和偶极子层对栅靠近漏端的电场进行调制。 In order to overcome the above-mentioned shortcomings, the present invention provides an enhanced AlGaN/GaN MISHEMT device structure based on a trench gate structure and its manufacturing method, while using a field plate structure and a dipole layer to modulate the electric field near the drain end of the gate.
本发明的技术方案如下： Technical scheme of the present invention is as follows:
一种基于槽栅结构的增强型AlGaN/GaN MISHEMT器件结构，从下往上依次包括衬底、GaN缓冲层、AlN隔离层、GaN沟道层、AlGaN本征层和AlGaN掺杂层，所述AlGaN掺杂层上间隔设有源极、ITO栅电极、有机绝缘层和漏极，所述源极与所述ITO栅电极之间设有钝化层，所述有机绝缘层上设有ITO栅电极，所述有机绝缘层一侧设有钝化层，所述漏极与钝化层之间淀积有LiF薄膜层，所述漏极与LiF薄膜层上淀积有AL金属层。 An enhanced AlGaN/GaN MISHEMT device structure based on a trench gate structure, which includes a substrate, a GaN buffer layer, an AlN isolation layer, a GaN channel layer, an AlGaN intrinsic layer, and an AlGaN doped layer from bottom to top. A source electrode, an ITO gate electrode, an organic insulating layer and a drain electrode are arranged at intervals on the AlGaN doped layer, a passivation layer is arranged between the source electrode and the ITO gate electrode, and an ITO gate electrode is arranged on the organic insulating layer. An electrode, a passivation layer is provided on one side of the organic insulating layer, a LiF film layer is deposited between the drain electrode and the passivation layer, and an Al metal layer is deposited on the drain electrode and the LiF film layer.
所述衬底材料为蓝宝石、碳化硅、GaN或MgO。 The substrate material is sapphire, silicon carbide, GaN or MgO.
所述AlGaN掺杂层中Al的组分含量在0～1之间，Ga的组分含量与Al的组分含量之和为1。 The composition content of Al in the AlGaN doped layer is between 0 and 1, and the sum of the composition content of Ga and the composition content of Al is 1.
所述有机绝缘层为PTFE层，所述PTFE层的厚度为200nm～300nm。 The organic insulating layer is a PTFE layer, and the thickness of the PTFE layer is 200nm-300nm.
所述钝化层中包括Si3N4、Al2O3、HfO2和HfSiO中的一种或多种。 The passivation layer includes one or more of Si3N4, Al2O3, HfO2 and HfSiO.
上述的一种基于槽栅结构的增强型AlGaN/GaN MISHEMT器件结构通过以下方法制作： The above-mentioned enhanced AlGaN/GaN MISHEMT device structure based on the trench gate structure is fabricated by the following method:
(1)对外延生长的AlGaN/GaN材料进行有机清洗，用流动的去离子水清洗后，放入HCl:H2O＝1:1的溶液中进行腐蚀30-60s，最后用流动的去离子水清洗并用高纯氮气吹干； (1) Organically clean the epitaxially grown AlGaN/GaN material, wash it with flowing deionized water, put it into a solution of HCl:H2O=1:1 for etching for 30-60s, and finally clean it with flowing deionized water And blow dry with high-purity nitrogen;
(2)对清洗干净的AlGaN/GaN材料进行光刻和干法刻蚀，形成有源区台面； (2) Perform photolithography and dry etching on the cleaned AlGaN/GaN material to form a mesa in the active region;
(3)对制备好台面的AlGaN/GaN材料进行光刻，形成源漏区，放入电子束蒸发台中淀积欧姆接触金属Ti/Al/Ni/Au＝20/120/45/50nm，并进行剥离,最后在氮气环境中进行850℃35s的快速热退火，形成欧姆接触； (3) Perform photolithography on the prepared AlGaN/GaN material on the mesa to form source and drain regions, put it into an electron beam evaporation station to deposit ohmic contact metal Ti/Al/Ni/Au=20/120/45/50nm, and perform Peel off, and finally perform rapid thermal annealing at 850°C for 35s in a nitrogen environment to form an ohmic contact;
(4)将制备好欧姆接触的器件进行光刻，形成有机绝缘介质PTFE淀积区域，然后放入氧等离子处理室中对AlGaN表面进行轻度氧化处理，然后放入电子束蒸发台中：反应室真空抽至4.0*10-3帕，缓慢加电压使控制PTFE蒸发速率为0.1nm/s,淀积200-300nm厚的PTFE薄膜； (4) Perform photolithography on the prepared ohmic contact device to form an organic insulating medium PTFE deposition area, then put it into an oxygen plasma treatment chamber to slightly oxidize the AlGaN surface, and then put it into an electron beam evaporation table: reaction chamber Vacuum to 4.0*10-3 Pa, slowly apply voltage to control the evaporation rate of PTFE to 0.1nm/s, deposit 200-300nm thick PTFE film;
(5)将淀积好PTFE薄膜的器件放入丙酮溶液中浸泡30-60min，进行超声剥离； (5) Put the device with deposited PTFE film into the acetone solution and soak for 30-60min, and carry out ultrasonic stripping;
(6)对完成PTFE剥离的器件进行光刻，形成栅以及栅场板区，放入电子束蒸发台中淀积200nm厚的ITO栅电极； (6) Perform photolithography on the device that has completed the PTFE stripping to form a gate and a grid field plate area, and put it into an electron beam evaporation table to deposit a 200nm thick ITO gate electrode;
(7)将淀积好栅电极的器件放入丙酮溶液中浸泡30-60min，进行超声剥离，形成栅场板结构； (7) Soak the device with the deposited gate electrode in an acetone solution for 30-60 minutes, and perform ultrasonic peeling to form a grid field plate structure;
(8)将完成栅场板制备的器件进行光刻，形成绝缘介质LiF的淀积区域，然后放入电子束反应室真空抽至4.0*10-3帕，缓慢加电压使控制LiF蒸发速率为0.5nm/s,淀积100-200nm厚的LiF薄膜； (8) Perform photolithography on the device that has completed the preparation of the grid field plate to form a deposition area for insulating dielectric LiF, then put it into the electron beam reaction chamber and vacuumize it to 4.0*10-3 Pa, and slowly apply voltage to control the evaporation rate of LiF as 0.5nm/s, deposit 100-200nm thick LiF film;
(9)将淀积好LiF薄膜的器件放入丙酮溶液中浸泡30-60min，进行超声剥离； (9) Put the device deposited LiF thin film into acetone solution and soak for 30-60min, and carry out ultrasonic stripping;
(10)对完成LiF制备的器件进行光刻，形成源场板区，放入电子束蒸发台中淀积200nm厚的Al金属； (10) Photolithography is carried out on the device prepared by LiF to form a source field plate area, and put into an electron beam evaporation table to deposit Al metal with a thickness of 200nm;
(11)将淀积好Al金属的器件放入丙酮溶液中浸泡30-60min，进行超声剥离，形成漏场板结构； (11) Put the device deposited with Al metal into the acetone solution and soak for 30-60min, and carry out ultrasonic stripping to form a leaky field plate structure;
(12)将完成的器件放入PECVD反应室淀积SiN钝化膜； (12) Put the completed device into a PECVD reaction chamber to deposit a SiN passivation film;
(13)将器件再次进行清洗、光刻显影，形成SiN薄膜的刻蚀区，并放入 ICP干法刻蚀反应室中，将源极、漏极上面覆盖的SiN薄膜刻蚀掉； (13) The device is cleaned and photolithographically developed again to form an etching area of the SiN film, and put into an ICP dry etching reaction chamber, and the SiN film covered on the source electrode and the drain electrode is etched away;
(14)将器件进行清洗、光刻显影，并放入电子束蒸发台中淀积Ti/Au＝20/200nm的加厚电极，完成整体器件的制备。 (14) The device is cleaned, photolithographically developed, and placed in an electron beam evaporation station to deposit a thickened electrode with Ti/Au=20/200nm to complete the preparation of the overall device.
所述步骤(12)中的工艺条件为：SiH4的流量为40sccm，NH3的流量为10sccm，反应室压力为1～2Pa,射频功率为40W，淀积200nm～300nm厚的SiN钝化膜 The process conditions in the step (12) are: the flow of SiH4 is 40sccm, the flow of NH3 is 10sccm, the pressure of the reaction chamber is 1～2Pa, the radio frequency power is 40W, and the SiN passivation film with a thickness of 200nm～300nm is deposited
所述步骤(13)中的工艺条件为：上电极功率为200W，下电极功率为20W，反应室压力为1.5Pa，CF4的流量为20sccm,Ar气的流量为10sccm，刻蚀时间为10min。 The process conditions in the step (13) are: the power of the upper electrode is 200W, the power of the lower electrode is 20W, the reaction chamber pressure is 1.5Pa, the flow of CF4 is 20sccm, the flow of Ar gas is 10sccm, and the etching time is 10min.
本发明的有益效果是： The beneficial effects of the present invention are:
(1)本发明采用PTFE和ITO所产生的偶极子层实现了对2DEG浓度的部分耗尽作用，实现了栅靠近漏端电场的调制； (1) The present invention adopts the dipole layer produced by PTFE and ITO to realize the partial depletion effect on the 2DEG concentration, and realizes the modulation of the electric field near the gate to the drain;
(2)本发明同时利用了ITO作为栅场版，再次实现栅靠近漏端电场的调制，提高了AlGaN/GaN HEMT器件反偏时的击穿电压； (2) The present invention utilizes ITO as the grid field plate at the same time, realizes the modulation of the electric field close to the drain end again, and improves the breakdown voltage when the AlGaN/GaN HEMT device is reverse-biased;
(3)本发明利用LiF和Al所产生的偶极子层实现了2DEG浓度的部分增加，减小了器件的导通电阻，并利用金属Al形成漏场板，进一步提高了AlGaN/GaN HEMT器件反偏时的击穿电压。 (3) The present invention utilizes the dipole layer produced by LiF and Al to realize the partial increase of 2DEG concentration, reduces the on-resistance of the device, and utilizes metal Al to form the drain field plate, further improves the AlGaN/GaN HEMT device Breakdown voltage at reverse bias.
附图说明 Description of drawings
本发明将通过例子并参照附图的方式说明，其中： The invention will be illustrated by way of example with reference to the accompanying drawings, in which:
图1是本发明的示意图； Fig. 1 is a schematic diagram of the present invention;
图2-4是本发明的制作流程图。 Fig. 2-4 is the production flowchart of the present invention.
具体实施方式 Detailed ways
现在结合附图对本发明作进一步详细的说明。这些附图均为简化的示意图，仅以示意方式说明本发明的基本结构，因此其仅显示与本发明有关的构成。 The present invention is described in further detail now in conjunction with accompanying drawing. These drawings are all simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, so they only show the configurations related to the present invention.
如图1所示，本实施例提供了一种基于槽栅结构的增强型AlGaN/GaN MISHEMT器件结构，从下往上依次包括衬底、GaN缓冲层、AlN隔离层、GaN沟道层、AlGaN本征层和AlGaN掺杂层，所述AlGaN掺杂层上间隔设有源极、ITO栅电极、有机绝缘层和漏极，所述源极与所述ITO栅电极之间设有钝化层，所述有机绝缘层上设有ITO栅电极，所述有机绝缘层一侧设有钝化层，所述漏极与钝化层之间淀积有LiF薄膜层，所述漏极与LiF薄膜层上淀积有AL金属层，其中，所述衬底材料为蓝宝石、碳化硅、GaN或MgO，所述AlGaN掺杂层中Al的组分含量在0～1之间，Ga的组分含量与Al的组分含量之和为1，所述有机绝缘层为PTFE层，所述PTFE层的厚度为200nm～300nm。所述钝化层中包括Si3N4、Al2O3、HfO2和HfSiO中的一种或多种。 As shown in Figure 1, this embodiment provides an enhanced AlGaN/GaN MISHEMT device structure based on a trench gate structure, which includes a substrate, a GaN buffer layer, an AlN isolation layer, a GaN channel layer, an AlGaN Intrinsic layer and AlGaN doped layer, the AlGaN doped layer is provided with a source electrode, an ITO gate electrode, an organic insulating layer and a drain electrode at intervals, and a passivation layer is arranged between the source electrode and the ITO gate electrode , the organic insulating layer is provided with an ITO gate electrode, one side of the organic insulating layer is provided with a passivation layer, and a LiF thin film layer is deposited between the drain electrode and the passivation layer, and the drain electrode and the LiF thin film An Al metal layer is deposited on the layer, wherein the substrate material is sapphire, silicon carbide, GaN or MgO, the composition content of Al in the AlGaN doped layer is between 0 and 1, and the composition content of Ga The sum of the contents of Al and Al is 1, the organic insulating layer is a PTFE layer, and the thickness of the PTFE layer is 200nm-300nm. The passivation layer includes one or more of Si3N4, Al2O3, HfO2 and HfSiO.
在栅靠漏边缘附近淀积有机绝缘层PTFE，然后在PTFE结构上淀积ITO栅电极，此时会在PTFE表面产生偶极子层：在PTFE与ITO一侧会产生正极化电荷，PTFE与AlGaN一侧会产生负极化电荷，从而对下方的2DEG浓度产生了耗尽作用，导致了2DEG浓度的减小，增加了栅电极反偏状态下沟道区域的耗尽长度，同时，利用Al与LiF接触所产生的反向电偶极子层的电场效应，使得LiF对应区域下方的2DEG的浓度上升，从而更进一步提高了耗尽型器件的击穿电压。 The organic insulating layer PTFE is deposited near the drain edge of the gate, and then the ITO gate electrode is deposited on the PTFE structure. At this time, a dipole layer will be generated on the surface of PTFE: positive polarization charges will be generated on the side of PTFE and ITO, and PTFE and ITO Negative polarization charges will be generated on the AlGaN side, which will deplete the 2DEG concentration below, resulting in a decrease in the 2DEG concentration and increasing the depletion length of the channel region in the reverse biased state of the gate electrode. At the same time, using Al and The electric field effect of the reverse electric dipole layer generated by the LiF contact increases the concentration of 2DEG below the LiF corresponding region, thereby further improving the breakdown voltage of the depletion-mode device.
如图2-4所示，本发明的制作步骤如下： As shown in Figure 2-4, the manufacturing steps of the present invention are as follows:
(1)对外延生长的AlGaN/GaN材料进行有机清洗，用流动的去离子水清洗后，放入HCl:H2O＝1:1的溶液中进行腐蚀30-60s，最后用流动的去离子水清洗并用高纯氮气吹干； (1) Organically clean the epitaxially grown AlGaN/GaN material, wash it with flowing deionized water, put it into a solution of HCl:H2O=1:1 for etching for 30-60s, and finally clean it with flowing deionized water And blow dry with high-purity nitrogen;
(2)对清洗干净的AlGaN/GaN材料进行光刻和干法刻蚀，形成有源区台面； (2) Perform photolithography and dry etching on the cleaned AlGaN/GaN material to form a mesa in the active region;
(3)对制备好台面的AlGaN/GaN材料进行光刻，形成源漏区，放入电子束蒸发台中淀积欧姆接触金属Ti/Al/Ni/Au＝20/120/45/50nm，并进行剥离,最后在氮气环境中进行850℃35s的快速热退火，形成欧姆接触； (3) Perform photolithography on the prepared AlGaN/GaN material on the mesa to form source and drain regions, put it into an electron beam evaporation station to deposit ohmic contact metal Ti/Al/Ni/Au=20/120/45/50nm, and perform Peel off, and finally perform rapid thermal annealing at 850°C for 35s in a nitrogen environment to form an ohmic contact;
(4)将制备好欧姆接触的器件进行光刻，形成有机绝缘介质PTFE淀积区域，然后放入氧等离子处理室中对AlGaN表面进行轻度氧化处理，然后放入电子束蒸发台中：反应室真空抽至4.0*10-3帕，缓慢加电压使控制PTFE蒸发速率为0.1nm/s,淀积200-300nm厚的PTFE薄膜； (4) Perform photolithography on the prepared ohmic contact device to form an organic insulating medium PTFE deposition area, then put it into an oxygen plasma treatment chamber to slightly oxidize the AlGaN surface, and then put it into an electron beam evaporation table: reaction chamber Vacuum to 4.0*10-3 Pa, slowly apply voltage to control the evaporation rate of PTFE to 0.1nm/s, deposit 200-300nm thick PTFE film;
(5)将淀积好PTFE薄膜的器件放入丙酮溶液中浸泡30-60min，进行超声剥离； (5) Put the device with deposited PTFE film into the acetone solution and soak for 30-60min, and carry out ultrasonic stripping;
(6)对完成PTFE剥离的器件进行光刻，形成栅以及栅场板区，放入电子束蒸发台中淀积200nm厚的ITO栅电极； (6) Perform photolithography on the device that has completed the PTFE stripping to form a gate and a grid field plate area, and put it into an electron beam evaporation table to deposit a 200nm thick ITO grid electrode;
(7)将淀积好栅电极的器件放入丙酮溶液中浸泡30-60min，进行超声剥离，形成栅场板结构； (7) Soak the device with the deposited gate electrode in an acetone solution for 30-60 minutes, and perform ultrasonic peeling to form a grid field plate structure;
(8)将完成栅场板制备的器件进行光刻，形成绝缘介质LiF的淀积区域，然后放入电子束反应室真空抽至4.0*10-3帕，缓慢加电压使控制LiF蒸发速率为0.5nm/s,淀积100-200nm厚的LiF薄膜； (8) Perform photolithography on the device that has completed the preparation of the grid field plate to form a deposition area for insulating dielectric LiF, then put it into the electron beam reaction chamber and vacuumize it to 4.0*10-3 Pa, and slowly apply voltage to control the evaporation rate of LiF as 0.5nm/s, deposit 100-200nm thick LiF film;
(9)将淀积好LiF薄膜的器件放入丙酮溶液中浸泡30-60min，进行超声剥离； (9) Put the device deposited LiF thin film into acetone solution and soak for 30-60min, and carry out ultrasonic stripping;
(10)对完成LiF制备的器件进行光刻，形成源场板区，放入电子束蒸发台中淀积200nm厚的Al金属； (10) Photolithography is carried out on the device prepared by LiF to form a source field plate area, and put into an electron beam evaporation table to deposit Al metal with a thickness of 200nm;
(11)将淀积好Al金属的器件放入丙酮溶液中浸泡30-60min，进行超声剥离，形成漏场板结构； (11) Put the device deposited with Al metal into the acetone solution and soak for 30-60min, and carry out ultrasonic stripping to form a leaky field plate structure;
(12)将完成的器件放入PECVD反应室淀积SiN钝化膜；工艺条件为：SiH4的流量为40sccm，NH3的流量为10sccm，反应室压力为1～2Pa,射频功率为40W，淀积200nm～300nm厚的SiN钝化膜； (12) Put the completed device into a PECVD reaction chamber to deposit a SiN passivation film; the process conditions are: the flow rate of SiH4 is 40sccm, the flow rate of NH3 is 10sccm, the pressure of the reaction chamber is 1-2Pa, and the radio frequency power is 40W. 200nm-300nm thick SiN passivation film;
(13)将器件再次进行清洗、光刻显影，形成SiN薄膜的刻蚀区，并放入ICP干法刻蚀反应室中，工艺条件为：上电极功率为200W，下电极功率为20W，反应室压力为1.5Pa，CF4的流量为20sccm,Ar气的流量为10sccm，刻蚀时间为10min，将源极、漏极上面覆盖的SiN薄膜刻蚀掉； (13) The device is cleaned again, photolithographically developed, and the etching area of the SiN film is formed, and placed in the ICP dry etching reaction chamber. The process conditions are: the power of the upper electrode is 200W, and the power of the lower electrode is 20W. The chamber pressure is 1.5Pa, the flow rate of CF4 is 20 sccm, the flow rate of Ar gas is 10 sccm, the etching time is 10 min, and the SiN film covered on the source and drain is etched away;
(14)将器件进行清洗、光刻显影，并放入电子束蒸发台中淀积Ti/Au＝20/200nm的加厚电极，完成整体器件的制备。 (14) The device is cleaned, photolithographically developed, and placed in an electron beam evaporation station to deposit a thickened electrode with Ti/Au=20/200nm to complete the preparation of the overall device.
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。 The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be It is regarded as the protection scope of the present invention.
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| CN107230614A (en) * | 2016-03-25 | 2017-10-03 | 北京大学 | Preparation method of gallium nitride semiconductor device |
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