CN104064150A - Two-channel signal transmitting method for LED driving chips - Google Patents
Two-channel signal transmitting method for LED driving chips Download PDFInfo
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Abstract
The invention discloses a two-channel signal transmitting method for LED driving chips. The method supports two-channel single-line signal transmission with an input channel 1 with the higher transmission priority, in the signal transmitting process, all the chips generate a synchronous sampling clock according to received single-line signals, and then the single-line signals are locally decoded; after a certain bit number of data signals are received, the chips start to utilize internal clocks to fast recover the single-line signals according to the encoding mode of the Manchester code and transmit the single-line signals to the next-level chip; meanwhile, a protocol recognition module controls a display output module according to data obtained through local decoding, and therefore display output can be achieved. The two-channel signal transmitting method can meet high-reliability, high-speed and long-stance single-line signal transmission requirement, and infinite cascading of the LED driving chips can be achieved.
Description
Technical field
The present invention relates to single line data-signal high-speed transfer agreement and signal processing method that LED drives chip cascade, specifically refer to that a kind of LED drives chip double-channel signal transmission method.
Background technology
At present, LED drives in the single line data high-speed transmission plan of chip cascade, main DALI (Digital Addressable Lighting Interface) agreement or the similar host-host protocol of adopting, utilize return-to-zero code to encode to data, by a signal wire, realize the high-speed transfer of data.In actual application, due to bad or service time of welding the long transmission interface that causes aging, all can cause transmission line to come off, thus cause transmitting unreliable.In important festivals, to spectators, show that in the lighting effects situation of magnificent mansion, these unreliabilities are not allowed especially.In addition, owing to having the inconsistency of technique or the factors such as variation of applied environment in integrated circuit processing and making process, cause the pulse width of Efficient Characterization single line data-signal in transmitting procedure, to occur the phenomenon that narrows down step by step or broaden, to such an extent as to a cascade number is when more, the data-signal of single wire transmission can not effectively characterize its entrained data message, causes correctly display color data of chip.This has just limited single line data-signal and has driven the transmission number in chip at cascade LED, has affected the distance of single line data-signal transmission simultaneously.Finally, because external environment condition changes or the factor such as unstable of power supply causes the unstable of chip internal clock, or single line data signal source to send the code-element period of signal unstable, also can affect chip to being correctly decoded of single line data-signal, thereby make chip can not correctly show data.
Above-mentionedly cause that single line data-signal transmits after insecure factor taking into full account, the present invention proposes and has realized a kind of LED to drive chip double-channel signal transmission method, has realized highly reliable, two-forty, the transmission at a distance of single line data-signal.
Summary of the invention
The object of the invention is to propose a kind of LED and drive chip double-channel signal transmission method, take into full account that signalling channel is unreliable, the factor of the restriction single line data-signal transmission such as pulse width variation, clock jitter or code-element period variation, strengthen the antijamming capability that LED drives chip, realize highly reliable, two-forty, the long-distance transmissions of single line data-signal.
For achieving the above object, the present invention is by the following technical solutions:
Adopt single wire transmission, defer to following communication protocol and utilize Synchronization mode to carry out signal transmission.
Chip comprises local decode module, signal recover module, protocol identification module, shows output module, internal clocking.
The function that possesses double-channel signal transmission, and input channel 1 has higher transmission priority than input channel 2, when two passages transmit effective Manchester code signal simultaneously, chip acquiescence receives the data-signal of input channel 1, when input channel 1 is idle, chip can detect the signal path situation of input channel 1, once situation about opening circuit, chip automatically switches to input channel 2, and receives the data-signal of being inputted by passage 2.
In data-signal transmitting procedure, signal pulse width narrows down or broadens, because external environment condition changes, occur in situation that clock jitter or code-element period change, local decode module adopts adaptive algorithm to produce exactly synchronous clock, correctly single-wire signal is decoded simultaneously.
After receiving the data-signal of certain bit number, chip can automatically adapt to external environment condition and change the clock jitter producing, and utilizes internal clocking according to the coded system of Manchester code, and quick and complete recovery single-wire signal is also transferred to next stage chip.
Data Transport Protocol is comprised of frame head, instruction, data three parts, and when detecting frame head, chip starts the single-wire signal of decoding, and is combined, with the difference in functionality completing by different instructions and corresponding data simultaneously.
Circuit manufactures integrated circuit (IC) chip, comprises that two input channels, two output channels, three LED drive port, adopt SOP14 or DIP14 encapsulation.
Adopt after such scheme, chip supports input channel 1 to have the more binary channels single-wire signal transmission of high-transmission priority, and in the transmitting procedure of signal, each chip is according to receiving single-wire signal, produce synchronized sampling clock, and then single-wire signal is carried out to local decode; After receiving the data-signal of certain bit number, chip starts to utilize internal clocking according to the coded system of Manchester code, and quick and complete recovery single-wire signal is also transferred to next stage chip; Meanwhile, the data that protocol identification module obtains according to local decode are controlled showing output module, thereby realize the output showing; That the present invention can meet is highly reliable, two-forty, single-wire signal transmission requirement at a distance, realizes the infinite cascade that LED drives chip.
Accompanying drawing explanation
Fig. 1 is chip carrier composition of the present invention;
Fig. 2 be the present invention used Manchester code coding protocol regulation;
Fig. 3 is the binary channels transmission application drawing of chip of the present invention;
Fig. 4 is the data layout schematic diagram that practical application middle controller one and controller two send;
Fig. 5 is the local decode module decoding sequential chart of chip of the present invention;
Fig. 6 is the implementation method schematic diagram of the signal recover module of chip of the present invention;
Fig. 7 is chip operation state transition graph;
Figure number explanation:
1 chip 101 signal recover module 102 local decode modules
103 protocol identification modules 104 show output module 105 internal clockings
701 idle condition 702 frame head state 703 coomand modes
704 electric current adjustment state 705 address date state 706RGB data modes
Embodiment
Below in conjunction with a concrete employing LED of the present invention, drive chip cascade example, be aided with relevant drawings, be described in further detail.
Chip supports input channel 1 to have the more binary channels single-wire signal transmission of high-transmission priority, and in the transmitting procedure of signal, each chip, according to receiving single-wire signal, produces synchronized sampling clock, and then single-wire signal is carried out to local decode; After receiving the data-signal of certain bit number, chip starts to utilize internal clocking according to the coded system of Manchester code, and quick and complete recovery single-wire signal is also transferred to next stage chip; Meanwhile, the data that protocol identification module obtains according to local decode are controlled showing output module, thereby realize the output showing.As shown in Figure 1, the inside structure of chip comprises signal recover module 101, local decode module 102, protocol identification module 103, shows output module 104, internal clocking 105.Wherein, signal recover module 101 receives after the data of certain bit number chip being detected, starts to utilize internal clocking according to the coded system of Manchester code, and quick and complete recovery single-wire signal is also transferred to next stage chip; Local decode module 102, according to receiving single-wire signal, produces synchronized sampling clock, and then single-wire signal is carried out to local decode; Protocol identification module 103 control command that decoding obtains according to single-wire signal is eliminated accumulation transmission error, configuration address, adjusting electric current, is obtained operations such as showing data chip; Show that demonstration data that output module 104 gets protocol identification module 103 further convert PWM data to and deliver to LED driver output port and be respectively OutR, OutG, OutB, carry out data demonstration; Internal clocking 105, for local chip provides accurate signal source of clock, offers signal recover module 101, local decode module 102, protocol identification module 103 simultaneously, shows that output module 104 uses;
The communication protocol that chip is used, is described in detail as follows shown in table, the instruction and data of 3bit three parts form by the frame head of 2 bits:
Note: 1. chip address is 16bit, high-order front, low level is rear;
2.R, G, B data are respectively 12bit, and high-order front, low level is rear;
Chip is used Manchester code as the coded system of single wire transmission signal, and its protocol transmission waveform regulation as shown in Figure 2;
In order to prevent causing transmission interface aging because welding bad or service time is long, cause the impact of the labile factors such as transmission line comes off, chip adopts binary channels to transmit to strengthen the reliability of system single-wire signal transmission.
It realizes principle as shown in Figure 3, controller 1 is the mode cascade N chips to output channel 1 by the input channel 1 from each chip, with Time Controller 2 302 in the direction contrary with controller 1, the mode cascade N chips by the input channel 2 from each chip to output channel 2.For the correct data that show, the data division of the communication protocol of controller 1 and controller 302 adopts symmetrical mode, guarantees that chip can correctly read corresponding data, and the data layout that controller 1 and controller 2 302 send as shown in Figure 4.
The implementation method of its effective input channel data selection is in the local decode module 102 of chip 1, has added the detection module of input channel 1.When two passages transmit effective Manchester code signal simultaneously, chip acquiescence receives the data-signal of input channel 1, when input channel 1 is idle, chip can detect the signal path situation of input channel 1, concrete methods of realizing is that input channel 1 or the input channel 2 of each chip used pull-up resistor, when freeing open circuit conditions while making, the voltage of input channel end is drawn high, by counter SdiHighLevelCounter, the duration of passage 1 high level is calculated, when high level lasting time Thigh is greater than 52 μ s, just can think that passage 1 opens circuit, chip automatically switches to input channel 2, and receive the data-signal inputted by passage 2.
In data-signal transmitting procedure, signal pulse width narrows down or broadens, because changing, external environment condition occurs in situation that clock jitter or code-element period change simultaneously, the local decode module 102 of chip 1 adopts adaptive algorithm to produce exactly synchronous clock, correctly single-wire signal is decoded.
It realizes principle as shown in Figure 5,102 li of the local decode modules of chip 1 arrange a Judge M signal, the initial value of Judge is " 0 ", whenever running into data from " 0 " to " 1 " conversion or from " 1 " to " 0 " that input signal Sdi characterizes, changes, and Judge will reverse.When Judge is " 0 ", at a synchronous sampling signal Mclk of negative edge generation of each input signal Sdi; When Judge is " 1 ", at a synchronous sampling signal Mclk of rising edge generation of each input signal Sdi; The Mclk producing by use samples to input signal Sdi, just can to single wire transmission signal Sdi, decode accurately.
The local decode module 102 of chip 1 adopts concrete methods of realizing that adaptive algorithms produce synchronous clock exactly as shown in Figure 5, counter TcycleCounterTemp counts respectively when input single-wire signal Sdi is high or low level, runs into the rising of Sdi or negative edge with regard to zero clearing counter TcycleCounterTemp.Meanwhile, when TL register has been preserved first bit low level of frame head, the count results of TcycleCounterTemp; When TH register has been preserved second bit high level of frame head, the count results of TcycleCounterTemp; Tcycle register preserved TL add TH's and; Single line input signal after frame head, if the TcycleCounterTemp when low level is greater than (TL+Tcycle/4) and sets up, M signal Judge overturns (as the TL1 in Fig. 5), otherwise M signal Judge does not overturn (as the TL2 in Fig. 5); If the TcycleCounterTemp when high level is greater than (TH+Tcycle/4) and sets up, M signal Judge overturns (as the TH2 in Fig. 5), otherwise M signal Judge does not overturn (as the TH1 in Fig. 5); By this adaptive algorithm, local decode module 102 in chip 1 has extremely strong anti-single-wire signal pulse change ability and anti-clock jitter or code-element period and changes ability, its jamproof ability shows as: the single code element clock count at single code-element period internal clock counting when at frame head has ± (Tcycle/4) or single code-element period with respect in the situation that single code-element period during frame head has positive and negative 1/4th code-element period errors, can from 100ns to code-element period, deduct the single wire transmission signal within the scope of 100ns by decoding pulse width.
In data-signal transmitting procedure, the pulse width of single wire transmission signal can change, finally cause transmitted signal can not characterize its entrained information, realize infinite cascade and distant signal transmission that LED drives chip, just must carry out signal recovery to signal transmission, make the single-wire signal of transmission keep pulse width not change or change seldom.In addition, consider that can to cause internal clocking 105 in chip 1 to produce the signal element cycle that shake or controller send here fixing due to the variation of applications environment or the variation of voltage, signal recovers to possess the ability of automatic induction clock jitter and code-element period variation, and can carry out this locality and repair, the signal of guaranteeing the to be sent to next stage chip coincidence impulse width of trying one's best is fixed on half code-element period, the changeless standard of code-element period.
This locality of realizing signal is repaired and is reached above-mentioned standard, the principle that realizes of the present invention is to utilize FIFO temporarily to store the decoded binary data of chip 1 local decode module 102, deferring to the agreement regulation of Manchester code and fixedly under the prerequisite of code-element period, the LED that chip 1 signal recover module 101 sends to next stage data encoding output drives chip.Whether whether signal recover module exist shake or code-element period to change according to the position judgment clock on the data FIFO of living in exporting, thereby output signal is done to certain adjustment.
The concrete methods of realizing that 101 pairs of signals of signal recover module of chip 1 recover as shown in Figure 6, the decoded binary data storage of local decode module 102 of chip 1 is in the shift register of 16bit, data enter shift register from Din, from Dout, export.When entering the data of shift register while having 8bit, signal recover module 101 is started working, it is deferred to the agreement regulation of Manchester code and according to the code-element period obtaining from local decode module 102 (Tcycle Fig. 5), data is encoded and outputed to next stage LED driving chip.Set pointer Pointer directional signal and recover module 101 and carrying out coded data, pointer can enter shift register or the output of current data coding is complete then moves or move forward along with new data, realizes the data of dynamically following the tracks of current output.Under ideal conditions, the single-wire signal pulse width of input does not change, code-element period is fixed, chip internal clock 105 is not shaken, pointer Pointer can point to the 7bit of shift register always, as shown in Figure 6, but in real world applications, these disturb all existence that can be in various degree, cause the skew that pointer Pointer points to.Following table has provided meaning that pointer Pointer moves to diverse location representative and the adjustment that has provided internal clocking number that signal recover module 105 pairs of output symbol periodic packets contain and do:
Signal recover module 101 possesses the ability of automatic induction clock jitter and code-element period variation by above-mentioned algorithm, and can carry out this locality to signal errors and repair, the signal of guaranteeing the to be sent to next stage chip coincidence impulse width of trying one's best is fixed on half code-element period, the changeless standard of code-element period.
As shown in Figure 7, when there is no signal input, chip 1 remains on idle 701 states in the duty conversion of chip 1, and when having signal transmission input, chip 1 enters frame head 702 states;
If it is correct that frame head 702 receives, chip 1 can jump to order 703 states, otherwise 701 idle conditions are returned in chip 1 redirect;
What obtain as fruit chip 1 is to regulate current order, and chip 1 is from ordering 703 state transitions to regulating electric current 704 states, and after protocol identification module 103 reading current controlling values, redirect not busy 701 states that make the return trip empty;
What obtain as fruit chip 1 is autoconfigured address order, and chip 1 is from ordering 703 state transitions to address date 705 states, and has identified behind address in protocol identification module 103, redirect not busy 701 states that make the return trip empty;
What obtain as fruit chip 1 is data transfer command, and current is single lamp control model, chip 1 is from ordering 703 state transitions to address date 705 states, in protocol identification module 103, identified behind address, jump to RGB data 706 states, when protocol identification module 103, identified after RGB data, jumped to address date 705 states, so circulation; Finally, after signal transmits, chip 1 redirect not busy 701 states that make the return trip empty; In the process of circulation, if mate with this chip address the address of data, the RGB data behind this address are preserved as the demonstration data that show output module 104;
What obtain as fruit chip 1 is data transfer command, and current be whole control model, chip 1 is from ordering 703 state transitions to RGB data 706 states, after transferring all RGB data, chip 1 redirect not busy 701 states that make the return trip empty; Under the state of transmission RGB data, protocol identification module 103 obtains the RGB data of this chip as the demonstration data of display module 104;
What obtain as fruit chip 1 is to eliminate the order of accumulation transmission error, the order of single lamp control model or whole control model order, and chip 1 is from ordering 703 to jump to idle 701 states; Protocol identification module 103 is eliminated accumulated error, is selected the operations such as single lamp control model or whole control model corresponding order respectively.
That the present invention can meet is highly reliable, two-forty, single-wire signal transmission requirement at a distance, realizes the infinite cascade that LED drives chip.
Above embodiment is used for illustrative purposes only, but not the restriction that the present invention is done, in the situation that not departing from inventive concept scope, person skilled can be made various conversion and is achieved.Therefore, all technical schemes that are equal to, also at category of the present invention, should be limited by each claim.
Claims (8)
1. a LED drives chip double-channel signal transmission method, it is characterized in that: support input channel 1 to have the more binary channels single-wire signal transmission of high-transmission priority, in the transmitting procedure of signal, each chip is according to receiving single-wire signal, produce synchronized sampling clock, and then single-wire signal is carried out to local decode; After receiving the data-signal of certain bit number, chip starts to utilize internal clocking according to the coded system of Manchester code, and quick and complete recovery single-wire signal is also transferred to next stage chip; Meanwhile, the data that protocol identification module obtains according to local decode are controlled showing output module, thereby realize the output showing.
2. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: adopt single wire transmission, defer to following communication protocol and utilize Synchronization mode to carry out signal transmission.
3. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: described chip comprises local decode module, signal recover module, protocol identification module, shows output module, internal clocking.
4. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: the function that possesses double-channel signal transmission, and input channel 1 has higher transmission priority than input channel 2, when two passages transmit effective Manchester code signal simultaneously, chip acquiescence receives the data-signal of input channel 1, when input channel 1 is idle, chip can detect the signal path situation of input channel 1, once situation about opening circuit, chip automatically switches to input channel 2, and receives the data-signal of being inputted by passage 2.
5. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: in data-signal transmitting procedure, signal pulse width narrows down or broadens, because changing, external environment condition occurs in situation that clock jitter or code-element period change simultaneously, local decode module can produce synchronous clock accurately, correctly single-wire signal is decoded.
6. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: after receiving the data-signal of certain bit number, chip can automatically adapt to external environment condition and change the clock jitter producing, utilize internal clocking according to the coded system of Manchester code, quick and complete recovery single-wire signal is also transferred to next stage chip.
7. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: Data Transport Protocol is comprised of frame head, instruction, data three parts, when detecting frame head, chip starts the single-wire signal of decoding, by different instructions and corresponding data, combined, to complete corresponding function simultaneously.
8. a kind of LED drives chip double-channel signal transmission method as claimed in claim 1, it is characterized in that: circuit manufactures integrated circuit (IC) chip, comprises that two input channels, two output channels, three LED drive port.
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