CN104051293A - Wafer Edge Protector - Google Patents

Abstract

The invention relates to a wafer edge protection device, which is arranged in an inductively coupled plasma ion etching machine table for gallium nitride semiconductor elements and circuit processing, and is provided with an annular clamping part, wherein the annular clamping part is provided with a first inner diameter and a second inner diameter, covers the edges of a semiconductor wafer and a crystal seat, is used for clamping the semiconductor wafer and the crystal seat and protects the edges of the semiconductor wafer and the crystal seat from being damaged in the etching process.

Description

Wafer Edge Protector

technical field

The invention relates to a wafer edge protection device, in particular to a wafer edge protection device used in an inductively coupled plasma ion etching machine for gallium nitride semiconductor components and circuit manufacturing processes.

Background technique

Inductively coupled plasma ion etching (inductively coupled plasma reactive ion etch) method is often used in the process of compound semiconductor wafers. During etching, the compound semiconductor wafer must first be fixed on a wafer base as a wafer carrier, and then the wafer The circle and the crystal base are fixed in the etching machine for etching. In the prior art, the clamp used to fix the wafer and the wafer base is usually a claw-type wafer clamp. This claw-type wafer clamp generally has six or eight fingers arranged in a circular manner and is used to fix the semiconductor wafer. Circle and crystal seat; due to the high bias power used when etching the via hole on the back of the compound semiconductor wafer, the edge of the wafer is often damaged during the etching process, which makes the product qualification rate unable to be improved, and the crystal seat carrying the semiconductor wafer will also be damaged. Because its edges are exposed to plasma and are damaged, they must be replaced frequently, which increases production costs.

Contents of the invention

The main purpose of the present invention is to provide a wafer edge protection device, which is used in the semiconductor wafer plasma ion etching process, so that the edge of the semiconductor wafer is not easily damaged, and the crystal seat can be protected from the damage of etching substances during the etching process. , so the pass rate of the product can be improved, and the service life of the crystal base can be extended to save the process cost.

To achieve the above object, the present invention provides a wafer edge protection device, which is installed in an inductively coupled plasma ion etching machine, the aforementioned wafer edge protection device has an annular clamping portion, wherein the aforementioned annular clamping portion has A first inner diameter and a second inner diameter, covering the edges of a semiconductor wafer and a crystal seat, for clamping the aforementioned semiconductor wafer and the crystal seat, and protecting the edges of the aforementioned semiconductor wafer and the crystal seat during the etching process from damage.

During implementation, the aforementioned first inner diameter is between 40 mm and 200 mm.

During implementation, the aforementioned second inner diameter is between 50 mm and 1000 mm.

During implementation, the aforementioned annular clamping portion is made of ceramic material.

In practice, the aforementioned wafer is a compound semiconductor gallium nitride (GaN) wafer, and its size is between 50mm and 200mm

During implementation, the aforementioned compound semiconductor gallium nitride wafer is fixed on a pedestal with a size ranging from 50 mm to 200 mm.

During implementation, the above-mentioned crystal seat for fixing the gallium nitride wafer is made of a sapphire material substrate, a glass material substrate or a silicon carbide material substrate.

Compared with the prior art, the present invention has the beneficial effects that: the wafer edge protection device provided by the present invention can indeed achieve the expected purpose, and protect the wafer and the edge of the crystal seat in the plasma ion etching process, so that the product can be improved. The qualification rate is high, and the service life of the crystal seat can be extended, thereby saving the process cost. It does have the value of industrial utilization.

Description of drawings

FIG. 1A , FIG. 1B , and FIG. 1C are schematic diagrams and partial cross-sectional enlarged views of an embodiment of a wafer edge protection device provided by the present invention.

Explanation of reference signs: 10-inductively coupled plasma ion etching machine; 100-wafer edge protection device; 101-ring clamping part; 102-first inner diameter; 103-second inner diameter; 104-wafer edge Overlay width; 110-semiconductor wafer; 120-supply.

Detailed ways

Please refer to FIG. 1A, FIG. 1B, and FIG. 1C, which are schematic diagrams of an embodiment of a wafer edge protection device provided by the present invention, wherein FIG. 1C is an enlarged view of a part circled by a dotted line C in FIG. 1B, where The wafer edge protection device 100 is installed in an inductively coupled plasma ion etching machine 10, and has an annular clamping portion 101, wherein the aforementioned annular clamping portion 101 has a first inner diameter 102 and a second inner diameter 103, Aforesaid edge protector 100 covers the edge of a semiconductor wafer 110 and a crystal seat 120 when in use, is used for clamping aforementioned semiconductor wafer 110 and crystal seat 120, and protects the edge of aforementioned semiconductor wafer 110 and crystal seat 120 in Not damaged during etching.

In the embodiment provided by the present invention, the opening formed by the aforementioned first inner diameter 102 is used as an etching region of the semiconductor wafer, and the space formed by the second inner diameter 103 needs to be able to completely include the entire wafer and the wafer seat, This invention can be applied to compound semiconductor gallium nitride wafers, ranging in size from 2 inches (50mm) to 8 inches (200mm), gallium nitride (GaN) wafers contain half-insulating 4H silicon carbide (4H-SiC) Or the GaN-based epitaxial layer of a 6H silicon carbide (6H-SiC) substrate, and the size of the base for carrying the wafer must be greater than or equal to the size of the wafer, so the first inner diameter 102 can be between between 40mm and 200mm, and the second inner diameter 103 may be between 50mm and 1000mm; taking the 4-inch (100mm) wafer, the mainstream size of the current gallium nitride wafer production line, as an example, gallium nitride wafers are commonly used The seat is a sapphire (sapphire) crystal seat, glass crystal seat or silicon carbide crystal seat made of conductive materials, and the size can be 4 inches (100mm) to 8 inches (200mm). Therefore, for a 4-inch wafer, this In the preferred embodiment of the wafer edge protection device provided by the invention, the range of the first inner diameter 102 is between 90mm and 100mm, and the range of the second inner diameter 103 can be between 100mm and 200mm. The edge coverage width 104 of the 4-inch wafer covered by the design is about 1.5 to 5.0 mm; the range of the first inner diameter and the second inner diameter can be adjusted according to the size of the wafer and the base; in order to protect the wafer and For the function of the edge of the crystal seat, it is preferable to make the aforementioned annular clamping portion 101 from a material with high hardness, high etching resistance and high corrosion resistance, among which ceramic material is the best choice.

Therefore, the wafer edge protection device provided by the present invention makes the edge of the semiconductor wafer not easily damaged by covering the edges of the wafer and the crystal seat, and because the edges of the wafer and the crystal seat are covered and protected, it is used for bonding the wafer. The colloid or wax of the circle and the crystal seat will not be exposed to the etching material during the etching process, so the colloid and wax can be prevented from being etched and leaked to contaminate the wafer, and the crystal seat can also be prevented from being affected by the etching material during the etching process. destroy.

In summary, the wafer edge protection device provided by the present invention can indeed achieve the intended purpose, and protect the edge of the wafer and the base during the plasma ion etching process, so that the qualified rate of the product can be improved, and the lifetime of the base can be extended. service life, thereby saving process costs. It does have the value of industrial utilization.

The above description is only illustrative of the present invention, rather than restrictive. Those of ordinary skill in the art understand that many modifications, changes or equivalents can be made without departing from the spirit and scope defined in the claims, but All will fall within the protection scope of the present invention.

Claims (8)

1. a crystal round fringes protective device; be installed in an induction coupled plasma ion(ic) etching board; it is characterized in that: this crystal round fringes protective device has a ring gripping portion; wherein this ring gripping portion has one first interior diameter and one second interior diameter; cover the edge of semiconductor wafer and a crystal cup; be used for clamping this semiconductor crystal wafer and this crystal cup, and protect the edge of this semiconductor crystal wafer and this crystal cup not to be damaged in etching process.

2. crystal round fringes protective device according to claim 1, is characterized in that: this first interior diameter is between between 40mm to 200mm.

3. crystal round fringes protective device according to claim 1, is characterized in that: this second interior diameter is between between 50mm to 1000mm.

4. crystal round fringes protective device according to claim 1, is characterized in that: this ring gripping portion makes with ceramic material.

5. crystal round fringes protective device according to claim 1, is characterized in that: this wafer is a gan compound semiconductor wafer, and its size is between between 50mm to 200mm.

6. crystal round fringes protective device according to claim 5, is characterized in that: this gan compound semiconductor wafer comprises the epitaxial layer taking gallium nitride as master of growing up in a half insulation 4H carborundum or 6H silicon carbide substrate.

7. crystal round fringes protective device according to claim 6, is characterized in that: this gan compound semiconductor wafer is fixed on a size between the crystal cup between 50mm to 200mm.

8. crystal round fringes protective device according to claim 7, is characterized in that: this crystal cup is with sapphire material substrate, glass material substrate or carbofrax material substrate manufacture.