CN104038050A - Bus voltage sampling apparatus - Google Patents
Bus voltage sampling apparatus Download PDFInfo
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- CN104038050A CN104038050A CN201310075134.5A CN201310075134A CN104038050A CN 104038050 A CN104038050 A CN 104038050A CN 201310075134 A CN201310075134 A CN 201310075134A CN 104038050 A CN104038050 A CN 104038050A
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Abstract
The invention provides a bus voltage sampling apparatus capable of controlling charge and discharge time to realize rapid charge and slow discharge so as to realize rapid response. The apparatus is mainly composed of resistors (voltage dividing resistors and bias resistors) from a first resistor to a seventh resistor, two triodes and followers. Voltages input at an input end are pulse voltages transformed through a transformer T from DC bus voltages. The voltages at the output end of the bus voltage sampling apparatus can be finally output by an output end via a follower F.
Description
Technical field
A kind of busbar voltage sampling apparatus is provided.
Background technology
For the frequency converter being connected with electrical network is protected, carry out busbar voltage sampling to electrical network, control frequency converter according to sampled result.Due to electrical network input voltage fluctuation or motor braking set of time too short in, the DC bus-bar voltage of input converter can produce due to voltage spikes pulse or under-voltage, thus these situations all can be damaged the device of frequency converter and affect the reliability of frequency converter.Therefore, we need to detect DC bus-bar voltage and control the switch of frequency converter.For frequency converter, compared with bus under voltage, superpotential harm is larger.So in the time that generation is superpotential, the response time must rapidly, for example, stop the work of frequency converter by the output voltage of sampling apparatus (sampled voltage) is inputed to control appliance (CPU).
The isolation measurement of busbar voltage, mainly contains two kinds of methods: one is directly busbar voltage optocoupler to be carried out to isolation measurement, and this method has increased an expensive linear optical coupling at present; Another kind of utilize the transformation characteristic (isolation characteristic) of transformer and voltage ratio to equal the feature of turn ratio, indirectly measure busbar voltage.The method of utilizing transformer isolation sampling busbar voltage is only discussed here.
Fig. 4 is busbar voltage sampling principle figure of the prior art, wherein, and the positive pole that DCP is DC bus-bar voltage, the negative pole that DCN is DC bus-bar voltage.
Busbar voltage, after transformer is scaled, by electric resistance partial pressure and capacitance voltage stabilizing filtering, obtains an output voltage V DC '.The advantage of conventional method is exactly that principle is simple, with low cost, but controls weak effect, the shortcoming that exists frequency converter not respond fast overvoltage.DC bus-bar voltage is a continually varying waveform, after transformer transformation, and a pulse voltage VDC_T ' who obtains.The amplitude of this voltage is directly proportional to the number of turn of transformer, and duty ratio equals the duty ratio of frequency converter.This voltage, by discharging and recharging of electric capacity being obtained to the output voltage V DC ' of similar busbar voltage shape, finally inputs to this output voltage V DC ' control unit (CPU, not shown), thereby controls frequency converter.Thus, response speed is mainly to be determined by the charging interval of electric capacity (capacitor C in figure).But in the time that we select a capacitor C compared with low capacity, the charging interval, when reducing, also reduced discharge time thereupon.And VDC_T ' is a pulse input voltage, when too short in discharge time, can make before next pulse arrives, capacitor C just discharges into a low voltage value, causes control unit erroneous judgement under voltage protection.Otherwise, in the time increasing the capacity of capacitor C, can extend capacitor discharge time, but also increase thereupon of charging interval can not meet the requirement of quick response.Under different capacitances, simulation waveform is as shown in Fig. 5 A, 5B.As shown in Figure 5A, at the capacity of capacitor C hour, although the charging interval is short, discharge time is also very short, between pulse the low-voltage time of (pulse and next pulse between) long, cause control unit to judge under voltage by accident.On the other hand, as shown in Figure 5 B, in the time that the capacity of capacitor C is larger, discharge and recharge the time all long, can not meet the requirement of quick response.
Summary of the invention
In order to address the above problem, the invention provides a kind of busbar voltage sampling apparatus, can control the time of discharging and recharging and realize quick charge and slowly electric discharge, thereby realize response fast.
To achieve these goals, a kind of busbar voltage sampling apparatus of the present invention, comprise input (DC_T), earth terminal (G), output (DC0), diode (D1), the first～seven resistance (R1～R7), the the first～the second triode (Q1～Q2), charge and discharge capacitance (C2), the the first～the second charging wire (CH1, CH2), the the first～the second discharge lines (DL1, DL2), described input (DC_T) is measured DC bus-bar voltage (DCP for receiving by isolation mensuration mode, DCN) DC pulse voltage obtaining, described output (DC0) is for exporting sampling DC pulse voltage, it is characterized in that, the positive pole of described diode (D1) is connected with described input (DC_T), on its negative pole, connect one end of emitter-base bandgap grading and described the 3rd resistance (R3) of described the first triode, described the first triode (Q1) is pnp type triode, connects one end of the other end and described the 4th resistance (R4) of described the 3rd resistance (R3) in its base stage, connects one end of described the 5th resistance (R5) in its collector, described the second triode (Q2) is npn type triode, its base stage is connected to described input (DC_T) via the first resistance (R1), between its base stage and emitter-base bandgap grading, be connected described the second resistance (R2), in its collector, connect the other end of the 4th resistance (R4) and the other end of the 5th resistance (R5), described the first charging wire (CH1), its one end connects the collector of described the first triode (Q1), and the other end connects the positive pole of described charge and discharge capacitance (C2), described the second charging wire (CH2), its one end connects the emitter-base bandgap grading of described the second triode (Q2) and connects described earth terminal (G), and the other end connects the negative pole of described charge and discharge capacitance (C2), described the first discharge lines (DL1), its one end connects the positive pole of described charge and discharge capacitance (C2), and the other end connects described output (DC0) via described the 6th resistance (R6), described the second discharge lines (DL2), its one end connects the negative pole of described charge and discharge capacitance (C2), and the other end connects described output (DC0) via described the 7th resistance (R7).
In above-mentioned busbar voltage sampling apparatus, can also comprise follower (F), described follower (F) has final output (DC); Described follower (F) is connected with described output (DC0), exports from described final output (DC) after adjusting from the voltage of described output (DC0).
In above-mentioned busbar voltage sampling apparatus, can between the base stage of described the second triode (Q2) and emitter-base bandgap grading, be connected charging filter capacitor (C1).
In above-mentioned busbar voltage sampling apparatus, can between the described other end of described the second discharge lines (DL2) and described output (DC0), be connected electric discharge filter capacitor (C3).
In above-mentioned busbar voltage sampling apparatus, it is characterized in that, the described DC pulse voltage that described input (DC_T) receives is for to carry out to DC bus-bar voltage (DCP, DCN) pulse voltage of exporting after transformation by transformer (T).
By above-mentioned busbar voltage sampling apparatus, can control the time of discharging and recharging and realize quick charge and slowly electric discharge, thereby realize response fast.
Brief description of the drawings
Fig. 1 is the overall structure figure (topological diagram) that represents busbar voltage sampling apparatus of the present invention.
Fig. 2 is the figure of the structure for describing busbar voltage sampling apparatus of the present invention in detail.
Fig. 3 is the oscillogram that represents busbar voltage sampling apparatus of the present invention, and wherein, (a) part is the figure that represents to input waveform, and (b) part is the figure that represents output waveform
Fig. 4 is the structure chart of the busbar voltage sampling apparatus of prior art.
Fig. 5 A, 5B are the figure that represents the Charge-discharge wave shape of the different electric capacity of prior art.
Embodiment
With reference to Fig. 1～3, busbar voltage sampling apparatus of the present invention is described below.
With reference to Fig. 1, busbar voltage sampling apparatus of the present invention is mainly made up of the first～seven resistance (divider resistance and biasing resistor) R1～R7 and two triodes and follower.The voltage of input DC_T input is the DC pulse voltage via the scaled isolation output of transformer T from DC bus-bar voltage DCP, DCN, and wherein, the output DC0 of busbar voltage sampling apparatus can be exported by final output DC via follower F.In addition, the voltage of input DC_T input is not limited to DC bus-bar voltage DCP, the DCN DC pulse voltage via the scaled isolation output of transformer T, also can use other isolation measurement modes such as optocoupler, measure the DC pulse voltage that DC bus-bar voltage DCP, DCN draw, be used as the voltage of input DC_T input.
Specifically, with reference to Fig. 2, busbar voltage sampling apparatus comprises input DC_T, earth terminal G, output DC0, diode D1, first～seven resistance R 1～R7, the first～the second triode Q1～Q2, charge and discharge capacitance C2, the first～the second charging wire CH1, CH2, the first～the second discharge lines DL1, DL2, input DC_T is for receiving from the DC pulse voltage of transformer T output, and output DC0 is used for exporting sampling DC pulse voltage.
The positive pole of diode D1 is connected with input DC_T, connects the emitter-base bandgap grading of the first triode and one end of the 3rd resistance R 3 on its negative pole; The first triode Q1 is pnp type triode, connects the other end of the 3rd resistance R 3 and one end of the 4th resistance R 4 in its base stage, connects one end of the 5th resistance R 5 in its collector; The second triode Q2 is npn type triode, and its base stage is connected to input DC_T via the first resistance R 1, is connected the second resistance R 2 between its base stage and emitter-base bandgap grading, connects the other end of the 4th resistance R 4 and the other end of the 5th resistance R 5 in its collector; The first charging wire CH1, its one end connects the collector of the first triode Q1, and the other end connects the positive pole of charge and discharge capacitance C2; The second charging wire CH2, its one end connects the emitter-base bandgap grading of the second triode Q2 and connects earth terminal G, and the other end connects the negative pole of charge and discharge capacitance C2; The first discharge lines DL1, its one end connects the positive pole of charge and discharge capacitance C2, and the other end connects output DC0 via the 6th resistance R 6; The second discharge lines DL2, its one end connects the negative pole of charge and discharge capacitance C2, and the other end connects output DC0 via the 7th resistance R 7.
In addition, can also between the base stage of the second triode Q2 and emitter-base bandgap grading, be connected charging filter capacitor C1, between the other end of the second discharge lines DL2 and output DC0, be connected the filter capacitor C3 that discharges.
In the time that input DC_T is input as high level, through the first resistance R 1, the second resistance R 2, the filtering of charging filter capacitor C1 dividing potential drop, the second triode Q2 conducting work.The 3rd resistance R 3, as biasing resistor, produces pressure drop at these resistance two ends simultaneously, makes also conducting of the first transistor Q1, starts charge and discharge capacitance C2 to charge.As above-mentioned, output side joint the 6th, the 7th resistance (divider resistance) R6, the R7 of charge and discharge capacitance C2 and electric discharge filter capacitor C3, by output DC0, voltage/current is input to follower F, thereby exports final voltage via follower F at final output DC.
In the time that the input voltage of input DC_T is 0, the second resistance R 2, the 3rd resistance R 3 as biasing resistor no longer produce pressure drop, therefore the first triode Q1, the second triode Q2 cut-off, charge and discharge capacitance C2 stops charging and starts to discharge via the 6th resistance R 6, the 7th resistance R 7, and the output voltage of output DC0 and final output DC slowly reduces.
In addition, in the drawings, the effect of diode D1 is in order to prevent reverse current.In the time that the input voltage of input DC_T is zero, in the situation that charge and discharge capacitance C2 both end voltage fails to discharge completely, there is a reverse voltage on diode D1 both sides, make diode D1 cut-off, thereby prevent reverse current.
In explanation, the electric current of each device represents with I below, and voltage represents with V, and resistance represents with R, and electric capacity represents with C, and distinguishes each device by subscript, and for example cathode voltage of the 3rd resistance is V
r3, the base current of the first triode Q is I
q1B.
In this busbar voltage sampling apparatus, the charging interval of charge and discharge capacitance C2 (charging interval of circuit) is mainly determined by the 4th resistance R 4.As seen from the figure, the base current (I of the first triode Q1
q1B) equal the electric current (I of the 4th resistance R 4
r4), the 3rd resistance R 3(I
r3) the vector of electric current, calculate I according to absolute value
q1B=I
r4-I
r3, and in explanation, all calculate according to absolute value below.
In the time of the firm conducting of the first triode Q1, the cathode voltage (V of the 4th resistance R 4
r4) equal input DC_T voltage (V
dC_T) – diode drop (V
d1) the bias voltage (V of – the first triode
q1BE), that is, and V
r4=V
dC_T– V
d1– V
q1BE, the cathode voltage of the 4th resistance R 4 is zero, and (transistor seconds Q2 conducting is in saturation region, voltage (V between its collector and emitter-base bandgap grading
q2CE) can ignore), the electric current (I of the 4th resistance
r4) also determine thus.And being always constant, the 3rd resistance R 3 both end voltage (equal the bias voltage (V of the first triode Q
q1BE)=be generally 0.7V).Therefore base current (the I of the first triode Q1
q1Belectric current (the I of)=the 4th resistance R 4
r4electric current (the I of)-the 3rd resistance R 3
r3)=(V
dC_T– V
d1resistance value (the R of)/the 4th resistance
r4bias voltage (the V of)-first triode Q1
q1BEresistance value (the R of)/the 3rd resistance R 3
r3), that is, and I
q1B=I
r4-I
r3=(V
dC_T– V
d1)/R
r4-V
q1BE/ R
r3.And, charging current (collector current of the first triode Q1, the i.e. I of charge and discharge capacitance C2
q1C) be its base current (I
q1B) be multiplied by the value of multiplication factor, that is, and I
q1C=I
q1B* h
q1FE(wherein, h
q1FEthe multiplication factor of the first triode Q1).Meanwhile, along with the rising of charge and discharge capacitance C2 both end voltage, charging current also slowly reduces, until the voltage of charge and discharge capacitance C2 end maintains a stable value.Therefore, can set the value that the 4th resistance R 4 hinders by selection and obtain suitable charging interval coefficient, thereby can realize the rapid response of busbar voltage sampling apparatus.In addition, although charge and discharge capacitance C2 parallel connection resistance, in to the charging process of charge and discharge capacitance C2, because charging current is relatively large, can ignore these resistance.
Determined by the 6th resistance R 6 and the 7th resistance R 7 discharge time of charge and discharge capacitance C2, therefore can select larger resistance value to be used as the 6th resistance R 6 and the 7th resistance R 7, thereby obtain discharge time slowly.With reference to Fig. 3, under same sequential, the transverse axis of two coordinate systems of two parts of (a) and (b) is the time, and the longitudinal axis is voltage, and each chronomere and voltage unit can be set on demand according to simulation data, in this omission.In Fig. 3, the input waveform of (a) part that is Fig. 3 at the input voltage of input DC_T, can from the output voltage of the waveform shown in (b) part of output DC0 output map 3, that is, can realize quick charge and electric discharge at a slow speed.
In addition, the output DC0 of busbar voltage sampling apparatus can be exported by final output DC via follower F, and follower F makes circuit have higher input impedance and lower output impedance.
Claims (6)
1. a busbar voltage sampling apparatus, comprise input (DC_T), earth terminal (G), output (DC0), diode (D1), the first～seven resistance (R1～R7), the the first～the second triode (Q1～Q2), charge and discharge capacitance (C2), the the first～the second charging wire (CH1, CH2), the the first～the second discharge lines (DL1, DL2), described input (DC_T) is measured DC bus-bar voltage (DCP for receiving by isolation mensuration mode, DCN) DC pulse voltage obtaining, described output (DC0) is for exporting sampling DC pulse voltage,
It is characterized in that,
The positive pole of described diode (D1) is connected with described input (DC_T), connects one end of emitter-base bandgap grading and described the 3rd resistance (R3) of described the first triode on its negative pole,
Described the first triode (Q1) is pnp type triode, connects one end of the other end and described the 4th resistance (R4) of described the 3rd resistance (R3) in its base stage, connects one end of described the 5th resistance (R5) in its collector,
Described the second triode (Q2) is npn type triode, its base stage is connected to described input (DC_T) via the first resistance (R1), between its base stage and emitter-base bandgap grading, be connected described the second resistance (R2), in its collector, connect the other end of the 4th resistance (R4) and the other end of the 5th resistance (R5)
Described the first charging wire (CH1), its one end connects the collector of described the first triode (Q1), and the other end connects the positive pole of described charge and discharge capacitance (C2),
Described the second charging wire (CH2), its one end connects the emitter-base bandgap grading of described the second triode (Q2) and connects described earth terminal (G), and the other end connects the negative pole of described charge and discharge capacitance (C2),
Described the first discharge lines (DL1), its one end connects the positive pole of described charge and discharge capacitance (C2), and the other end connects described output (DC0) via described the 6th resistance (R6),
Described the second discharge lines (DL2), its one end connects the negative pole of described charge and discharge capacitance (C2), and the other end connects described output (DC0) via described the 7th resistance (R7).
2. busbar voltage sampling apparatus as claimed in claim 1, is characterized in that,
Also comprise follower (F), described follower (F) has final output (DC),
Described follower (F) is connected with described output (DC0), exports from described final output (DC) after adjusting from the voltage of described output (DC0).
3. busbar voltage sampling apparatus as claimed in claim 1 or 2, is characterized in that,
Between the base stage of described the second triode (Q2) and emitter-base bandgap grading, be connected with charging filter capacitor (C1).
4. busbar voltage sampling apparatus as claimed in claim 1 or 2, is characterized in that,
Between the described other end of described the second discharge lines (DL2) and described output (DC0), be connected with electric discharge filter capacitor (C3).
5. busbar voltage sampling apparatus as claimed in claim 3, is characterized in that,
Between the described other end of described the second discharge lines (DL2) and described output (DC0), be connected with electric discharge filter capacitor (C3).
6. busbar voltage sampling apparatus as claimed in claim 1 or 2, is characterized in that,
The described DC pulse voltage that described input (DC_T) receives is for to carry out to DC bus-bar voltage (DCP, DCN) pulse voltage of exporting after transformation by transformer (T).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310075134.5A CN104038050B (en) | 2013-03-08 | 2013-03-08 | Busbar voltage sampling apparatus |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310075134.5A CN104038050B (en) | 2013-03-08 | 2013-03-08 | Busbar voltage sampling apparatus |
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| Publication Number | Publication Date |
|---|---|
| CN104038050A true CN104038050A (en) | 2014-09-10 |
| CN104038050B CN104038050B (en) | 2016-09-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310075134.5A Expired - Fee Related CN104038050B (en) | 2013-03-08 | 2013-03-08 | Busbar voltage sampling apparatus |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1578090A (en) * | 2003-07-28 | 2005-02-09 | 艾斯泰克国际公司 | Circuit and method for controlling synchronous rectifiers in power converters |
| CN1716747A (en) * | 2004-06-29 | 2006-01-04 | 株式会社村田制作所 | DC-DC converter |
| CN2829178Y (en) * | 2004-04-21 | 2006-10-18 | 美国凹凸微系有限公司 | Capacitance charge circuit for capacitive load charging |
| CN102067427A (en) * | 2008-06-17 | 2011-05-18 | 爱立信电话股份有限公司 | A power converter |
-
2013
- 2013-03-08 CN CN201310075134.5A patent/CN104038050B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1578090A (en) * | 2003-07-28 | 2005-02-09 | 艾斯泰克国际公司 | Circuit and method for controlling synchronous rectifiers in power converters |
| CN2829178Y (en) * | 2004-04-21 | 2006-10-18 | 美国凹凸微系有限公司 | Capacitance charge circuit for capacitive load charging |
| CN1716747A (en) * | 2004-06-29 | 2006-01-04 | 株式会社村田制作所 | DC-DC converter |
| CN102067427A (en) * | 2008-06-17 | 2011-05-18 | 爱立信电话股份有限公司 | A power converter |
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| Publication number | Publication date |
|---|---|
| CN104038050B (en) | 2016-09-14 |
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