CN104037602A - FPGA-based (field programmable gate array-based starting protecting method - Google Patents
FPGA-based (field programmable gate array-based starting protecting method Download PDFInfo
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Abstract
本发明提供的一种应用在主振荡功率放大(MOPA)光纤激光器系统中的基于现场可编程门阵列(PFGA)开机保护方法，具有以下步骤：步骤一：现场可编程门阵列(FPGA)控制处理单元输入种子激光启动信号；步骤二：种子激光驱动部接收到种子激光开启信号时发出种子激光驱动信号；步骤三：种子激光部接收到种子激光驱动信号时发出种子电压信号；步骤四：种子激光侧整形采样部对种子电压信号进行整形和采样；以及步骤五：FPGA(现场可编程门阵列)控制处理单元接收到种子电压信号时对种子电压信号进行计算得到种子电压信号值并与所存储的种子电压信号值阈值进行比较；以及步骤六：包含至少一个子步骤。
A kind of protection method based on Field Programmable Gate Array (PFGA) that is applied in the master oscillation power amplification (MOPA) fiber laser system provided by the present invention has the following steps: Step 1: Field Programmable Gate Array (FPGA) control processing The unit inputs the seed laser start signal; Step 2: The seed laser drive unit sends the seed laser drive signal when it receives the seed laser start signal; Step 3: The seed laser unit sends the seed voltage signal when it receives the seed laser drive signal; Step 4: Seed laser The side shaping sampling section carries out shaping and sampling to the seed voltage signal; and step 5: when the FPGA (field programmable gate array) control processing unit receives the seed voltage signal, the seed voltage signal is calculated to obtain the seed voltage signal value and compared with the stored The seed voltage signal value threshold is compared; and step six: including at least one sub-step.
Description
Technical field
The present invention relates to one be applied in master oscillation power amplification (MOPA) fiber ring laser system based on field programmable gate array (PFGA) power-on protection method.
Background technology
Fiber laser refers to the laser taking the optical fiber of doped rare earth element as gain media, forms the energy level particle beams reversion in optical fiber under the effect of pump light, produces Laser output.Fiber laser has the advantages such as energy is high, miniaturization, flexibility ratio height, possess simultaneously exempt to regulate, the advantage of non-maintaining, high stability, this is that conventional laser is incomparable.Therefore it be also widely used in numerous industrial circles such as laser engraving, laser cutting, Treatment of Metal Surface.
In all multiple types of fiber laser, master oscillation power amplification (MOPA) fiber laser is using tunable master oscillator as laser seed source, drive semiconductor laser to produce all adjustable seed light output of frequency, amplitude, pulsewidth by programmable chip and modulation circuit, this design has increased flexibility and the controllability of fiber laser greatly, can better adapt to the demand of different commercial Application.
But in master oscillation power amplification (MOPA) fiber laser, owing to all using semiconductor laser as light source from seed light to amplifier, and semiconductor laser is reflective comparatively responsive to returning, and returns the reflective good general of mistake and causes laser tube to damage.Produce strong return reflective reason normally the light source of certain one-level extremely cause rear class to produce very strong spontaneous radiation, the transmission of spontaneous radiation in optical fiber is two-way, it is time reflective that the part of reverse transmission will form by force.When this semiconductor laser usually occurs in start extremely; therefore in the time of the overall plan design of carrying out fiber laser, must consider the power-on protection problem to semiconductor lasers at different levels; thereby ensure that system all can be monitored and protection in time in the situation that light sources at different levels are abnormal; realize the reliably working of system, and protection system Primary Component.
But an effective method can not monitored and protection in time light sources at different levels in master oscillation power amplification (MOPA) fiber ring laser system start process at present.
Summary of the invention
The object of the present invention is to provide one be applied in master oscillation power amplification (MOPA) fiber ring laser system based on field programmable gate array (PFGA) power-on protection method.
One provided by the invention be applied in master oscillation power amplification (MOPA) fiber ring laser system based on field programmable gate array (PFGA) power-on protection method, there are following steps: step 1: field programmable gate array (FPGA) controlled processing unit input seed laser enabling signal, step 2: seed laser drive division sends seed laser and drives signal while receiving seed laser start signal, step 3: seed laser portion sends seed voltage signal while receiving seed laser driving signal, step 4: seed laser side shaping sampling portion carries out shaping and sampling to seed voltage signal, when and step 5: FPGA (field programmable gate array) controlled processing unit receives seed voltage signal, seed voltage signal calculated to seed voltage signal values and compare with stored seed voltage signal values threshold value, in the time that being greater than seed voltage signal values threshold value, seed voltage signal values enters step 6, when being less than seed voltage signal values threshold value time control seed laser processed portion, seed voltage signal values closes, after input seed laser enabling signal, starting seed laser portion sends seed voltage signal and calculates and compare after seed voltage signal is processed, and step 6: comprise at least one sub-step, wherein, sub-step comprises respectively: (1) field programmable gate array (FPGA) controlled processing unit input amplifying laser enabling signal, (2) amplifying laser enabling signal is converted to simulation enabling signal by digital-to-analogue conversion portion, (3) signal amplifying part is enlarged into simulation enabling signal to amplify simulation enabling signal, (4) when amplifying laser portion detects amplification simulation enabling signal, send amplification voltage signal, (5) amplifying laser side shaping sampling portion carries out shaping and sampling to amplification voltage signal, (6) amplification voltage signal is converted to digital amplification voltage signal by Analog to Digital Converter section, and (7) field programmable gate array (FPGA) controlled processing unit calculates digital amplification voltage signal value and compares with stored digital amplification voltage signal value threshold value digital amplification voltage signal while receiving digital amplification voltage signal, in the time that digital amplification voltage signal value is greater than kind of digital amplification voltage signal value threshold value, seed laser is amplified in output, controls from the highest amplifying laser portion of current unlatching and start to close step by step in the time that digital amplification voltage signal value is less than digital amplification voltage signal value threshold value.
Invention effect
According to involved in the present invention based on field programmable gate array (PFGA) power-on protection method, when after field programmable gate array (FPGA) controlled processing unit input seed laser enabling signal, seed laser drive division sends seed laser and drives signal while receiving seed laser start signal, seed laser portion sends seed voltage signal while receiving seed laser driving signal, seed laser side shaping sampling portion carries out shaping and sampling to seed voltage signal, field programmable gate array (FPGA) controlled processing unit calculates seed voltage signal values to this signal while receiving seed voltage signal, and compare with stored seed voltage signal values threshold value, in the time that being greater than seed voltage signal values threshold value, seed voltage signal values enters next step, when being less than seed voltage signal values threshold value time control seed laser processed portion, seed voltage signal values closes, after field programmable gate array (FPGA) controlled processing unit input amplifying laser enabling signal, amplifying laser enabling signal is converted to simulation enabling signal by digital-to-analogue conversion portion, signal amplifying part is enlarged into simulation enabling signal to amplify simulation enabling signal, amplifying laser portion sends amplification voltage signal while detecting amplification simulation enabling signal, amplifying laser side shaping sampling portion carries out shaping and sampling to amplification voltage signal, amplification voltage signal is converted to digital amplification voltage signal by Analog to Digital Converter section, when field programmable gate array (FPGA) controlled processing unit receives digital amplification voltage signal, this signal calculated to digital amplification voltage signal value and compare with stored digital amplification voltage signal value threshold value, in the time that digital amplification voltage signal value is greater than kind of digital amplification voltage signal value threshold value, seed laser is amplified in output, in the time that digital amplification voltage signal value is less than digital amplification voltage signal value threshold value, control from the highest amplifying laser portion of current unlatching and start to close step by step.Thereby make master oscillation power amplification (MOPA) fiber ring laser system in start process, can obtain monitoring and protection in time.
Brief description of the drawings
Fig. 1 is the present invention's structured flowchart based on field programmable gate array (PFGA) power-on protection method in an embodiment;
Fig. 2 is the structured flowchart of the present invention's field programmable gate array (PFGA) controlled processing unit in an embodiment;
Fig. 3 is the present invention's protection process sequential schematic diagram in an embodiment; And
Fig. 4 is the present invention's action flow chart based on field programmable gate array (PFGA) power-on protection method in an embodiment.
Embodiment
Referring to accompanying drawing and embodiment to involved in the present invention being explained in detail based on field programmable gate array (PFGA) power-on protection method.
Embodiment
Fig. 1 is the present invention's structured flowchart based on field programmable gate array (PFGA) power-on protection method in an embodiment.
As shown in Figure 1, have based on field programmable gate array (PFGA) power-on protection method: seed laser sends that processing unit 10, first order amplifying laser send that processing unit 20, second level amplifying laser send processing unit and third level amplifying laser sends processing unit and based on field programmable gate array (PFGA) controlled processing unit 30.
Seed laser sends processing unit 10 and comprises the seed laser drive division 11 being connected with field programmable gate array (PFGA) controlled processing unit 30, the seed laser portion 13 being connected with seed laser drive division 11 and the seed laser side shaping sampling portion 12 being connected respectively with field programmable gate array (PFGA) controlled processing unit 30 with seed laser portion 13.
Seed laser portion 13 comprises driving signal receiving part 13a, seed voltage signal sends the 13b of portion and sends with seed voltage signal the seed laser control part 13c that the 13b of portion is connected respectively with driving signal receiving part 13a.
First order amplifying laser sends processing unit 20 and comprises the first order digital-to-analogue conversion portion 21 being connected with field programmable gate array (PFGA) controlled processing unit 30, the first order signal amplifying part 22 being connected with first order digital-to-analogue conversion portion 21, the first order amplifying laser portion 25 being connected with first order signal amplifying part 22, the first order amplifying laser side shaping sampling portion 23 being connected with first order amplifying laser portion 25 and the first order Analog to Digital Converter section 24 being connected respectively with field programmable gate array (PFGA) controlled processing unit 30 with first order amplifying laser side shaping sampling portion 23.
First order amplifying laser portion 25 comprises the first order photodetection 25a of portion, first order amplification voltage signal sends the 25c of portion and sends with the first order amplification voltage signal first order amplifying laser control part 25b that the 25c of portion is connected respectively with the first order photodetection 25a of portion.
Second level amplifying laser sends processing unit and third level amplifying laser and sends processing unit and send processing unit 25 structures with first order amplifying laser and communicate, and therefore omits identical explanation.
Fig. 2 is the structured flowchart of the present invention's field programmable gate array (FPGA) controlled processing unit 30 in an embodiment.
As shown in Figure 2, field programmable gate array (FPGA) controlled processing unit 30 has enabling signal and sends portion 31, calculating part 32, storage part 33, abnormality data generating unit 34, judging part 35 and field programmable gate array (FPGA) control part 36.
Enabling signal is sent portion 31, for sending seed laser enabling signal and amplifying laser enabling signal.
Calculating part 32, for calculating seed voltage signal values and calculating digital amplification voltage signal value according to digital amplification voltage signal according to seed voltage signal.
Storage part 33, for storing seed voltage signal values threshold value, numeral amplification magnitude of voltage threshold value and abnormality data.
Judging part 35 is judged as normal condition, in the time that seed voltage signal values is less than seed voltage signal threshold value and in the time that digital amplification voltage signal value is less than digital amplification voltage signal value threshold value, is judged as abnormality in the time that seed voltage signal values is greater than seed voltage signal values threshold value and in the time that digital amplification voltage signal value is greater than digital amplification voltage signal value threshold value.
Abnormality data generating unit 34, for generating abnormality data in the time being judged as abnormality.
Field programmable gate array (FPGA) control part 36, drive out portion 11, seed laser side shaping sampling portion 12, first order digital-to-analogue conversion portion 21, first order Analog to Digital Converter section 24, calculating part 32, storage part 33, abnormality data generating unit 34 to be connected respectively with judging part 35 with seed laser, in the time being judged as normal condition, control that next stage amplifying laser sends that processing unit starts and the highest amplifying laser of controlling current unlatching in the time being judged as abnormality sends processing unit and closes and control abnormality data generating unit 34 and generate abnormality data.
Fig. 3 is the present invention's protection process sequential schematic diagram in an embodiment.
(MO) signal is opened in the main oscillations that master oscillation power amplification (MOPA) fiber ring laser system is finally sent by board (for configuring parameter and the on off state of fiber laser) and power amplification unlatching (AP) signal is controlled afterwards through field programmable gate array (FPGA), (MO) signal controlling seed laser portion 13 is opened in main oscillations, first order amplifying laser portion 25 and second level amplifying laser portion start, power amplification is opened (AP) signal controlling third level amplifying laser portion and is started, the sequential relationship of main oscillations unlatching (MO) signal and power amplification unlatching (AP) signal as shown in Figure 3.
In figure, the T1+T2+T3 time is less than main oscillations and opens (MO) signal and power amplification unlatching (AP) unblanking interval T, and wherein T1, T2 and T3 are 100 μ s, and T is 500 μ s.
Opening process:
A: main oscillations starts seed laser portion 13 immediately at A point after opening the input of (MO) signal.
B: after the seed source work T1 time, first detect under seed laser portion 13 reference performances at B point, start immediately 1/3rd maximum powers of first order amplifying laser portion 25, then be configured to again 2/3rds maximum powers at B1 point, be finally configured to again the maximum power of first order amplifying laser portion 25 at B2 point.In this programme every one-level amplifying laser portion to open be not to be all directly set to maximum from 0, but adopt syllogic ladder to start.This design can protect semiconductor laser avoid starting shooting overshoot and damage.
C: first order amplifying laser portion 25 worked after the T2 time, first detects that at C point seed laser portion 13 and first order amplifying laser portion 25 work all under normal circumstances, adopts syllogic to start second level amplifying laser portion.
D: after the second level amplifying laser portion work T3 time, first detect that at D point seed laser portion 13, first order amplifying laser portion 25 and second level amplifying laser portion are all under reference performance, start third level amplifying laser portion and be operated in 10 maximum power, wait for permission rate amplification unlatching (AP enable) signal.
E: amplify when opening (AP enable) signal and arriving when permission rate at E point, configure immediately the power that third level amplifying laser portion is operated in board control and carry out mark.
In above flow process, if noted abnormalities at any test point, enter emergency cut-off process.By the reverse order of start flow process, lasers at different levels cut out step by step.Taking third level amplifying laser portion extremely as example
Closing process:
D`: any one-level occurs that when abnormal, field programmable gate array (FPGA) control part 36 is closed third level amplifying laser portion at once.
C`: arrive C` after closing the third level amplifying laser 200ms of portion, close second level amplifying laser portion.
B`: arrive B` closing second level amplifying laser portion after 200ms, close first order amplifying laser portion 25.
A`: put in advance arrive A` after 200ms closing the first order, close seed laser portion 13.
Fig. 4 is the present invention's action flow chart based on field programmable gate array (PFGA) power-on protection method in an embodiment.
As shown in Figure 4, based on the motion flow of field programmable gate array (PFGA) power-on protection method, comprise the steps:
Step S1:
Main oscillations is opened after the input of (MO) signal, enters step S2.
Step S2:
Seed laser portion 13 enters step S3 after opening.
Step S3:
Detect seed voltage signal values, normal, enter step S4; Extremely, close seed laser portion 13.
Step S4:
First order amplifying laser portion opens, and enters step S5.
Step S5:
Detect amplification voltage signal value, normal, enter step S6; Extremely, close first order amplifying laser portion.
Step S6:
Second level amplifying laser portion opens, and enters step S7.
Step S7:
Detect amplification voltage signal value, normal, enter step S8; Extremely, close second level amplifying laser portion.
Step S8:
The input of (AP) signal is opened in power amplification, enters step S9.
Step S9:
Third level amplifying laser portion opens.
Be specifically described in conjunction with the structure of Fig. 1 and the method for Fig. 4.
When field programmable gate array (FPGA) controlled processing unit 30 is inputted after seed laser enabling signal, seed laser drive division 11 sends seed laser and drives signal while receiving seed laser start signal, when driving signal receiving part 13a in seed laser portion 13 receives seed laser driving signal, seed laser control part 13c control seed voltage signal sends the 13b of portion and sends seed voltage signal, seed laser side shaping sampling portion 12 carries out shaping and sampling to seed voltage signal, field programmable gate array (FPGA) controlled processing unit 30 calculates seed voltage signal values to this signal while receiving seed voltage signal, and compare with stored seed voltage signal values threshold value, in the time that being greater than seed voltage signal values threshold value, seed voltage signal values enters next step, when being less than seed voltage signal values threshold value time control seed laser processed portion 13, seed voltage signal values closes, field programmable gate array (FPGA) controlled processing unit 30 is inputted after amplifying laser enabling signal, amplifying laser enabling signal is converted to simulation enabling signal by first order digital-to-analogue conversion portion 21, first order signal amplifying part 22 is enlarged into simulation enabling signal to amplify simulation enabling signal, when the first order photodetection 25a of portion detects amplification simulation enabling signal, first order amplifying laser control part 25b control first order amplification voltage signal sends the 25c of portion and sends amplification voltage signal, first order amplifying laser side shaping sampling portion 23 carries out shaping and sampling to amplification voltage signal, amplification voltage signal is converted to digital amplification voltage signal by first order Analog to Digital Converter section 24, when field programmable gate array (FPGA) controlled processing unit 30 receives digital amplification voltage signal, this signal calculated to digital amplification voltage signal value and compare with stored digital amplification voltage signal value threshold value, in the time that digital amplification voltage signal value is greater than kind of digital amplification voltage signal value threshold value, output is amplified seed laser and is opened next stage amplifying laser and send processing unit, in the time that digital amplification voltage signal value is less than digital amplification voltage signal value threshold value, control from the highest amplifying laser portion of current unlatching and start to close step by step.Second level amplifying laser sends opening process that processing unit and third level amplifying laser send processing unit and first order amplifying laser, and to send processing unit identical, therefore omits identical explanation.
The effect of embodiment and effect
According to involved in the present invention based on field programmable gate array (PFGA) power-on protection method, when after field programmable gate array (FPGA) controlled processing unit input seed laser enabling signal, seed laser drive division sends seed laser and drives signal while receiving seed laser start signal, seed laser portion sends seed voltage signal while receiving seed laser driving signal, seed laser side shaping sampling portion carries out shaping and sampling to seed voltage signal, field programmable gate array (FPGA) controlled processing unit calculates seed voltage signal values to this signal while receiving seed voltage signal, and compare with stored seed voltage signal values threshold value, in the time that being greater than seed voltage signal values threshold value, seed voltage signal values enters next step, when being less than seed voltage signal values threshold value time control seed laser processed portion, seed voltage signal values closes, after field programmable gate array (FPGA) controlled processing unit input amplifying laser enabling signal, amplifying laser enabling signal is converted to simulation enabling signal by digital-to-analogue conversion portion, signal amplifying part is enlarged into simulation enabling signal to amplify simulation enabling signal, amplifying laser portion sends amplification voltage signal while detecting amplification simulation enabling signal, amplifying laser side shaping sampling portion carries out shaping and sampling to amplification voltage signal, amplification voltage signal is converted to digital amplification voltage signal by Analog to Digital Converter section, when field programmable gate array (FPGA) controlled processing unit receives digital amplification voltage signal, this signal calculated to digital amplification voltage signal value and compare with stored digital amplification voltage signal value threshold value, in the time that digital amplification voltage signal value is greater than kind of digital amplification voltage signal value threshold value, seed laser is amplified in output, in the time that digital amplification voltage signal value is less than digital amplification voltage signal value threshold value, control from the highest amplifying laser portion of current unlatching and start to close step by step.Can also in the time being judged as abnormality, generate and store abnormality data.Thereby make master oscillation power amplification (MOPA) fiber ring laser system in start process, can obtain monitoring and protection in time and abnormality data are stored.
Above-described embodiment is preferred case of the present invention, is not used for limiting the scope of the invention.
Claims (1)
1. be applied in master oscillation power amplification (MOPA) fiber ring laser system based on field programmable gate array (PFGA) power-on protection method, there are following steps:
Step 1, field programmable gate array (FPGA) controlled processing unit input seed laser enabling signal;
Step 2, seed laser drive division sends seed laser and drives signal while receiving described seed laser start signal;
Step 3, seed laser portion sends seed voltage signal while receiving described seed laser driving signal;
Step 4, seed laser side shaping sampling portion carries out shaping and sampling to described seed voltage signal;
And
Step 5, when FPGA (field programmable gate array) controlled processing unit receives described seed voltage signal, described seed voltage signal calculated to seed voltage signal values and compare with stored seed voltage signal values threshold value, in the time that being greater than described seed voltage signal values threshold value, described seed voltage signal values enters described step 6, in the time that described seed voltage signal values is less than described seed voltage signal values threshold value, controlling described seed laser portion closes
After input seed laser enabling signal, starting seed laser portion sends seed voltage signal and calculates and compare after described seed voltage signal is processed; And
Step 6, comprises at least one sub-step,
Wherein, described sub-step, comprises respectively:
(1) described field programmable gate array (FPGA) controlled processing unit input amplifying laser enabling signal;
(2) described amplifying laser enabling signal is converted to simulation enabling signal by digital-to-analogue conversion portion;
(3) signal amplifying part is enlarged into described simulation enabling signal to amplify simulation enabling signal;
(4) when amplifying laser portion detects described amplification simulation enabling signal, send amplification voltage signal;
(5) amplifying laser side shaping sampling portion carries out shaping and sampling to described amplification voltage signal;
(6) described amplification voltage signal is converted to digital amplification voltage signal by Analog to Digital Converter section; And
(7) when field programmable gate array (FPGA) controlled processing unit receives described digital amplification voltage signal, described digital amplification voltage signal calculated to digital amplification voltage signal value and compare with stored digital amplification voltage signal value threshold value, in the time that described digital amplification voltage signal value is greater than the digital amplification voltage signal value of described kind threshold value, seed laser is amplified in output, in the time that described digital amplification voltage signal value is less than described digital amplification voltage signal value threshold value, controls and start to close step by step from the described amplifying laser of the superlative degree portion of current unlatching.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105140770A (en) * | 2015-09-11 | 2015-12-09 | 深圳市杰普特电子技术有限公司 | Pumping modulation mode of pulse laser |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013124203A1 (en) * | 2012-02-24 | 2013-08-29 | Pilz Gmbh & Co. Kg | Safety switchgear with power supply unit |
| CN103633541A (en) * | 2013-12-09 | 2014-03-12 | 北京信息科技大学 | FPGA (field programmable gate array) based pulse fiber laser power control system |
-
2014
- 2014-06-06 CN CN201410250757.6A patent/CN104037602A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013124203A1 (en) * | 2012-02-24 | 2013-08-29 | Pilz Gmbh & Co. Kg | Safety switchgear with power supply unit |
| CN103633541A (en) * | 2013-12-09 | 2014-03-12 | 北京信息科技大学 | FPGA (field programmable gate array) based pulse fiber laser power control system |
Non-Patent Citations (2)
| Title |
|---|
| 吴文华，谢军华: "应用于MOPA的可编程半导体脉冲种子源激光器的设计与实现", 《科学技术与工程》 * |
| 秦彀，陈永洲: "通信设备电源过欠压防护技术及应用", 《中国电子学会第十五届信息论学术年会暨第一届全国网络编码学术年会》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105140770A (en) * | 2015-09-11 | 2015-12-09 | 深圳市杰普特电子技术有限公司 | Pumping modulation mode of pulse laser |
| CN105140770B (en) * | 2015-09-11 | 2018-12-25 | 深圳市杰普特光电股份有限公司 | A kind of pulse laser pump modulation mode |
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