CN104022199B - Epitaxial structure of light emitting diode - Google Patents

Abstract

The invention discloses an epitaxial structure of a light emitting diode, which comprises sequentially stacked substrate layers, a first n-type gallium nitride layer, a first quantum well layer, a first p-type gallium nitride layer, a tunnel junction layer, a second An n-type gallium nitride layer, a second quantum well layer, and a second p-type gallium nitride layer; wherein, the tunnel junction layer includes a sequentially stacked p++ gallium nitride layer, a modulated silicon-doped indium gallium nitride layer, and an n+ nitride layer The gallium layer: the p++ gallium nitride layer is covered and bonded to the first p-type gallium nitride layer, and the n+ gallium nitride layer is laminated and covered and bonded to the second n-type gallium nitride layer. Compared with the existing LED chip, the epitaxial structure of the light-emitting diode increases the power and voltage of a single chip grain, reduces the cost of using the substrate, and even simplifies the chip manufacturing process. It has great advantages in replacing or optimizing the current high-voltage nitride light-emitting diodes.

Description

Epitaxial structure of a light emitting diode

technical field

The invention relates to the field of semiconductor devices, in particular to an epitaxial structure of a light emitting diode.

Background technique

With the development of LED lighting technology, high-voltage light-emitting diode (LED) chips have become an indispensable part of the market. The high-voltage LED chip is made by dividing the epitaxial layer of the chip into small grain units, and connecting them in series by means of chip technology, thus showing the characteristics of high voltage and low current. Due to the high cost of high-voltage LED chips, many lighting manufacturers prefer to use packaged low-power nitride light-emitting diodes in series instead of high-power LED chips, which greatly restricts the application of high-voltage light-emitting diodes.

Contents of the invention

In order to overcome the above problems, an embodiment of the present invention provides an epitaxial structure of a light emitting diode, which can produce a high-power, high-voltage LED chip.

The present invention provides an epitaxial structure of a light emitting diode. The epitaxial structure of the light emitting diode comprises a sequentially stacked substrate layer, a first n-type gallium nitride layer, a first quantum well layer, a first p-type gallium nitride layer, A tunnel junction layer, a second n-type gallium nitride layer, a second quantum well layer, and a second p-type gallium nitride layer; wherein, the tunnel junction layer includes sequentially stacked p++ gallium nitride layers, modulation doped silicon The indium gallium nitride layer and the n+gallium nitride layer; the p++gallium nitride layer is covered and attached to the first p-type gallium nitride layer, and the n+gallium nitride layer is stacked and attached to the second In the n-type gallium nitride layer, the doping concentration of the p++ gallium nitride layer is 1E ²⁰ to 1E ²¹ cm ^-3 , and the doping concentration of the n+ gallium nitride layer is 1E ²⁰ to 1E ²¹ cm ^-3 .

Wherein, the p++gallium nitride layer has a thickness of 5-50 nm.

Wherein, the thickness of the n+ gallium nitride layer is 5-50 nm.

Wherein, the thickness of the modulated silicon-doped InGaN layer is 5-20 nm, and the doping concentration is 1E ²¹ -1E ²³ cm ^-3 .

Wherein, the band gap of the modulated silicon-doped InGaN layer is smaller than the band gap of the p++GaN layer and the n+GaN layer.

Wherein, the forbidden band width of the modulated silicon-doped InGaN layer is smaller than the forbidden band width of the first quantum well layer.

Correspondingly, the present invention also provides a preparation method for preparing the above-mentioned epitaxial structure of the light-emitting diode, comprising the following steps:

providing a base layer;

Prepare a first n-type gallium nitride layer, a first quantum well layer, and a first p-type gallium nitride layer sequentially on the substrate layer by using a metal organic compound vapor phase deposition method;

stacking p++ gallium nitride layers sequentially on the surface of the first p-type gallium nitride layer, modulating silicon-doped indium gallium nitride layers and n+ gallium nitride layers;

A second n-type gallium nitride layer, a second quantum well layer and a second p-type gallium nitride layer are sequentially stacked on the surface of the n+gallium nitride layer.

Wherein, the p++gallium nitride layer is prepared by vapor deposition of metal organic compounds; the growth condition parameters of the p++gallium nitride layer are as follows: the gallium source is trimethylgallium, the nitrogen source is ammonia gas, and the magnesium source is dicenemagnesium , the carrier gas is hydrogen and nitrogen, the ratio of the flow rate of hydrogen to nitrogen is >1:1, the pressure of the reaction chamber is 200 to 700 torr, the reaction temperature is 800 to 1050 ° C, and the thickness of the prepared p++gallium nitride layer is 5 ~50nm, the doping concentration is 1E ²⁰ ~1E ²¹ cm ^-3 .

Wherein, the growth method of the modulated silicon-doped indium gallium nitride layer is stepwise growth; including the following steps:

S31: passing silane and ammonia gas to generate Si atoms on the surface of the p++gallium nitride layer;

S32: turn off the silane, and turn on the gallium source and the indium source;

Steps S31 and S32 are repeated 5 to 10 times to prepare the modulated silicon-doped InGaN layer;

The growth condition parameters of the modulated silicon-doped indium gallium nitride layer are as follows: the reaction chamber pressure is 300 torr, the temperature is 800-950°C, the gallium source is trimethylgallium, the indium source is trimethylindium, and the nitrogen source is ammonia gas , the carrier gas is hydrogen, the dopant is silane, and the prepared silicon-doped InGaN layer has a thickness of 5-20 nm and a doping concentration of 1E ²¹ -1E ²³ cm ^-3 .

Wherein, the growth condition parameters of the n+gallium nitride layer are: the reaction chamber pressure is 500 torr, the temperature is 900-1100°C, the gallium source is trimethylgallium, the nitrogen source is ammonia gas, the carrier gas is hydrogen gas, and the dopant is Silane, the thickness of the n+ gallium nitride layer is 5-50 nm, and the doping concentration is 1E ²⁰ -1E ²¹ cm ^-3 .

In the epitaxial structure of the light-emitting diode provided by the present invention, two PN junctions are connected in series through a tunnel junction, or multiple tunnel junctions are connected in series to a plurality of PN junctions to prepare a high-power, high-voltage LED chip. Compared with the existing LED chips, the power and voltage of a single chip grain are increased, and even a single chip grain can meet the high-voltage performance requirements. Therefore, the number of LED chip grains connected in series is reduced, the use cost of the substrate is reduced, and the chip manufacturing process is even simplified. It has great advantages in replacing or optimizing the current high-voltage nitride light-emitting diodes, and also makes the high-voltage nitride light-emitting diodes have better development prospects.

Description of drawings

FIG. 1 is a schematic diagram of the layer structure of the epitaxial structure of the light emitting diode provided by the embodiment of the present invention;

2 is a schematic structural diagram of two tunnel junctions connecting three PN junctions provided by an embodiment of the present invention;

Fig. 3 is a method for preparing an epitaxial structure of a light emitting diode provided by an embodiment of the present invention;

Fig. 4 is a schematic diagram of the energy band of an indium gallium nitride layer doped with silicon without modulation;

FIG. 5 is a schematic diagram of energy bands of a modulated silicon-doped InGaN layer provided by an embodiment of the present invention.

detailed description

In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

Referring to FIG. 1 , an epitaxial structure of a light emitting diode is provided for an embodiment of the present invention. The epitaxial structure of light-emitting diodes is prepared by vapor deposition of metal-organic compounds. The epitaxial structure of the light-emitting diode includes a substrate layer 101, a first n-type gallium nitride layer 102, a first quantum well layer 103, a first p-type gallium nitride layer 104, a tunnel junction layer, a second n-type nitrogen GaN layer 108 , second quantum well layer 109 and second p-type GaN layer 110 .

In this embodiment, there is one tunnel junction layer, which is used to connect the PN junction layers on both sides thereof. Referring to FIG. 2 , a structure in which two tunnel junctions are connected in series and three PN junctions can also be used. In other implementation manners, there may be n tunnel junctions, so as to connect n+1 PN junctions.

The tunnel junction layer includes a p++GaN layer 105 , a modulated silicon-doped InGaN layer 106 and an n+GaN layer 107 stacked in sequence. The p++GaN layer 105 covers and adheres to the first p-type GaN layer 104 , and the n+GaN layer 107 overlaps and adheres to the second n-type GaN layer 108 . Wherein, the p++GaN layer 105 refers to relatively heavily doped GaN. The modulated silicon-doped InGaN layer 106 refers to a highly doped InGaN layer.

The thickness of the p++gallium nitride layer 105 is 5-50 nm, and the doping concentration is 1E ²⁰ -1E ²¹ cm ⁻³ .

The thickness of the silicon-doped InGaN layer 106 is adjusted to be 5-20 nm, and the doping concentration is 1E ²¹ -1E ²³ cm ⁻³ .

The forbidden band width of the modulated silicon-doped InGaN layer 106 is smaller than the forbidden band widths of the p++GaN layer 105 and the n+GaN layer 107 .

In addition, the forbidden band width of the modulated silicon-doped InGaN layer 106 is smaller than the forbidden band width of the first quantum well layer 103 to avoid re-absorption of light.

The thickness of the n+ gallium nitride layer 107 is 5-50 nm, and the doping concentration is 1E ²⁰ -1E ²¹ cm ⁻³ .

Referring to Fig. 3, the embodiment of the present invention also provides a preparation method for preparing the above-mentioned epitaxial structure of the light-emitting diode, including the following steps:

S1: Provide a substrate layer 101, the material of the substrate layer 101 is sapphire.

S2: The first n-type gallium nitride layer 102, the first quantum well layer 103, and the first p-type gallium nitride layer 104 are sequentially prepared on the substrate layer 101 by metal-organic compound vapor deposition method.

S3: On the surface of the first p-type gallium nitride layer 104, a p++ gallium nitride layer 105 is sequentially stacked, and a silicon-doped indium gallium nitride layer 106 and an n+ gallium nitride layer 107 are modulated.

In the step S3, the p++GaN layer 105 is fabricated by metal organic compound vapor deposition (MOCVD) equipment. The gallium source is trimethylgallium (TMGa), the nitrogen source is ammonia gas (NH ₃ ), the magnesium source is dicyclocene magnesium (Cp ₂ Mg), the carrier gas is H ₂ and N ₂ , and the gas flow of H ₂ and N ₂ is The ratio is >1:1, the pressure in the reaction chamber is 200-700 torr, and the reaction temperature is 800-1050°C, wherein the preferred reaction temperature is 900-1100°C. The p++gallium nitride layer 105 has a thickness of 5-50 nm, and a doping concentration of 1E ²⁰ -1E ²¹ cm ⁻³ .

The thickness of the modulated silicon-doped InGaN layer 106 is 5-20nm, the doping concentration is 1E ²¹ -1E ²³ cm ^-3 , and the growth temperature of the modulated Si-doped InGaN layer is 800-950°C.

The growth method of the modulated silicon-doped InGaN layer 106 is stepwise growth. Specific steps include:

S31: injecting silane and ammonia gas to generate Si atoms on the surface of the p++gallium nitride layer 105;

S32: turn off the silane, and turn on the gallium source and the indium source;

Steps S31 and S32 are repeated 5 to 10 times to prepare a modulated silicon-doped InGaN layer 106 .

In this embodiment, the growth condition parameters are as follows: the reaction chamber pressure is 300torr, the temperature is 800°C, the gallium source is trimethylgallium (TMGa), the indium source is trimethylindium (TMIn), and the nitrogen source is ammonia gas NH ₃ ), the carrier gas is H ₂ , and the dopant is silane (SiH ₄ ).

The specific growth steps are as follows: in step S31 , the amount of ammonia gas remains unchanged, and silane is introduced for 10 seconds to generate Si atoms on the surface of the p++gallium nitride layer 105 . In step S32, trimethylindium and trimethylgallium are fed for 30s, the gas flow ratio of the two is >1:250, and Si atoms are slowly diffused into the indium gallium nitrogen lattice. Steps S31 and S32 are repeated 5 to 10 times to prepare a modulated silicon-doped InGaN layer 106 .

The preparation method of the n+gallium nitride layer 107 is as follows: the reaction chamber pressure is 500torr, the temperature is 900-1100°C, the gallium source is trimethylgallium (TMGa), the nitrogen source is ammonia gas (NH ₃ ), and the carrier gas is H ₂ , The dopant is silane (SiH4). The thickness of the n+ gallium nitride layer 107 is 5-50 nm, and the doping concentration is 1E ²⁰ -1E ²¹ cm ⁻³ .

S4: The second n-type GaN layer 108 , the second quantum well layer 109 and the second p-type GaN layer 110 are sequentially stacked on the surface of the n+GaN layer 107 .

Through the above preparation process, an epitaxial structure of a light emitting diode is prepared. Referring to FIG. 4 , it is a schematic diagram of the energy band of a light-emitting diode without modulation of a silicon-doped InGaN layer in a thermal equilibrium state. FIG. 5 is a schematic diagram of the energy bands of the epitaxial structure of the light emitting diode with the modulated silicon-doped InGaN layer 106 provided by the embodiment of the present invention under thermal balance. Among them, Ef is the Fermi level, Ev is the valence band, and Ec is the conduction band. It can be clearly seen by comparison that in FIG. 5, the width of the depletion layer of the PN junction formed by the p++gallium nitride layer 105 and the n+gallium nitride layer 107 is greatly narrowed, and the valence band of the p++gallium nitride layer 105 is The distance from the conduction band of the n+GaN layer 107 is also reduced, which greatly increases the probability of electron tunneling. This is because the modulated silicon-doped InGaN layer 106 has a higher doping concentration, and its Fermi level enters the conduction band, bringing the valence band of the p++GaN layer 105 closer to the n+GaN layer 107. The distance of the conduction band reduces the width of the depletion layer to a large extent at the same time, so that the valence band electrons of the p++ gallium nitride layer 105 can pass through the forbidden band and enter the conduction band of the n+ gallium nitride layer 107, so that the electrons tunnel and generate Significant tunneling current.

In the epitaxial structure of the light-emitting diode provided in the embodiment of the present invention, two PN junctions are connected in series or multiple tunnel junctions are connected in series through multiple PN junctions through the tunnel junction to prepare a high-power, high-voltage LED chip. Compared with the existing LED chips, the power and voltage of a single chip grain are increased, and even a single chip grain can meet the high-voltage performance requirements. Therefore, the number of LED chip grains connected in series is reduced, the use cost of the substrate is reduced, and the chip manufacturing process is even simplified. It has great advantages in replacing or optimizing the current high-voltage nitride light-emitting diodes, and also makes the high-voltage nitride light-emitting diodes have better development prospects.

The above are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention Inside.

Claims (10)

1. a kind of epitaxial structure of light emitting diode, it is characterised in that the epitaxial structure of the light emitting diode includes layer successively Folded substrate layer, the first n-type gallium nitride layer, the first quantum well layer, the first p-type gallium nitride layer, tunnel junctions layer, the nitridation of the second N-shaped Gallium layer, the second quantum well layer and the second p-type gallium nitride layer；Wherein, the tunnel junctions layer includes the p++ gallium nitride for stacking gradually Layer, modulation mix the indium gallium nitrogen layer and n+ gallium nitride layers of silicon；The p++ gallium nitride layers are covered and fit in the first p-type gallium nitride Layer, the n+ gallium nitride layers stacking covering fits in second n-type gallium nitride layer, the doping content of the p++ gallium nitride layers For 1E²⁰～1E²¹cm^-3, the doping content of the n+ gallium nitride layers is 1E²⁰～1E²¹cm^-3。

2. the epitaxial structure of light emitting diode as claimed in claim 1, it is characterised in that the thickness of the p++ gallium nitride layers For 5～50nm.

3. the epitaxial structure of light emitting diode as claimed in claim 2, it is characterised in that the thickness of the n+ gallium nitride layers is 5～50nm.

4. the epitaxial structure of light emitting diode as claimed in claim 3, it is characterised in that the indium gallium nitrogen layer of silicon is mixed in the modulation Thickness be 5～20nm, doping content is 1E²¹～1E²³cm^-3。

5. the epitaxial structure of light emitting diode as claimed in claim 4, it is characterised in that the indium gallium nitrogen layer of silicon is mixed in the modulation Energy gap less than the p++ gallium nitride layers and the n+ gallium nitride layers energy gap.

6. the epitaxial structure of light emitting diode as claimed in claim 4, it is characterised in that the indium gallium nitrogen layer of silicon is mixed in the modulation Energy gap less than first quantum well layer energy gap.

7. a kind of preparation method, for preparing the epitaxial structure of the light emitting diode described in any one of claim 1～6, it is special Levy and be, including step is as follows：

One substrate layer is provided；

Using metal organic chemical compound vapor deposition method, the first n-type gallium nitride layer, the first amount are sequentially prepared on the substrate layer Sub- well layer, the first p-type gallium nitride layer；

Preparation p++ gallium nitride layers are stacked gradually on the first p-type gallium nitride layer surface, the indium gallium nitrogen layer and n+ nitrogen of silicon is mixed in modulation Change gallium layer；

The second n-type gallium nitride layer of preparation, the second quantum well layer and the second p-type nitrogen are stacked gradually on the surface of the n+ gallium nitride layers Change gallium layer.

8. preparation method as claimed in claim 7, it is characterised in that the p++ gallium nitride layers adopt metallo-organic compound gas Mutually prepared by deposition；The growth conditionss parameter of the p++ gallium nitride layers is：Gallium source is trimethyl gallium, and nitrogen source is ammonia, and magnesium source is two Cyclopentadienyl magnesium, carrier gas is the ratio of hydrogen and nitrogen, hydrogen and stream of nitrogen gas amount>1:1, the pressure of reaction chamber is 200～ 700torr, reaction temperature be 800～1050 DEG C, prepare the p++ gallium nitride layers thickness be 5～50nm, doping content For 1E²⁰～1E²¹cm^-3。

9. preparation method as claimed in claim 8, it is characterised in that the growth pattern of the indium gallium nitrogen layer of silicon is mixed in the modulation is point One-step growth；Comprise the following steps：

S31：Silane and ammonia are passed through in the p++ gallium nitride layers Surface Creation Si atoms；

S32：Silane is closed, gallium source and indium source is passed through；

S31 and S32 steps repeat 5～10 times, prepare the indium gallium nitrogen layer modulated and mix silicon；

The growth conditionss parameter of indium gallium nitrogen layer for mixing silicon of modulating is：Reaction cavity pressure is 300torr, and temperature is 800～950 DEG C, gallium source is trimethyl gallium, and indium source is trimethyl indium, and nitrogen source is ammonia, and carrier gas is hydrogen, and dopant is silane, is prepared The thickness for modulating the indium gallium nitrogen layer for mixing silicon is 5～20nm, and doping content is 1E²¹～1E²³cm^-3。

10. preparation method as claimed in claim 9, it is characterised in that the growth conditionss parameter of the n+ gallium nitride layers is：Reaction Cavity pressure is 500torr, and 900～1100 DEG C of temperature, gallium source is trimethyl gallium, and nitrogen source is ammonia, and carrier gas is hydrogen, and dopant is Silane, the thickness for preparing the n+ gallium nitride layers is 5～50nm, and doping content is 1E²⁰～1E²¹cm^-3。