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CN103996646B - Chip Carrier Structure - Google Patents

Chip Carrier Structure Download PDF

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Publication number
CN103996646B
CN103996646B CN201410223154.7A CN201410223154A CN103996646B CN 103996646 B CN103996646 B CN 103996646B CN 201410223154 A CN201410223154 A CN 201410223154A CN 103996646 B CN103996646 B CN 103996646B
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carrier
para
those
chip
upside
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CN103996646A (en
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陈柏琦
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Sitronix Technology Corp
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Sitronix Technology Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67326Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

The invention provides a structure of a chip bearing disc, which is used for placing a plurality of chips, the chip bearing disc of the invention is provided with a plurality of inverted alignment parts, the inverted alignment parts of one bearing disc with a plurality of chips and the inverted alignment parts of the other bearing disc without the chips are matched with each other, so that the bearing disc with the chips can be inverted and is inverted on the other bearing disc, thus the chips can be inverted and are actually inverted in the other bearing disc, in addition, the bearing disc is provided with a plurality of stack alignment parts, and the stack alignment parts are asymmetrically arranged on the bearing disc so as to assist the mutual stacking alignment of the bearing discs, namely, the stacking direction of the bearing discs which are stacked mutually is limited.

Description

芯片承载盘的结构Chip Carrier Structure

技术领域technical field

本发明是有关于一种芯片承载盘,其尤指一种有利于倒装对位与堆栈对位的芯片承载盘的结构。The present invention relates to a chip carrier, in particular to a structure of the chip carrier which is beneficial to flip-chip alignment and stack alignment.

背景技术Background technique

一般芯片(IC)制程中,通常会利用到承载盘置放芯片,承载盘具有多个容置槽以放置芯片,所以芯片承载盘(IC Tray)在芯片后段流程上以及运送芯片到客户端上是具重要性的承载容器。In the general chip (IC) manufacturing process, the carrier tray is usually used to place the chip. The carrier tray has multiple accommodating slots for placing the chip, so the IC tray (IC Tray) is used in the back-end process of the chip and transports the chip to the client. The above is an important holding container.

玻璃覆晶(Chip on Glass;COG)是一种将芯片与基板相互连接的先进封装技术,利用覆晶(Flip Chip)技术,以异方性导电膜(ACF)为中间接口,将长有金凸块的芯片接合在基板上;应用于液晶显示器时,由于基板是玻璃,故被称为COG。芯片制程包含研磨、切割、挑捡、外观检查及包装。研磨制程是芯片薄化的制程,研磨制程是对芯片背面进行粗研磨和细研磨2次工序,以薄化芯片,其属于机械式研磨。Chip on Glass (COG) is an advanced packaging technology that connects chips and substrates. Using flip chip (Flip Chip) technology, with anisotropic conductive film (ACF) as the intermediate interface, there will be gold The chip of the bump is bonded on the substrate; when it is applied to a liquid crystal display, it is called COG because the substrate is glass. The chip manufacturing process includes grinding, dicing, picking, visual inspection and packaging. The grinding process is a chip thinning process. The grinding process is to perform two processes of rough grinding and fine grinding on the back of the chip to thin the chip, which belongs to mechanical grinding.

切割制程是将晶圆切成芯片,以利后段晶粒接合(Die bond)和打线接合(Wirebond)与覆晶。挑捡是将芯片从晶圆上挑出而放置在芯片承载盘上,最后再将挑出的芯片,依客户的规范进行外观检查,且将芯片承载盘放置于客户要求的包材中,包装为成品出货。The dicing process is to cut the wafer into chips for the later stage of die bonding (Die bond), wire bonding (Wirebond) and flip chip. Picking is to pick out the chip from the wafer and place it on the chip carrier, and finally check the appearance of the picked chip according to the customer's specification, and place the chip carrier in the packaging material required by the customer, and then pack it Shipped for finished product.

进行芯片压合于基板时,例如导电玻璃,先从芯片承载盘取出芯片,再将芯片压合于基板。然而,不同压合设备压合芯片于基板的方向会有所不同,例如芯片的金凸块须朝上而压合于基板或者芯片的金凸块须朝下而压合于基板,因此当芯片放置于芯片承载盘的方向不符合压合设备压合芯片于基板的方向时,作业人员必须先将放置于芯片承载盘的所有芯片翻转而倒置于芯片承载盘,如此效率甚差而耗时。基于此问题,现有业者开发出双面芯片承载盘,但双面芯片承载盘的费用较单面芯片承载盘的费用高。When performing chip bonding on a substrate, such as conductive glass, the chip is first taken out from the chip carrier plate, and then the chip is bonded to the substrate. However, the direction of bonding the chip to the substrate will be different for different bonding equipment. For example, the gold bump of the chip must face up and be pressed on the substrate, or the gold bump of the chip must face down and be pressed on the substrate. Therefore, when the chip When the direction of placing the chip on the carrier does not match the direction of the bonding equipment to press the chip on the substrate, the operator must first turn all the chips placed on the chip carrier and place them upside down on the chip carrier, which is very inefficient and time-consuming. Based on this problem, the existing industry has developed a double-sided chip carrier, but the cost of the double-sided chip carrier is higher than that of the single-sided chip carrier.

为了便于运送与节省空间,芯片承载盘可互相堆栈,但是芯片承载盘必须依照特定堆栈方向而堆栈一起,习知芯片承载盘并未具有特殊防呆机制,以防止堆栈方向错误,所以容易发生芯片承载盘堆栈的方向错误,而容易造成压合芯片于基板时发生异常。另外,置放芯片于芯片承载盘后,一保护纸会放置于芯片承载盘上方而覆盖芯片,例如泰维克纸,以保护芯片,然而习知芯片承载盘不具有固定保护纸的结构,所以保护纸容易偏移,若是保护纸偏移则易造成芯片承载盘堆栈不良。In order to facilitate transportation and save space, the chip carriers can be stacked on each other, but the chip carriers must be stacked together in a specific stacking direction. The conventional chip carrier does not have a special fool-proof mechanism to prevent the stacking direction from being wrong, so chips are prone to occur. The wrong direction of the carrier plate stack may easily cause abnormalities when the chip is pressed on the substrate. In addition, after placing the chip on the chip carrier, a protective paper will be placed on the chip carrier to cover the chip, such as Tyvek paper, to protect the chip. However, the conventional chip carrier does not have a structure for fixing the protective paper, so The protective paper is easy to shift, and if the protective paper is shifted, it is easy to cause poor stacking of the chip carrier.

由上述可知,习知芯片承载盘具有下列几点缺点,第一点:作业人员不容易从习知单面芯片承载盘翻转芯片而倒置于芯片承载盘内,且失误率高,若利用特殊冶具则增加费用;第二点:双面芯片承载盘的费用较单面芯片承载盘的费用高,双面芯片承载盘不但模具费用高,双面芯片承载盘采购费用也高,且双面芯片承载盘制程稳定度较差;第三点,习知芯片承载盘并无特殊限制堆栈方向的防呆机制,所以容易造成芯片承载盘堆栈的方向错误;第四点,习知芯片承载盘无法固定保护纸,使得保护纸容易偏移,而容易造成芯片承载盘堆栈不良。It can be seen from the above that the conventional chip carrier has the following disadvantages. The first point is that it is not easy for operators to flip the chip from the conventional single-sided chip carrier and place it upside down in the chip carrier, and the error rate is high. It will increase the cost; the second point: the cost of double-sided chip carrier is higher than that of single-sided chip carrier. The stability of the disk manufacturing process is poor; the third point is that the conventional chip carrier does not have a fool-proof mechanism that specifically restricts the stacking direction, so it is easy to cause the chip carrier to stack in the wrong direction; the fourth point is that the conventional chip carrier cannot be fixed and protected Paper, so that the protective paper is easy to shift, and it is easy to cause poor stacking of the chip carrier tray.

有鉴于上述习知技术的缺点,本发明针对习知芯片承载盘的结构进一步加以改良,而发明出一种芯片承载盘的结构,本发明提供一种芯片承载盘,该芯片承载盘上具有多个倒装对位件与多个堆栈对位件,该些倒装对位件便于作业人员翻转置放有芯片的芯片承载盘于另一芯片承载盘,以翻转芯片而倒置于此另一芯片承载盘内,如此提高芯片倒置的成功率,此外该些堆栈对位件以不对称方式设置于芯片承载盘之上,以达到堆栈方向的限制,且可固定保护纸,以避免保护纸偏移。In view of the above-mentioned shortcomings of the known technology, the present invention further improves the structure of the conventional chip carrier, and invents a structure of the chip carrier. The present invention provides a chip carrier, the chip carrier has multiple A flip-chip alignment piece and a plurality of stack alignment pieces, these flip-chip alignment pieces are convenient for the operator to turn over the chip carrying tray with the chip placed on another chip carrying tray, so as to flip the chip and place the other chip upside down In the carrier tray, the success rate of chip inversion is improved in this way. In addition, the stacking alignment parts are arranged on the chip carrier tray in an asymmetric manner to achieve the limitation of the stacking direction, and the protective paper can be fixed to avoid the offset of the protective paper .

发明内容Contents of the invention

本发明的目的之一,在于提供一种芯片承载盘结构,其便于翻转一芯片承载盘而倒置于另一芯片承载盘,以将芯片承载盘内的芯片翻转而倒置于此另一芯片承载盘内,如此即可降低倒置芯片的人工费用,并且确实将芯片倒置于芯片承载盘内,而提高作业成功率。One of the objectives of the present invention is to provide a chip carrier structure, which is convenient to turn over a chip carrier and put it upside down on another chip carrier, so as to turn over the chip in the chip carrier and put it upside down on this other chip carrier In this way, the labor cost of inverting the chip can be reduced, and the chip can be placed upside down in the chip carrier tray, thereby improving the success rate of the operation.

本发明的目的之一,在于提供一种芯片承载盘结构,其具有限制堆栈方向的结构,以增加芯片承载盘堆栈的准确性。One of the objectives of the present invention is to provide a chip carrier structure, which has a structure that limits the stacking direction, so as to increase the stacking accuracy of the chip carrier.

本发明的目的之一,在于提供一种芯片承载盘结构,其能固定住保护芯片的保护纸,以避免保护纸置放位置偏移,而避免发生芯片承载盘堆栈不良的情形。One of the objectives of the present invention is to provide a chip carrier structure, which can fix the protective paper protecting the chip, so as to avoid the position deviation of the protective paper and avoid the occurrence of poor stacking of the chip carrier.

本发明揭露一种芯片承载盘的结构,其主要包含多个芯片容置槽以及多个倒装对位件,该些倒装对位件设置于该芯片承载盘的上表面。此外,该芯片承载盘更包含多个堆栈对位件,该些堆栈对位件设置于该芯片承载盘,该些堆栈对位件呈非对称排列。The invention discloses a structure of a chip carrier, which mainly includes a plurality of chip accommodation slots and a plurality of flip-chip alignment parts, and the flip-chip alignment parts are arranged on the upper surface of the chip carrier. In addition, the chip carrying plate further includes a plurality of stacking alignment elements, the stacking alignment elements are arranged on the chip carrying plate, and the stacking alignment elements are arranged asymmetrically.

本发明揭露一种芯片承载盘的结构,其应用于翻转芯片,以倒置芯片,该芯片承载盘主要包含一第一承载盘与一第二承载盘,该第一承载盘包含多个第一倒装对位件与多个第一芯片容置槽,该第二承载盘包含多个第二倒装对位件与多个第二芯片容置槽,该些第二倒装对位件对应该些第一倒装对位件,该第二承载盘的该些第二倒装对位件配合于该第一承载盘的该些第一倒装对位件,该第一承载盘与该第二承载盘翻转而倒置后,放置于该第一承载盘的该些第一芯片容置槽的多个芯片被翻转,而被倒置于该第二承载盘的该些第二芯片容置槽内。The present invention discloses a structure of a chip carrier, which is used to flip chips to invert chips. The chip carrier mainly includes a first carrier and a second carrier, and the first carrier includes a plurality of first inverted chips. Alignment parts and a plurality of first chip accommodation slots, the second carrier tray includes a plurality of second flip chip alignment parts and a plurality of second chip accommodation slots, and the second flip chip alignment parts correspond to the some first flip-chip alignment parts, the second flip-chip alignment parts of the second carrier tray are matched with the first flip-chip alignment parts of the first carrier tray, the first carrier tray and the second carrier tray After the two carrier trays are turned upside down, the chips placed in the first chip accommodating grooves of the first carrier tray are turned over and placed in the second chip accommodating grooves of the second carrier tray upside down .

本发明揭露另一种芯片承载盘的结构,其限制芯片承载盘的堆栈方向,其主要包含一第一承载盘以及一第二承载盘,该第一承载盘包含多个第一堆栈对位件与多个第一芯片容置槽,该些第一堆栈对位件设置于该第一承载盘的上表面,并呈非对称排列,该第二承载盘包含多个第二堆栈对位件与多个第二芯片容置槽,该些第二堆栈对位件对应该些第一堆栈对位件,而设置于该第二承载盘的底面,该第二承载盘的该些第二堆栈对位件配合于该第一承载盘的该些第一堆栈对位件,而该第二承载盘堆栈于该第一承载盘。The present invention discloses another chip carrier structure, which limits the stacking direction of the chip carrier, and mainly includes a first carrier and a second carrier, and the first carrier includes a plurality of first stacking alignment parts and a plurality of first chip accommodating grooves, the first stacking alignment parts are arranged on the upper surface of the first carrier tray, and are arranged asymmetrically, and the second carrier tray includes a plurality of second stack alignment parts and A plurality of second chip accommodating grooves, the second stacking alignment parts correspond to the first stacking alignment parts, and are arranged on the bottom surface of the second carrier tray, the second stacking pairs of the second carrier tray The positioning parts are matched with the first stacking alignment parts of the first carrier tray, and the second carrier tray is stacked on the first carrier tray.

再者,该些第一芯片容置槽之上设置一保护纸,该保护纸设置于该些第一堆栈对位件之间,将该保护纸固定于该些第一芯片容置槽之上。Furthermore, a protective paper is arranged on the first chip accommodating grooves, the protective paper is arranged between the first stacking alignment parts, and the protective paper is fixed on the first chip accommodating grooves .

附图说明Description of drawings

图1A:其为本发明的第一实施例的堆栈承载盘的作动示意图一;FIG. 1A: It is the first schematic diagram of the operation of the stacked carrier trays according to the first embodiment of the present invention;

图1B:其为本发明的第一实施例的堆栈承载盘的作动示意图二;FIG. 1B: It is the second schematic diagram of the operation of the stacked carrier trays according to the first embodiment of the present invention;

图2:其为本发明的第一实施例的固定保护纸的示意图;Fig. 2: it is the schematic diagram of the fixed protection paper of the first embodiment of the present invention;

图3:其为本发明的第二实施例的结构示意图;Fig. 3: it is the structural representation of the second embodiment of the present invention;

图4A:其为本发明的第三实施例的倒置芯片的作动示意图一;FIG. 4A: It is the first schematic diagram of the operation of the inverted chip according to the third embodiment of the present invention;

图4B:其为本发明的第三实施例的倒置芯片的作动示意图二;FIG. 4B: It is the second schematic diagram of the operation of the inverted chip according to the third embodiment of the present invention;

图4C:其为本发明的第三实施例的倒置芯片的作动示意图三;FIG. 4C: It is the third schematic diagram of the operation of the inverted chip according to the third embodiment of the present invention;

图4D:其为本发明的第三实施例的倒置芯片的作动示意图四;FIG. 4D: It is a schematic diagram 4 of the operation of the inverted chip according to the third embodiment of the present invention;

图5:其为本发明的第四实施例的结构示意图;Fig. 5: it is the schematic structural diagram of the fourth embodiment of the present invention;

图6A:其为本发明的第五实施例的堆栈承载盘的作动示意图一;FIG. 6A : It is the first schematic diagram of the operation of the stacked trays according to the fifth embodiment of the present invention;

图6B:其为本发明的第五实施例的堆栈承载盘的作动示意图二;以及图6C:其为本发明的第五实施例的倒置芯片的作动示意图。FIG. 6B : It is the second schematic diagram of the operation of the stacking tray according to the fifth embodiment of the present invention; and FIG. 6C : It is the schematic diagram of the operation of the inverted chip according to the fifth embodiment of the present invention.

【图号对照说明】[Description of drawing number comparison]

10 第一承载盘10 First carrier plate

110 第一基板110 first substrate

120 第一框体120 First frame

1210 第一芯片容置槽1210 The first chip holding slot

1220 第二框体容置槽1220 Storage tank for the second frame

130 第一堆栈对位件130 First stack alignment parts

140 第三堆栈对位件140 Third stack alignment piece

20 第二承载盘20 Second carrier tray

210 第二基板210 Second substrate

220 第二框体220 second frame

2210 第二芯片容置槽2210 Second chip holding slot

2220 第一框体容置槽2220 First Frame Storage Tank

230 第二堆栈对位件230 Second stack alignment piece

240 第四堆栈对位件240 Fourth stack alignment piece

30 对位角30 counterpoint

40 保护纸40 protective paper

50 芯片50 chips

11 第一承载盘11 First carrier plate

111 第一基板111 First substrate

121 第一框体121 First frame

1211 第一芯片容置槽1211 The first chip holding slot

131 第一倒装对位件131 First Flip Chip Alignment

132 倒装对位件132 Flip Chip Alignment

141 第三堆栈对位件141 Alignment parts for the third stack

21 第二承载盘21 Second carrier plate

211 第二基板211 Second substrate

221 第二框体221 Second frame

2211 第二芯片容置槽2211 Second chip holding slot

231 第二堆栈对位件231 2nd stack aligner

241 第二倒装对位件241 Second Flip Chip Alignment

242 第四堆栈对位件242 4th stack alignment piece

具体实施方式detailed description

为了使本发明的结构特征及所达成的功效有更进一步的了解与认识,特用较佳的实施例及配合详细的说明,说明如下:In order to make the structural features of the present invention and the achieved effects have a further understanding and recognition, preferred embodiments and detailed descriptions are specially used, which are described as follows:

本发明为解决习知技术中,有关于芯片承载盘结构的问题,在压合芯片于基板的制程中,放置于芯片承载盘中的芯片有时需被翻转而倒置于芯片承载盘内,若以人工方式逐一翻转芯片则失误率高,且耗费时间,而利用双面芯片承载盘放置芯片则所花费的费用高,且双面芯片承载盘的制程的稳定度较差,另外,习知芯片承载盘的防止堆栈方向错误的机制不足,且习知芯片承载盘无法固定芯片承载盘上的保护纸,为克服上述的种种问题,本发明提供一种芯片承载盘的结构。The present invention solves the problems related to the structure of the chip carrier in the prior art. In the process of bonding the chip to the substrate, the chip placed in the chip carrier sometimes needs to be turned over and placed upside down in the chip carrier. Flipping the chips one by one manually has a high error rate and is time-consuming, while using a double-sided chip carrier to place the chips costs a lot, and the stability of the manufacturing process of the double-sided chip carrier is poor. In addition, the conventional chip carrier The mechanism for preventing wrong stacking direction of the disc is insufficient, and the conventional chip carrier cannot fix the protective paper on the chip carrier. In order to overcome the above problems, the present invention provides a structure of the chip carrier.

首先,请参阅图1A与图1B,其为本发明的第一实施例的堆栈承载盘的作动示意图一与作动示意图二;如图所示,此实施例是表现一第二承载盘20堆栈于一第一承载盘10之上,透过该第一承载盘10的多个第一堆栈对位件130配合于该第二承载盘20的多个第二堆栈对位件230,使该第二承载盘20堆栈于该第一承载盘10之上。First of all, please refer to FIG. 1A and FIG. 1B , which are schematic diagrams 1 and 2 of the operation of stacking trays according to the first embodiment of the present invention; as shown in the figures, this embodiment shows a second tray 20 Stacked on a first carrier plate 10, the plurality of first stacking alignment parts 130 of the first carrier plate 10 are matched with the plurality of second stacking alignment parts 230 of the second carrier plate 20, so that the The second carrier tray 20 is stacked on the first carrier tray 10 .

该第一承载盘10是包含一第一基板110、一第一框体120与该些第一堆栈对位件130,该第一框体120是设置于该第一基板110之上,该第一框体120是小于该第一基板110,并且该第一框体120具有多个第一芯片容置槽1210,而该些第一堆栈对位件130非对称设置于该第一框体120的周缘上;以及该第二承载盘20是堆栈于该第一承载盘10之上,该第二承载盘20是包含一第二基板210、一第二框体220与该些第二堆栈对位件230,该第二框体220是设置于该第二基板210之上,该第二框体220是小于该第二基板210,并且该第二框体220具有多个第二芯片容置槽2210,而该些第二堆栈对位件230对应该些第一堆栈对位件130,而设置于该第二基板210的底面,即设置于该第二承载盘20的底面。上述的非对称设置是指于该承载盘的相对位置上并非设有相同结构。如图1A所示,设置于该第一框体120的左右两侧周缘的该些第一堆栈对位件130的所在位置并不相同,即位于该第一承载盘10的左右两侧周缘的该些第一堆栈对位件130并没有相对称,也就是该些第一堆栈对位件130呈非对称排列。The first carrier tray 10 includes a first substrate 110, a first frame body 120 and the first stack alignment parts 130, the first frame body 120 is arranged on the first substrate 110, the first frame body 120 is arranged on the first substrate 110, the first frame body 120 A frame body 120 is smaller than the first substrate 110, and the first frame body 120 has a plurality of first chip accommodating grooves 1210, and the first stacking alignment parts 130 are asymmetrically arranged on the first frame body 120 and the second carrier 20 is stacked on the first carrier 10, the second carrier 20 includes a second substrate 210, a second frame 220 and the second stacking pairs Position member 230, the second frame body 220 is arranged on the second substrate 210, the second frame body 220 is smaller than the second substrate 210, and the second frame body 220 has a plurality of second chip accommodation The slots 2210 , and the second stacking alignment elements 230 corresponding to the first stacking alignment elements 130 are disposed on the bottom surface of the second substrate 210 , that is, are disposed on the bottom surface of the second carrier tray 20 . The above-mentioned asymmetrical arrangement means that the relative positions of the carrier plates are not provided with the same structure. As shown in FIG. 1A , the positions of the first stacking alignment parts 130 arranged on the left and right peripheral edges of the first frame body 120 are not the same, that is, the positions located on the left and right peripheral edges of the first carrier tray 10 The first stacking alignment elements 130 are not symmetrical, that is, the first stacking alignment elements 130 are arranged asymmetrically.

本发明的该第一承载盘10具有非对称设置的该些第一堆栈对位件130,而该第二承载盘20具有对应该些第一堆栈对位件130的该些第二堆栈对位件230,当该第二承载盘20欲堆栈于该第一承载盘10之上时,依照该些第一堆栈对位件130与该些第二堆栈对位件230的互相对应位置进行堆栈,由于该些第二堆栈对位件230必须分别配合于该些第一堆栈对位件130,该第二承载盘20才能堆栈于该第一承载盘10之上,如此使该第二承载盘20堆栈于该第一承载盘10的堆栈方向受到限制。The first carrier tray 10 of the present invention has the first stacking alignment members 130 arranged asymmetrically, and the second carrier tray 20 has the second stacking alignment members corresponding to the first stacking alignment members 130 230, when the second carrier tray 20 is intended to be stacked on the first carrier tray 10, it is stacked according to the corresponding positions of the first stack alignment elements 130 and the second stack alignment elements 230, Since the second stacking alignment parts 230 must be respectively matched with the first stacking alignment parts 130, the second carrier tray 20 can be stacked on the first carrier tray 10, so that the second carrier tray 20 The direction of stacking on the first tray 10 is restricted.

本发明上述的该些第一堆栈对位件130为凸件,则对应于该些第一堆栈对位件130的该些第二堆栈对位件230为凹件,但本发明并不限制该些第一堆栈对位件130与该些第二堆栈对位件230分别必须为凸件与凹件,其可为凹件、凸件或凸件与凹件的组合,该些第一堆栈对位件130能以嵌合、固定或配合等方式结合于该些第二堆栈对位件230。The above-mentioned first stacking alignment members 130 of the present invention are convex members, and the second stacking alignment members 230 corresponding to the first stacking alignment members 130 are concave members, but the present invention is not limited to this The first stack alignment parts 130 and the second stack alignment parts 230 must be convex parts and concave parts respectively, which can be concave parts, convex parts or a combination of convex parts and concave parts. The positioning member 130 can be combined with the second stacking alignment members 230 by fitting, fixing or matching.

又,该第二承载盘20的该第二基板210的底面设置一第一框体容置槽2220,该些第二堆栈对位件230设置于该第一框体容置槽2220内,该些第一堆栈对位件130配合于该些第二堆栈对位件230,此外该第一框体120容置于该第一框体容置槽2220内,如此增加该第一承载盘10与该第二承载盘20之间的堆栈稳固性。In addition, a first frame accommodating groove 2220 is provided on the bottom surface of the second substrate 210 of the second carrier tray 20, and the second stacking alignment parts 230 are disposed in the first frame accommodating groove 2220. The first stacking alignment parts 130 are matched with the second stacking alignment parts 230, and the first frame body 120 is accommodated in the first frame body accommodating groove 2220, thus increasing the first carrier plate 10 and Stack stability between the second carrier trays 20 .

再者,该第一承载盘10进一步设置多个第三堆栈对位件140,该些第三堆栈对位件140是设置于该第一基板110的底面,该些第三堆栈对位件140对应于另一承载盘上所非对称设置的复数堆栈对位件,此另一承载盘相同或近似于该第二承载盘20,如此当该第一承载盘10欲堆栈于此另一承载盘之上时,该第一承载盘10的该些第三堆栈对位件140必须对应于此另一承载盘上所非对称设置的该些堆栈对位件,该第一承载盘10才能堆栈于此另一承载盘之上。由上述可知,本发明运用非对称的该些堆栈对位件于该些承载盘上,使该些承载盘之间的堆栈方向具有限制性。本发明并不限制该些第三堆栈对位件140为凸件、凹件或凸件与凹件的组合,该些第三堆栈对位件140是与对应的堆栈对位件以互相嵌合、固定或配合等方式结合。Furthermore, the first tray 10 is further provided with a plurality of third stacking alignment parts 140, and these third stacking alignment parts 140 are arranged on the bottom surface of the first substrate 110, and these third stacking alignment parts 140 Corresponding to the plurality of stacking alignment members asymmetrically arranged on another carrier, this other carrier is the same or similar to the second carrier 20, so when the first carrier 10 is to be stacked on this other carrier When above, the third stacking alignment members 140 of the first carrier tray 10 must correspond to the stacking alignment members asymmetrically arranged on the other carrier tray, so that the first carrier tray 10 can be stacked on on this other carrier. From the above, it can be seen that the present invention uses asymmetric stacking alignment components on the carrier trays, so that the stacking directions between the carrier trays are limited. The present invention does not limit the third stacking alignment pieces 140 to be convex pieces, concave pieces or a combination of convex pieces and concave pieces. The third stacking alignment pieces 140 are to be fitted with corresponding stacking alignment pieces. , fixed or combined with other methods.

更进一步该第一承载盘10的底面设置一第二框体容置槽1220,该些第三堆栈对位件140设置于该第二框体容置槽1220内,而该些第三堆栈对位件140配合于另一承载盘的复数堆栈对位件,则另一承载盘的框体容置于该第二框体容置槽1220内,以增加该第一承载盘10与该另一承载盘之间的堆栈稳固性。Furthermore, a second frame accommodating groove 1220 is provided on the bottom surface of the first carrier tray 10, and the third stacking alignment parts 140 are arranged in the second frame accommodating groove 1220, and the third stacking pairs The positioning member 140 is matched with the plurality of stacking alignment members of another carrier tray, and the frame body of the other carrier tray is accommodated in the second frame body accommodating groove 1220, so as to increase the connection between the first carrier tray 10 and the other carrier tray. Stack stability between carrier trays.

此外,该第二承载盘20进一步设置多个第四堆栈对位件240,该些第四堆栈对位件240是非对称设置于该第二框体220的周缘上,该些第四堆栈对位件240对应于另一承载盘的底部所非对称设置的复数堆栈对位件,此另一承载盘相同或近似于该第一承载盘10,如此当此另一承载盘欲堆栈于该第二承载盘20之上时,此另一承载盘的底部的该些堆栈对位件必须对应于该第二承载盘20所非对称设置的该些第四堆栈对位件240,此另一承载盘才能堆栈于该第二承载盘20之上,使该第二承载盘20与此另一承载盘之间堆栈方向具有限制性。本发明并不限制该些第四堆栈对位件240为凸件、凹件或凸件与凹件的组合,该些第四堆栈对位件240是与对应的堆栈对位件以互相嵌合、固定或配合等方式结合。In addition, the second carrier tray 20 is further provided with a plurality of fourth stacking alignment parts 240, and these fourth stacking alignment parts 240 are asymmetrically arranged on the periphery of the second frame body 220, and these fourth stacking alignment parts The part 240 corresponds to a plurality of stacking alignment parts arranged asymmetrically on the bottom of another carrier, which is the same as or similar to the first carrier 10, so that when the other carrier is to be stacked on the second When the carrier tray 20 is on top, the stacking alignment members at the bottom of the other carrier tray must correspond to the fourth stack alignment members 240 asymmetrically arranged on the second carrier tray 20, and the other carrier tray The stacking direction between the second carrier tray 20 and the other carrier tray is limited. The present invention does not limit the fourth stacking alignment pieces 240 to be convex pieces, concave pieces or a combination of convex pieces and concave pieces. These fourth stacking alignment pieces 240 are to be fitted with corresponding stacking alignment pieces. , fixed or combined with other methods.

本发明的该第二承载盘20堆栈于该第一承载盘10之上,该第一承载盘10的该第一基板110堆栈于该第二承载盘20的该第二基板210。此外,该第一基板110的一边角作为一第一对位角310,而该第二基板210的一边角作为一第二对位角320,该第二对位角320的形状对应该第一对位角310的形状,当该第二承载盘20欲堆栈于该第一承载盘10之上时,该第一对位角310与该第二对位角320用于便于作业人员直接目视而得知该第一承载盘10与该第二承载盘20的堆栈方向。于本发明的一实施例中,该第一对位角310与该第二对位角320皆为切角。The second tray 20 of the present invention is stacked on the first tray 10 , and the first substrate 110 of the first tray 10 is stacked on the second substrate 210 of the second tray 20 . In addition, one corner of the first substrate 110 serves as a first alignment angle 310, and one corner of the second substrate 210 serves as a second alignment angle 320, and the shape of the second alignment angle 320 corresponds to the first alignment angle. The shape of the alignment angle 310, when the second carrier tray 20 is to be stacked on the first carrier tray 10, the first alignment angle 310 and the second alignment angle 320 are used to facilitate direct visual inspection by operators And the stacking directions of the first tray 10 and the second tray 20 are obtained. In an embodiment of the present invention, both the first alignment angle 310 and the second alignment angle 320 are cut corners.

由上述说明与图示可知,于本发明的一实施例中,该第二承载盘20的结构相同于该第一承载盘10的结构,如此便于开发模具与生产承载盘,仅需利用同一模具即可生产本发明的承载盘,而降低费用。此外,位于该第一承载盘10的该些第一堆栈对位件130并非必须设置于该第一框体120的周缘上,其也可以设置于该第一基板110的周缘上,或者设置于该第一框体120的周缘上以及该第一基板110的周缘上,又或者依据使用需求而设置于其它合适位置。位于该第二承载盘20的该些第四堆栈对位件240也可以设置于该第二基板210的周缘上。换言之,本发明的该些第一堆栈对位件130与该些第四堆栈对位件240是分别设置于该第一承载盘10与该第二承载盘20的上表面,而该些第二堆栈对位件230与该些第三堆栈对位件140是分别设置于该第二承载盘20与该第一承载盘10的底面上。As can be seen from the above description and illustration, in one embodiment of the present invention, the structure of the second carrier plate 20 is the same as that of the first carrier plate 10, so that it is convenient to develop molds and produce carrier plates, and only need to use the same mold The carrying plate of the present invention can be produced, and the cost is reduced. In addition, the first stacking alignment members 130 on the first tray 10 do not have to be arranged on the periphery of the first frame body 120 , they can also be arranged on the periphery of the first substrate 110 , or arranged on The peripheral edge of the first frame body 120 and the peripheral edge of the first substrate 110 may be disposed at other suitable positions according to usage requirements. The fourth stacking alignment members 240 located on the second carrier tray 20 can also be disposed on the periphery of the second substrate 210 . In other words, the first stacking alignment members 130 and the fourth stacking alignment members 240 of the present invention are respectively arranged on the upper surfaces of the first carrier tray 10 and the second carrier tray 20 , and the second The stacking alignment parts 230 and the third stacking alignment parts 140 are respectively disposed on the bottom surfaces of the second carrier tray 20 and the first carrier tray 10 .

另外,请一并参阅图2,其为本发明的第一实施例的固定保护纸的示意图;如图所示,本发明更进一步于该些第一芯片容置槽1210之上设置一保护纸40,该保护纸40是设置于该些第一堆栈对位件130之间,由于该些第一堆栈对位件130设置于该些第一芯片容置槽1210的周围,而该保护纸40受限于该些第一堆栈对位件130,且该些第一堆栈对位件130配合该些第二堆栈对位件230,如此该保护纸40则被限制于该第一芯片容置槽1210之上,使保护纸40不易偏移,而确实保护芯片,且不会造成芯片承载盘堆栈不良的问题。其中,该保护纸40为泰维克纸。In addition, please refer to FIG. 2 , which is a schematic diagram of the fixed protective paper in the first embodiment of the present invention; 40, the protective paper 40 is arranged between the first stack alignment parts 130, because the first stack alignment parts 130 are arranged around the first chip accommodating slots 1210, and the protective paper 40 Restricted by the first stacking alignment parts 130, and the first stacking alignment parts 130 cooperate with the second stacking alignment parts 230, so that the protective paper 40 is limited to the first chip accommodating groove 1210, so that the protective paper 40 is not easy to shift, but can indeed protect the chip, and will not cause the problem of poor stacking of the chip carrier tray. Wherein, the protective paper 40 is Tyvek paper.

请一并参阅图3,其为本发明的第二实施例的结构示意图;如图所示,于本实施例中,该些第一堆栈对位件130与该些第四堆栈对位件240为条状凸件,而该些第二堆栈对位件230与该些第三堆栈对位件140为条状凹件。请参阅图1A,图1A所示的该些第一堆栈对位件130与该些第四堆栈对位件240为圆柱凸件,而该些第二堆栈对位件230与该些第三堆栈对位件140为圆柱凹件,因此可知本发明并不限定该些堆栈对位件的形状。该些第一堆栈对位件130的形状是对应于该些第二堆栈对位件230的形状,而以互相嵌合、固定或配合等方式结合,而该些第三堆栈对位件140与其相对应的堆栈对位件的结合方式,也是以本段落叙述的互相嵌合、固定或配合等方式结合,该些第四堆栈对位件240与其相对应的堆栈对位件的结合方式,同样也是以本段落叙述的互相嵌合、固定或配合等方式结合。Please also refer to FIG. 3 , which is a schematic structural diagram of the second embodiment of the present invention; as shown in the figure, in this embodiment, the first stack alignment members 130 and the fourth stack alignment members 240 are strip-shaped convex pieces, and the second stacking alignment pieces 230 and the third stacking alignment pieces 140 are strip-shaped concave pieces. Please refer to FIG. 1A, the first stacking alignment parts 130 and the fourth stacking alignment parts 240 shown in FIG. 1A are cylindrical protrusions, and the second stacking alignment parts 230 and the third stacking alignment parts The aligning member 140 is a cylindrical concave member, so it can be seen that the present invention does not limit the shape of these stacking aligning members. The shape of the first stacking alignment parts 130 is corresponding to the shape of the second stacking alignment parts 230, and is combined with each other in a manner of fitting, fixing or matching, and the third stacking alignment parts 140 and the third stacking alignment parts 140 The combination of the corresponding stack alignment parts is also combined with the mutual fitting, fixing or matching described in this paragraph. The combination of the fourth stack alignment parts 240 and its corresponding stack alignment parts is also the same. It is also combined in the ways of interfitting, fixing or matching described in this paragraph.

请参阅图4A到图4D,其为本发明的第三实施例的倒置芯片的作动示意图一到示意图四;如图所示,此实施例是表现翻转置放于一第一承载盘11的复数芯片50,而倒置于一第二承载盘21内。透过该第一承载盘11的多个第一倒装对位件131与该第二承载盘21的多个第二倒装对位件241相互配合,而使得该第一承载盘11可翻转而倒置于该第二承载盘21,使该第一承载盘11的多个第一芯片容置槽1211对应于该第二承载盘21的多个第二芯片容置槽2211,如此置放于该些第一芯片容置槽1211的该些芯片50即会被翻转而倒置于该第二承载盘21的该些第二芯片容置槽2211内。其中,该第二承载盘21的该些第二倒装对位件241对应于该第一承载盘11的该些第一倒装对位件131,而该些第一倒装对位件131可相同于前述实施例的该些第一堆栈对位件130。Please refer to FIG. 4A to FIG. 4D , which are schematic diagrams 1 to 4 of the action of the inverted chip of the third embodiment of the present invention; A plurality of chips 50 are placed upside down in a second carrier plate 21 . The plurality of first flip-chip alignment parts 131 of the first carrier tray 11 cooperate with the plurality of second flip-chip alignment parts 241 of the second carrier tray 21, so that the first carrier tray 11 can be turned over And put it upside down on the second carrier plate 21, so that the plurality of first chip accommodating grooves 1211 of the first carrier plate 11 correspond to the plurality of second chip accommodating grooves 2211 of the second carrier plate 21, so placed on The chips 50 in the first chip receiving slots 1211 are turned over and placed upside down in the second chip receiving slots 2211 of the second carrier tray 21 . Wherein, the second flip-chip alignment parts 241 of the second carrier tray 21 correspond to the first flip-chip alignment parts 131 of the first carrier tray 11, and the first flip-chip alignment parts 131 It may be the same as the first stack alignment members 130 in the foregoing embodiments.

该第一承载盘11是包含一第一基板111、一第一框体121与该些第一倒装对位件131,该第一框体121是设置于该第一基板111之上,并且该第一框体121具有该些第一芯片容置槽1211,而该些第一倒装对位件131非对称设置于该第一框体121的周缘上,该些第一倒装对位件131亦可设置于该第一基板111的周缘上,或者设置于该第一框体121的周缘以及该第一基板111的周缘;该些芯片50是分别置放于该些第一芯片容置槽1211内。该第二承载盘21是包含一第二基板211、一第二框体221与该些第二倒装对位件241,该第二框体221是设置于该第二基板211之上,并且该第二框体221具有该些第二芯片容置槽2211,而该些第二倒装对位件241对应该些第一倒装对位件131而设置于该第二框体221的周缘上。The first tray 11 includes a first substrate 111, a first frame 121 and the first flip-chip alignment parts 131, the first frame 121 is arranged on the first substrate 111, and The first frame body 121 has the first chip accommodating slots 1211, and the first flip-chip alignment parts 131 are asymmetrically arranged on the periphery of the first frame body 121, and the first flip-chip alignment parts Components 131 can also be arranged on the periphery of the first substrate 111, or arranged on the periphery of the first frame body 121 and the periphery of the first substrate 111; the chips 50 are placed in the first chip containers respectively. Put it in the groove 1211. The second carrier 21 includes a second substrate 211, a second frame 221 and the second flip-chip alignment parts 241, the second frame 221 is arranged on the second substrate 211, and The second frame body 221 has the second chip accommodating grooves 2211, and the second flip chip alignment parts 241 are arranged on the periphery of the second frame body 221 corresponding to the first flip chip alignment parts 131. superior.

翻转置放于该第一承载盘11的该些芯片50而倒置于该第二承载盘21内时,首先如图4A所示,依照该第二承载盘21的该些第二倒装对位件241与该第一承载盘11的该些第一倒装对位件131的对应位置,翻转该第二承载盘21于该第一承载盘11之上,使该些第二芯片容置槽2211对应于该些第一芯片容置槽1211,而让该些第二芯片容置槽2211对应于放置在该些第一芯片容置槽1211的该些芯片50。之后,如图4B所示,将该第一承载盘11与该第二承载盘21一起翻转后,即如图4C所示,该第一承载盘11则倒置于该第二承载盘21之上,该些芯片50即会从该第一承载盘11的该些第一芯片容置槽1211倒置于该第二承载盘21的该些第二芯片容置槽2211内。最后,将该第一承载盘11从该第二承载盘21之上翻转开,如图4D所示,即完成翻转该些芯片50而倒置于该第二承载盘21内的动作。When turning over the chips 50 placed on the first carrier 11 and placing them upside down in the second carrier 21, as shown in FIG. 241 and the corresponding positions of the first flip-chip alignment parts 131 of the first carrier tray 11, flip the second carrier tray 21 on the first carrier tray 11, so that the second chip accommodating grooves 2211 corresponds to the first chip receiving slots 1211 , and let the second chip receiving slots 2211 correspond to the chips 50 placed in the first chip receiving slots 1211 . Afterwards, as shown in FIG. 4B, after the first carrier tray 11 and the second carrier tray 21 are turned over together, as shown in FIG. 4C, the first carrier tray 11 is placed upside down on the second carrier tray 21 , the chips 50 are placed upside down from the first chip receiving slots 1211 of the first carrier tray 11 into the second chip receiving slots 2211 of the second carrier tray 21 . Finally, the first carrier tray 11 is turned over from the second carrier tray 21 , as shown in FIG. 4D , that is, the action of turning over the chips 50 and placing them upside down in the second carrier tray 21 is completed.

承上所述,本发明的芯片承载盘可被利用于倒置芯片,先将该第二承载盘21的该些第二倒装对位件241对位于该第一承载盘11的该些第一倒装对位件131,之后翻转该第二承载盘21于该第一承载盘11之上,如此该第一承载盘11的该些第一芯片容置槽1211即会对应于该第二承载盘21的该些第二芯片容置槽2211,接续,再进行两者之间的翻转倒置,使该些芯片50倒置于该些第二芯片容置槽2211内。上述的方式消弭芯片倒置的人工费用,并且增加芯片倒置的作业成功率,并且相较于以往利用双面芯片承载盘所花费的费用也较为便宜,且双面芯片承载盘的制程的稳定度较差。Based on the above, the chip carrier of the present invention can be used for flipping chips. Flip the alignment member 131, and then turn the second carrier 21 over the first carrier 11, so that the first chip receiving grooves 1211 of the first carrier 11 will correspond to the second carrier The second chip accommodating grooves 2211 of the disc 21 are connected, and then flipped and inverted between the two, so that the chips 50 are placed upside down in the second chip accommodating grooves 2211 . The above-mentioned method eliminates the labor cost of chip inversion, and increases the success rate of chip inversion operations. Compared with the previous use of double-sided chip carrier trays, it is also cheaper, and the process stability of double-sided chip carrier trays is higher. Difference.

本发明上述的该些第一倒装对位件131为凸件,则对应于该些第一倒装对位件131的该些第二倒装对位件241为凹件,但本发明并不限制该些第一倒装对位件131与该些第二倒装对位件241分别必须为凸件与凹件,两者可为凹件、凸件或凸件与凹件的组合,该些第一倒装对位件131能以嵌合、固定或配合等方式结合于该些第二倒装对位件241。The above-mentioned first flip-chip alignment parts 131 of the present invention are convex parts, and the second flip-chip alignment parts 241 corresponding to the first flip-chip alignment parts 131 are concave parts, but the present invention does not It is not limited that the first flip chip alignment parts 131 and the second flip chip alignment parts 241 must be convex parts and concave parts respectively, and both may be concave parts, convex parts or a combination of convex parts and concave parts, The first flip-chip alignment elements 131 can be combined with the second flip-chip alignment elements 241 by fitting, fixing or mating.

请一并参阅图5,其为本发明的第四实施例的结构示意图;如图所示,于本实施例中,该些第一倒装对位件131包含条状凸件与凹件,而该些第二倒装对位件241也包含条状凸件与凹件,以使两者互相配合。请参阅图4A,图4A所示的该些第一倒装对位件131与该些第二倒装对位件241分别为圆柱凸件与圆柱凹件,因此可知本发明并不限定该些倒装对位件的形状,该些第一倒装对位件131的形状是与该些第二倒装对位件241的形状互相对应,而以互相嵌合、固定或配合等方式结合。Please also refer to FIG. 5 , which is a schematic structural view of a fourth embodiment of the present invention; as shown in the figure, in this embodiment, the first flip-chip alignment parts 131 include strip-shaped convex parts and concave parts, The second flip-chip alignment parts 241 also include strip-shaped convex parts and concave parts, so that the two can cooperate with each other. Please refer to FIG. 4A, the first flip chip alignment parts 131 and the second flip chip alignment parts 241 shown in FIG. 4A are cylindrical convex parts and cylindrical concave parts respectively, so it can be seen that the present invention is not limited to The shapes of the flip-chip alignment parts, the shapes of the first flip-chip alignment parts 131 and the shapes of the second flip-chip alignment parts 241 are corresponding to each other, and are combined by mutual fitting, fixing or matching.

请一并参阅图6A到图6C,其为本发明的第五实施例的堆栈承载盘的作动示意图与倒置芯片的作动示意图;如图所示,本实施例与第三实施例(图4A)差异在于该第二承载盘21进一步设置多个第二堆栈对位件231,该些第二堆栈对位件231对应于该些第一倒装对位件131,而设置于该第二基板211的底面,该些第二堆栈对位件231配合于该些第一倒装对位件131,使该第二承载盘21能堆栈于该第一承载盘11之上。由上述可知,该些第一倒装对位件131具有堆栈功能,而同于图1A所示的该些第一堆栈对位件130的堆栈功能。Please refer to FIG. 6A to FIG. 6C together, which are schematic diagrams of the operation of the stacked carrier tray and the operation diagram of the inverted chip according to the fifth embodiment of the present invention; as shown in the figure, this embodiment and the third embodiment (FIG. 4A) The difference is that the second carrier tray 21 is further provided with a plurality of second stacking alignment members 231, and these second stacking alignment members 231 correspond to the first flip-chip alignment members 131, and are arranged on the second On the bottom surface of the substrate 211 , the second stacking alignment parts 231 are matched with the first flip chip alignment parts 131 , so that the second carrier 21 can be stacked on the first carrier 11 . It can be seen from the above that the first flip-chip alignment elements 131 have a stacking function, which is the same as that of the first stacking alignment elements 130 shown in FIG. 1A .

再者,该第一承载盘11进一步设置多个第三堆栈对位件141,该些第三堆栈对位件141非对称设置于该第一基板111的底面,而该第二承载盘21更进一步设置多个第四堆栈对位件242,该些第四堆栈对位件242对应该些第三堆栈对位件141,而设置于该第二框体221的周缘上,该些第四堆栈对位件242可配合该些第三堆栈对位件141,如图6B所示,使其它同于该第一承载盘11的其它承载盘堆栈于该第二承载盘21之上。Furthermore, the first carrier tray 11 is further provided with a plurality of third stacking alignment members 141, and the third stacking alignment members 141 are asymmetrically arranged on the bottom surface of the first substrate 111, and the second carrier tray 21 is further Further set a plurality of fourth stack alignment parts 242, these fourth stack alignment parts 242 correspond to the third stack alignment parts 141, and are arranged on the periphery of the second frame body 221, these fourth stack alignment parts 242 The aligning member 242 can cooperate with the third stacking aligning members 141 , as shown in FIG. 6B , so that other carrier trays same as the first carrier tray 11 are stacked on the second carrier tray 21 .

另外,设置多个倒装对位件132于第一承载盘11,该些倒装对位件132相对应于该第二承载盘21的该些第四堆栈对位件242,即该些倒装对位件132配合该些第四堆栈对位件242,如此如图6C所示,第二承载盘21可翻转而倒置于该第一承载盘11之上。之后,依据图4B所示的动作,翻转该第一承载盘11与第二承载盘21。如图4C所示,该第一承载盘11即倒置于该第二承载盘21之上,即该第二承载盘21的该些第二芯片容置槽2211对应于该第一承载盘11的该些第一芯片容置槽1211,如此即翻转位于该些第一芯片容置槽1211的芯片,而倒置于该些第二芯片容置槽2211内。In addition, a plurality of upside-down alignment parts 132 are arranged on the first carrier tray 11, and these upside-down alignment parts 132 correspond to the fourth stack alignment parts 242 of the second carrier tray 21, that is, the upside-down alignment parts 242 The aligning components 132 cooperate with the fourth stacking aligning components 242 , so that, as shown in FIG. 6C , the second tray 21 can be turned over and placed on the first tray 11 upside down. Afterwards, according to the action shown in FIG. 4B , the first carrier tray 11 and the second carrier tray 21 are turned over. As shown in FIG. 4C, the first carrier plate 11 is placed upside down on the second carrier plate 21, that is, the second chip accommodating grooves 2211 of the second carrier plate 21 correspond to those of the first carrier plate 11. The first chip receiving grooves 1211 are thus turned over and the chips located in the first chip receiving grooves 1211 are turned upside down in the second chip receiving grooves 2211 .

由上述可知,该第一承载盘11的该些第一倒装对位件131除了具有倒置对位的功能外,也具有堆栈对位的功能,而该第二承载盘21的该些第四堆栈对位件242除了具有堆栈对位的功能外,也具有倒置对位的功能。由上述说明与图示可得知,此实施例的该第一承载盘11相同于该第二承载盘21,而便利于生产。As can be seen from the above, the first flip-chip alignment members 131 of the first tray 11 not only have the function of inversion alignment, but also have the function of stack alignment, and the fourth trays of the second tray 21 In addition to the function of stack alignment, the stack alignment member 242 also has the function of inversion alignment. It can be seen from the above description and illustration that the first carrier tray 11 of this embodiment is the same as the second carrier tray 21 , which is convenient for production.

综上所述,本发明提供一种芯片承载盘的结构,其具有多个倒装对位件,当欲将放置于一承载盘的复数芯片翻转而倒置于另一承载盘时,放置有该些芯片的一承载盘的该些倒装对位件与未放置有芯片的另一承载盘的该些倒装对位件相互配合,使得置放有该些芯片的该承载盘可被翻转而倒置于此另一承载盘上,如此该些芯片即会被翻转,而确实倒置于该另一承载盘内。本发明的芯片承载盘可用于翻转芯片以倒置芯片,其降低倒置芯片的费用,并且增加倒置芯片的作业成功率与效率。To sum up, the present invention provides a structure of a chip carrier, which has a plurality of flip-chip alignment parts. The flip-chip alignment parts of a carrier tray of these chips cooperate with the flip-chip alignment parts of another carrier tray without chips, so that the carrier tray with these chips can be turned over and and place them upside down on the other carrier, so that the chips will be turned over and indeed placed upside down in the other carrier. The chip carrying plate of the present invention can be used to flip the chip to invert the chip, which reduces the cost of inverting the chip and increases the success rate and efficiency of the inversion chip operation.

此外,本发明的芯片承载盘更包含有多个堆栈对位件,该些堆栈对位件呈非对称设置于承载盘,第二承载盘欲堆栈于第一承载盘之上时,第二承载盘的该些堆栈对位件必须配合于第一承载盘的该些堆栈对位件,第二承载盘方能顺利堆栈于第一承载盘之上,由于该些堆栈对位件呈非对称排列,所以该些堆栈对位件限制两个承载盘的堆栈方向,如此避免两承载盘于堆栈时产生堆栈方向的错误,而具有限制堆栈方向的功能。In addition, the chip carrier tray of the present invention further includes a plurality of stacking alignment parts, and these stacking alignment parts are asymmetrically arranged on the carrier tray. When the second carrier tray is to be stacked on the first carrier tray, the second carrier tray The stacking alignment parts of the disk must be matched with the stacking alignment parts of the first carrier tray, so that the second carrier tray can be successfully stacked on the first carrier tray, because the stacking alignment parts are arranged asymmetrically , so these stack alignment parts limit the stacking direction of the two carrier trays, so as to avoid the error of the stacking direction when the two carrier trays are stacked, and have the function of limiting the stacking direction.

再者,承载盘的复数芯片容置槽之上设置有保护纸,保护纸是设置于该些堆栈对位件之间,该些堆栈对位件会固定住保护芯片的保护纸,所以保护纸被限制于该些第一芯片容置槽之上,而避免保护纸偏离于该些芯片容置槽,进而避免造成芯片承载盘堆栈不良的问题。Furthermore, protective paper is provided on the plurality of chip accommodating slots of the carrier tray, and the protective paper is arranged between the stacking alignment parts, and these stacking alignment parts will fix the protective paper protecting the chips, so the protective paper It is limited above the first chip accommodating grooves, so as to prevent the protective paper from deviating from the chip accommodating grooves, thereby avoiding the problem of poor stacking of the chip carrier trays.

上文仅为本发明的较佳实施例而已,并非用来限定本发明实施的范围,凡依本发明权利要求范围所述的形状、构造、特征及精神所为的均等变化与修饰,均应包括于本发明的权利要求范围内。The above is only a preferred embodiment of the present invention, and is not intended to limit the implementation scope of the present invention. All equivalent changes and modifications made in accordance with the shape, structure, characteristics and spirit described in the scope of the claims of the present invention shall be included in the scope of the claims of the present invention.

Claims (19)

1. a kind of structure of chip bearing disc, is suitable to upside-down mounting and is arranged on another chip bearing disc, it is characterised in that it is included:
Multiple chip containing grooves;And
Multiple first upside-down mounting para-position parts, are arranged at the upper surface of the chip bearing disc;
The upper surface of wherein another chip bearing disc has multiple second upside-down mounting para-position parts, when the upper surface of the chip bearing disc When relative with the upper surface of another chip bearing disc, those the first upside-down mounting para-position parts are right each other with those the second upside-down mounting para-position parts Should, so that the upper surface of the chip bearing disc is fixed on separately by those the first upside-down mounting para-position parts and those the second upside-down mounting para-position parts The upper surface of one chip bearing disc.
2. the structure of chip bearing disc as claimed in claim 1, it is characterised in that further include:
One substrate;And
One framework, is arranged at the substrate, and those chip containing grooves are arranged at the framework;
Wherein, those the first upside-down mounting para-position parts are arranged at the substrate and/or the framework.
3. the structure of chip bearing disc as claimed in claim 2 a, it is characterised in that wherein corner of the substrate is a para-position Angle.
4. the structure of chip bearing disc as claimed in claim 1, it is characterised in that wherein those the first upside-down mounting para-position parts are in non- Symmetric arrays.
5. the structure of chip bearing disc as claimed in claim 1, it is characterised in that further include:
Multiple storehouse para-position parts, are arranged at the chip bearing disc, and those storehouse para-position parts are in asymmetric geometry.
6. the structure of chip bearing disc as claimed in claim 5, it is characterised in that wherein more enter on those chip containing grooves One step arranges a protection sheet, and the protection sheet is arranged between those storehouse para-position parts.
7. a kind of structure of chip bearing disc, it is characterised in that it is included:
One first carrier, comprising multiple first upside-down mounting para-position parts and multiple first chip containing grooves, those the first upside-down mounting para-positions Part is arranged at the upper surface of first carrier;And
One second carrier, comprising multiple second upside-down mounting para-position parts and multiple second chip containing grooves, those the second upside-down mounting para-positions Part corresponds to those the first upside-down mounting para-position parts, and those the second upside-down mounting para-position parts are arranged at the upper surface of second carrier, when this The upper surface of one carrier in the face of the upper surface of second carrier when, those the first upside-down mounting para-position parts and those second upside-down mountings pair Position part corresponds to each other;
Wherein, those the second upside-down mounting para-position parts of second carrier are matched with those the first upside-down mounting para-positions of first carrier Part, first carrier overturns with second carrier and after inversion, is positioned over those first chips appearances of first carrier The multiple chips for putting groove are reversed, and are inverted in those second chip containing grooves of second carrier, and
The upper surface of first chip bearing disc is fixed on by those the first upside-down mounting para-position parts and those the second upside-down mounting para-position parts The upper surface of second chip bearing disc.
8. the structure of chip bearing disc as claimed in claim 7, it is characterised in that wherein first carrier is further included:
One first substrate;And
One first framework, is arranged at the first substrate, and those first chip containing grooves are arranged at first framework;
Wherein, those the first upside-down mounting para-position parts are arranged at the first substrate and/or first framework;
Second carrier is further included:
One second substrate;And
One second framework, is arranged at the second substrate, and those second chip containing grooves are arranged at the second framework;
Wherein, those the second upside-down mounting para-position parts are arranged at the second substrate and/or the second framework.
9. the structure of chip bearing disc as claimed in claim 7, it is characterised in that wherein those the first upside-down mounting para-position parts with should A little second upside-down mounting para-position parts are in asymmetric geometry.
10. the structure of chip bearing disc as claimed in claim 7, it is characterised in that wherein second carrier is further Comprising multiple storehouse para-position parts, those storehouse para-position parts to should the first carrier those the first upside-down mounting para-position parts, and arrange In the bottom surface of second carrier, those storehouse para-position parts of second carrier be matched with first carrier those first Upside-down mounting para-position part, and second carrier is stacked over first carrier.
The structure of 11. chip bearing discs as claimed in claim 7, it is characterised in that wherein first carrier further includes many Individual storehouse para-position part, those storehouse para-position parts are arranged at the bottom surface of first carrier, and in asymmetric geometry.
12. a kind of structures of chip bearing disc, it is characterised in that it is included:
One first carrier, comprising multiple first storehouse para-position parts and multiple first chip containing grooves, those the first storehouse para-positions Part is arranged at the upper surface of first carrier, and in asymmetric geometry;And
One second carrier, comprising multiple second storehouse para-position parts and multiple second chip containing grooves, those the second storehouse para-positions Part corresponds to those the first storehouse para-position parts, and is arranged at the bottom surface of second carrier;
Wherein, those the second storehouse para-position parts of second carrier are matched with those the first storehouse para-positions of first carrier Part, and second carrier is stacked over first carrier.
The structure of 13. chip bearing discs as claimed in claim 12, it is characterised in that wherein first carrier is further included:
One first substrate;And
One first framework, is arranged at the first substrate, and those first chip containing grooves are arranged at first framework;
Wherein, those the first storehouse para-position parts are arranged at the first substrate and/or first framework;
Second carrier is further included:
One second substrate;And
One second framework, is arranged at the second substrate, and those second chip containing grooves are arranged at the second framework;
Wherein, those the second storehouse para-position parts are arranged at the bottom surface of the second substrate.
The structure of 14. chip bearing discs as claimed in claim 12, it is characterised in that wherein first carrier is further Comprising multiple 3rd storehouse para-position parts, those the 3rd storehouse para-position parts are arranged at the bottom surface of first carrier, and in non-right Claim arrangement.
The structure of 15. chip bearing discs as claimed in claim 12, it is characterised in that wherein second carrier is further Comprising multiple 4th storehouse para-position parts, those the 4th storehouse para-position parts are arranged at the upper surface of second carrier, and in non- Symmetric arrays.
The structure of 16. chip bearing discs as claimed in claim 15, it is characterised in that wherein first carrier is further wrapped Containing multiple upside-down mounting para-position parts, those upside-down mounting para-position parts of first carrier are arranged at the upper surface of first carrier, and right Should be in those the 4th storehouse para-position parts of second carrier, and second carrier further includes multiple upside-down mounting para-position parts, Those upside-down mounting para-position parts of second carrier are arranged at the upper surface of second carrier, and corresponding to first carrier Those the first storehouse para-position parts, those upside-down mounting para-position parts of second carrier are matched with those first heaps of first carrier Stack para-position part, and those upside-down mounting para-position parts of first carrier are matched with those the 4th storehouse para-positions of second carrier Part, after first carrier flips upside down with second carrier, those first chips for being positioned over first carrier are housed Multiple chips of groove are reversed, and are inverted in those second chip containing grooves of second carrier.
The structure of 17. chip bearing discs as claimed in claim 12, it is characterised in that wherein second carrier is further wrapped Containing multiple upside-down mounting para-position parts, those upside-down mounting para-position parts are arranged at the upper surface of second carrier, second carrier those Upside-down mounting para-position part corresponding to first carrier those the first storehouse para-position parts, those upside-down mounting para-position parts be matched with those first Storehouse para-position part, after first carrier and second carrier flip upside down, be positioned over first carrier those first Multiple chips of chip containing groove are reversed, and are inverted in those second chip containing grooves of second carrier.
The structure of 18. chip bearing discs as claimed in claim 12, it is characterised in that wherein those first chip containing grooves it On a protection sheet is further set, the protection sheet is arranged between those the first storehouse para-position parts.
The structure of 19. chip bearing discs as claimed in claim 12, it is characterised in that a wherein corner of first carrier For one first pair of parallactic angle, and a corner of second carrier is one second pair of parallactic angle, and the shape of second pair of parallactic angle is to should The shape of first pair of parallactic angle.
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CN104307768B (en) * 2014-10-29 2017-07-11 李志红 The method and apparatus detected to bulk article
CN108318799B (en) * 2017-01-17 2020-10-27 崇碁科技股份有限公司 Chip programming test equipment and method
TWI754577B (en) * 2021-04-12 2022-02-01 頎邦科技股份有限公司 Tray
CN114324396A (en) * 2021-12-31 2022-04-12 上海世禹精密机械有限公司 Automatic chip sorting machine

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6029427A (en) * 1999-04-05 2000-02-29 Lucent Technologies, Inc. Method and apparatus for handling semiconductor chips
US6071056A (en) * 1998-11-13 2000-06-06 International Business Machines Corporation Shipping tray backside location
US6139243A (en) * 1997-07-09 2000-10-31 Systemation Engineering Method and system for flipping a tray of parts
CN102881621A (en) * 2012-10-19 2013-01-16 无锡尚实电子科技有限公司 Inverting and aligning method and device
CN203910771U (en) * 2014-05-23 2014-10-29 矽创电子股份有限公司 Chip Carrier Structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6139243A (en) * 1997-07-09 2000-10-31 Systemation Engineering Method and system for flipping a tray of parts
US6071056A (en) * 1998-11-13 2000-06-06 International Business Machines Corporation Shipping tray backside location
US6029427A (en) * 1999-04-05 2000-02-29 Lucent Technologies, Inc. Method and apparatus for handling semiconductor chips
CN102881621A (en) * 2012-10-19 2013-01-16 无锡尚实电子科技有限公司 Inverting and aligning method and device
CN203910771U (en) * 2014-05-23 2014-10-29 矽创电子股份有限公司 Chip Carrier Structure

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