CN103985802B - Light-emitting diode and method of making the same - Google Patents

Abstract

The present invention discloses a light emitting diode and a manufacturing method thereof. The light emitting diode comprises a first semiconductor layer, an active layer located on the first semiconductor layer, a second semiconductor layer located on the active layer, and a semiconductor contact layer located on the second semiconductor layer. The second semiconductor layer comprises a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer, wherein the material of the second semiconductor layer comprises Al _x Ga _1‑x N (0<x<1), and the surface of the second semiconductor layer comprises an irregularly distributed hole structure.

Description

Light-emitting diode and method of making the same

technical field

The invention relates to a light-emitting diode and a manufacturing method thereof, in particular to improving the photoelectric characteristics of the light-emitting diode.

Background technique

Light-emitting diodes (LEDs) used in solid-state lighting devices have good photoelectric characteristics such as low energy consumption, low heat generation, long operating life, shock resistance, small size, fast response, and stable output light wavelengths. Therefore, light-emitting diodes It is widely used in various lighting purposes. When the light-emitting diode is turned on, the current passing through the light-emitting diode is called the forward operating current (If), and the voltage measured across the light-emitting diode under the forward operating current is called the forward voltage (Vf). .

The advantage of light-emitting diodes is low energy consumption, but what is more needed in daily life is sufficient light. In addition to increasing the number of LEDs used, the operating current of the LEDs can also be increased to increase the luminous intensity of each LED. However, when the forward current of the LED is increased, the product of the forward voltage and the forward current will be increased at the same time, and the energy consumed as heat energy will also be increased. In order to allow the LED to be used in a low energy consumption condition, and at the same time allow the LED to maintain a sufficient luminous intensity, reduce the forward voltage of the LED to avoid the product of the forward voltage and the forward current from being too large. The energy is consumed into heat energy, which has become an important research direction to promote the widespread application of light-emitting diodes.

The aforementioned light-emitting diodes can be combined with other components to form a light-emitting device. The components in the light-emitting device include a sub-carrier with a circuit, bonding the light-emitting diode on the sub-carrier and making the substrate of the light-emitting diode and the circuit on the sub-carrier Solder for electrical connection, and an electrical connection structure for electrically connecting the electrodes of the light-emitting diode and the sub-carrier circuit. Wherein, the above-mentioned sub-carrier can be a lead frame or a large-sized mosaic substrate, so as to facilitate the circuit planning of the light-emitting device and improve the heat dissipation effect of the light-emitting diode.

Contents of the invention

In order to solve the above problems, the present invention provides a light emitting diode, which comprises a first semiconductor layer, an active layer located on the first semiconductor layer, a second semiconductor layer located on the active layer, and an active layer located on the second semiconductor layer. semiconductor contact layer. The second semiconductor layer includes a first layer and a second layer formed on the first layer, wherein the material of the second layer includes AlxGa1-xN (0<x<1), and the second layer The surface contains irregularly distributed pore structures.

The invention discloses a method for manufacturing a light-emitting diode, which includes providing a substrate, forming a first semiconductor layer on the substrate, then forming an active layer on the first semiconductor layer, and then epitaxially forming an Al _x Ga _1-x A second semiconductor layer of N(0<x<1) is on the active layer; wherein, the surface of the second semiconductor layer includes irregularly distributed hole structures.

Description of drawings

FIG. 1 shows an embodiment of the first light-emitting diode stack disclosed by the present invention;

Fig. 2 shows the embodiment of the second semiconductor layer disclosed by the present invention;

FIG. 3 shows an embodiment of the second light-emitting diode stack disclosed by the present invention;

FIG. 4 shows an embodiment of a third LED stack disclosed in the present invention.

Description of main component symbols

100, 200, 300: LED stacking

102: Substrate

104:Superlattice layer

106: the first semiconductor layer

108: strain layer

110: active layer

112: Electron blocking layer

114: the second semiconductor layer

1141: first layer

1142: first layer

1143: Second layer

1144: The third layer

1146: The second layer

116, 118: semiconductor contact layer

120: transparent conductive oxide layer

Detailed ways

1 is a cross-sectional view of a first light emitting diode stack 100 according to a first embodiment of the present invention. The first light emitting diode stack 100 includes a substrate 102, a superlattice layer 104, a first semiconductor layer 106, an active layer 110, a second Two semiconductor layers 114 , a semiconductor contact layer 116 and a transparent conductive oxide layer 120 . The material of the substrate 102 may include Ga, As, Si, C, P, Al, N, , Zn, O, Li and other elements or a combination of these elements but not limited to these elements, the substrate 102 can be a conductive substrate, an insulating substrate or a composite substrate, and the conductive substrate can be a metal substrate, such as containing aluminum or silicon The insulating substrate can be a sapphire (Sapphire) substrate or a ceramic substrate with both thermal conductivity and insulation; or a composite substrate, such as combining conductive materials and insulating materials to change the current distribution to solve current crowding (currentcrowding) phenomenon or improve the reflective effect on the substrate to reduce internal light absorption. In addition, the substrate 102 may also be a patterned substrate with graphics on its surface. There is a superlattice layer 104 between the substrate 102 and the first semiconductor layer 106, and the superlattice layer 104 is a buffer layer used to reduce the stress caused by the lattice constant difference between the substrate 102 and the first semiconductor layer 106 In order to avoid damage or instability of the epitaxial structure due to the stress between the two. In other embodiments, an adhesive layer (not shown in the figure) for connection is further included between the substrate 102 and the first semiconductor layer 106 to strengthen the bonding between the substrate 102 and the first semiconductor layer 106 . When the first semiconductor layer 106 is a p-type semiconductor, the second semiconductor layer 114 is an n-type semiconductor with a different electrical property; A non-conductive p-type semiconductor, wherein the first semiconductor layer 106 and the second semiconductor layer 114 can serve as binding layers. The active layer 110 is located between the first semiconductor layer 106 and the second semiconductor layer 114 and can be a single layer structure or a multiple quantum well layer structure composed of multiple well layers and barrier layers to emit light of a specific wavelength. In this embodiment, the active layer 110 emits a blue light with a dominant wavelength of 440-470 nm, which is an anisotropic light.

The second semiconductor layer 114 is divided into the first layer 1141 and the second layer 1143 above the first layer 1141, and a semiconductor contact layer 116 covers the second layer 1143, wherein the second semiconductor The composition of the layer 114 includes III-V materials, and the material of the second sub-layer 1143 is _{AlxGa1 -xN} , where 0<x<1. The side between the adjacent second sub-layer 1143 and the semiconductor contact layer 116 is an irregular surface, as shown in FIG. 1 , and there are irregular hole structures on the irregular surface. These irregular surfaces and irregularly distributed holes are simultaneously formed when the second layer 1143 composed of _{AlxGa1 -xN is} epitaxially formed, and these holes are scattered in the aforementioned on the irregular surface. In this embodiment, the hole structure caused by the formation of _{AlxGa1 -xN} by epitaxial growth is not only distributed on the surface, but also includes a plurality of hexagonal hole structures extending downward, of which at least one hexagonal hole will extend to the inside of the second semiconductor layer 114 as a binding layer (not shown in the figure).

On the semiconductor contact layer 116 is a transparent conductive oxide layer 120 , and on the transparent conductive oxide layer 120 is an electrode layer (not shown in the figure). The material used for the transparent conductive oxide layer 120 can be ITO; the material of the semiconductor contact layer 116 includes a material with an energy gap lower than that of the second semiconductor layer, such as AlGaN or InGaN, which can reduce the semiconductor contact by heavily doping carriers. The energy gap of the layer 116 enables the semiconductor contact layer 116 to form a good Ohmic contact between the transparent conductive oxide layer 120 and the second semiconductor layer 114 .

In this embodiment, the first semiconductor layer 106 has a first lattice constant, the active layer 110 located on the first semiconductor layer 106 has a second lattice constant, and the second semiconductor layer 114 located on the active layer 110 has a third lattice constant. Because the second lattice constant is greater than the first lattice constant, the active layer 110 is subjected to outward stress from the first semiconductor layer 106 , resulting in poor epitaxial quality. In order to improve the stress on the active layer 110, the third lattice constant of the second semiconductor layer 114 is smaller than the first lattice constant by selecting different materials, so as to form an inward stress on the active layer 110 and make the first semiconductor layer 114 emit light. Stress balance is achieved inside the diode stack 100 to improve epitaxial quality. In other words, the first semiconductor layer 106 has a first lattice constant between the second lattice constant of the active layer 110 and the third lattice constant of the second semiconductor layer 114, so as to form good epitaxial quality and reduce The forward voltage (V _f ) of the first LED stack 100 in operation.

In this embodiment, the second semiconductor layer 114 on the active layer 110 includes a plurality of sub-layers with different impurity concentrations but with the same electrical properties, as shown in FIG. 2 . Among these multiple sub-layers, the first sub-layer 1142 is closest to the active layer 110, the second sub-layer 1146 is located on the first sub-layer 1142, and the third sub-layer 1144 is located between the first sub-layer 1142 and the second sub-layer. Between layers 1146. The second sub-layer 1146 is closest to the semiconductor contact layer 116 , and the outer surface of the second sub-layer 1146 closest to the semiconductor contact layer 116 contains irregularly distributed hole structures. The material of the first layer 1142 and the second layer 1146 includes aluminum, wherein the first layer 1142 and the second layer 1146 include Al _y Ga _1-y N, where 0<y<0.3; in another embodiment In order to cooperate with the active layer 110 and the semiconductor contact layer 116 adjacent to the second semiconductor layer 114 to have different lattice constants, for example, when the lattice constants of the active layer 110 and the semiconductor contact layer 116 are larger, a smaller value of y is selected between between 0 and 0.1, so that the first layer 1142 and the second layer 1146 have larger lattice constants, so as to reduce the relative stress between the two stacked layers. Although these sublayers have the same electrical conductivity, they have different impurity concentrations. The third impurity concentration of the third sublayer 1144 is between the first impurity concentration of the first layer 1142 and the second impurity concentration of the second sublayer 1146. Between the second impurity concentration. In this embodiment, the first impurity concentration is about 5*10 ¹⁸ cm ³ , the third impurity concentration is about 3*10 ¹⁹ cm ³ , and the second impurity concentration is about 1*10 ²⁰ cm ³ . In addition, the thicknesses of the three sub-layers are also different, the thickness of the third sub-layer 1144 is greater than the thickness of the first sub-layer 1142 and the second sub-layer 1146 . In another embodiment, the third sub-layer 1144 is made of a material that does not contain aluminum, while the first layer 1142 and the second sub-layer 1146 contain aluminum.

As shown in FIG. 3 , another embodiment of the present invention, a second light emitting diode stack 200 includes a substrate 102, a superlattice layer 104, a first semiconductor layer 106, a strain layer 108, an active layer 110, a second semiconductor layer 114, The electron blocking layer 112 , the semiconductor contact layer 116 and the transparent conductive oxide layer 120 . In this embodiment, the superlattice layer 104 is used to reduce the stress caused by the lattice constant mismatch between the second semiconductor layer 106 and the substrate 102 , so as to avoid deformation caused by stress during the subsequent formation of semiconductor stacks. When the active layer 110 is a multiple quantum well, a barrier layer closest to the second semiconductor layer 114 includes InGaN, that is, a barrier layer closest to the first layer 1142 includes InGaN.

In this embodiment, a strained layer 108 is formed on the first semiconductor layer 106 before forming multiple quantum wells, and in this embodiment, the material of the strained layer 108 and the active layer 110 are also composed of III-V materials, However, the impurity concentration of the strained layer 108 is lower than that of the active layer 110, so as to reduce the stress caused by the dislocation between the multiple quantum wells in the active layer 110 and the first semiconductor layer 106 due to the difference in lattice constant, so as to improve the epitaxial quality of the active layer 110 . In this embodiment, the active layer 110 emits a blue light with a dominant wavelength between 440-470 nm, which is a non-coherent light. In this embodiment, the materials of the first semiconductor layer 106, the active layer 110, the second semiconductor layer 114, and the strained layer 108 are selected from stacks with different compositions of III-V materials containing elements such as Al, In, Ga, and N. layer, such as a stack composed of InGaN and GaN or a stack composed of AlGaN and InGaN, so that the lattice constant difference between the stacks is within a predetermined range, so as to achieve the effect of reducing the stress between the stacks. Although the material of the strained layer 108 is composed of III-V materials like the active layer 110, the composition of the composition is different from that of the active layer 110, so that the lattice constant of the strained layer 108 is between the active layer 110 and the first semiconductor layer 106. In between, to improve the epitaxial quality of the epitaxial stack grown on the first semiconductor layer 106 and improve the luminous efficiency.

In this embodiment, the first semiconductor layer 106 is an n-type semiconductor, while the second semiconductor layer 114 is a p-type, and an electron blocking layer 112 is formed between the active layer 110 and the second semiconductor layer 114 to prevent the first semiconductor layer from The electrons moving from 106 to the active layer 110 overflow to the second semiconductor layer 114 to cause the electrons to combine in places other than the active layer 110 to reduce the luminous efficiency. To achieve this effect, the impurity concentration of the electron blocking layer 112 must be higher than the impurity concentration of the second semiconductor layer 114, or higher than the second impurity concentration of the second sub-layer 1146 included in the second semiconductor layer 114, The material of the electron blocking layer 112 may include III-V materials such as Al _z Ga _1-z N, where 0.15<z<0.4, and the effect of blocking electrons can be increased by increasing the content of Al.

In FIG. 3 , the second semiconductor layer 114 may further include a plurality of sublayers composed of AlGaN with different Al concentrations, and these sublayers also have different lattice constants. Wherein the lattice constant of the second semiconductor layer 114 is between the lattice constants of the electron blocking layer 112 and the active layer 110, and the lattice constant of the active layer 110 is larger than the electron blocking layer 112 and the second semiconductor layer 114, except that Preventing the active layer 110 from directly contacting the second semiconductor layer 114 with a large difference in lattice constant can improve the stress caused by the large difference in lattice constant between the active layer 110 and the second semiconductor layer 114 through the electron blocking layer 112 . And the stress between the multiple sub-layers with different lattice constants contained in the second semiconductor layer 114 and the adjacent electron blocking layer 112 will not be too large, so the quality of the epitaxy can be improved and the second light-emitting diode can be reduced. The forward voltage (Vf) of the stack 200.

4 is a cross-sectional view of a third light emitting diode stack 300 according to another embodiment of the present invention. The third light emitting diode stack 300 has a structure similar to that of the second light emitting diode stack 200 in FIG. A semiconductor layer 106 and a superlattice layer 104 have larger areas than other layers, so that other layers only cover a part of the area of the first semiconductor layer 106 . In the third light-emitting diode stack 300, the semiconductor contact layer 118 is formed on the second semiconductor layer 114, and covers at least part of the area of the first semiconductor layer 106, and an electrode layer (not shown in the figure) can be formed later. ) on the semiconductor contact layer 118.

The process of manufacturing the LED stack 100 according to the embodiment of the present invention is to provide a substrate 102 first, and then select the lattice constant according to the difference between the lattice constants of the first semiconductor layer 106 and the substrate 102 before forming the first semiconductor layer 106 The intervening material is formed on the substrate 102 as a superlattice layer 104. In an embodiment of the present invention, the material of the III-V group is selected to make the first semiconductor layer 106 and the superlattice layer 104. By adding supercrystalline The lattice layer 104 is used to relieve the stress between the substrate 102 and the first semiconductor layer 106 . Then form a first semiconductor layer 106 on the superlattice layer 104, and then form an active layer 110 on the first semiconductor layer 106, wherein the active layer 110 can also be a multiple quantum well structure. Next, a second semiconductor layer 114 made of _{AlxGa1 -xN} is formed on the active layer 110, where 0<x<1. Then, a semiconductor contact layer 116 is formed on the second semiconductor layer 114 , and a transparent conductive oxide layer 120 is formed on the semiconductor contact layer 116 . Wherein, the side of the second semiconductor layer 114 closest to the semiconductor contact layer 116 contains the material of _{AlxGa1 -xN} (0<x<1), and there are different layers between the second semiconductor layer 114 and the semiconductor contact layer 116. Regular planes and irregular hole structures on the plane, these irregular hole structures are simultaneously formed when the second semiconductor layer 114 is epitaxially formed, and include a structure of hexagonal holes, wherein at least one hexagonal hole extends to the second semiconductor layer 114 Two semiconductor layers 114 (not shown in the figure). In this embodiment, the active layer 110 emits a blue light with a dominant wavelength between 440-470 nm, which is a non-coherent light.

As shown in the structural diagram of FIG. 2 , the second semiconductor layer 114 includes the first layer 1142, the second layer 1146 and the third layer 1144, and the step of forming the second semiconductor layer 114 includes passing a flow containing Ga and N gases and aluminum-containing organometallic gases are used to form AlGaN, and the production process conditions for introducing aluminum-containing organometallic gases are between 900 and 1100°C at an ambient temperature and at a pressure range of 300 to 500 Torr. 30~300sccm organometallic gas, and the organometallic gas containing aluminum may be trimethylaluminum ((CH ₃ ) ₃ Al, TMAl) containing aluminum. As mentioned above, the impurity concentrations of the first layer 1142, the second layer 1146 and the third layer 1144 are different, so the concentration of the impurity-containing gas introduced when forming the second layer 1146 is higher than that of forming the first layer 1146. The concentration of the gas injected in the first layer 1142, and then further increase the concentration of the gas with impurities introduced in the formation of the third layer 1144, so that the impurity concentration of each layer moves away from the active layer 110 And increase. In an embodiment of the present invention, the second semiconductor layer 114 is a p-type semiconductor, so when forming the second semiconductor layer 114, magnesium (Mg(C ₅ H ₅ ) ₂ , Magnesocene) is introduced to provide magnesium as a doping impurity .

Next, a semiconductor contact layer 116 and a transparent conductive oxide layer 120 are formed on the second semiconductor layer 114 , wherein the material of the transparent conductive oxide layer 120 is ITO, which can be used as a window layer to increase light output. Then an electrode layer (not shown in the figure) is formed on the transparent conductive oxide layer 120, and when the substrate 102 is a conductive material, an electrode layer ( not shown in the figure); or first remove the substrate 102, then combine the conductive substrate with the superlattice layer 104, and form an electrode layer on the other side of the conductive substrate.

In FIG. 3 , the difference between the second LED stack 200 and the LED stack 100 in FIG. 1 is that before forming the active layer 110 of the second LED stack 200 , a strained layer 108 is first formed on the first semiconductor layer 106 , when the active layer 110 is subsequently formed, the quality of the grown epitaxy is better because the lattice constant difference between the strained layer 108 and the active layer 110 is less. Another difference is that after forming the active layer 110, the electron blocking layer 112 is first formed and then the second semiconductor layer 114 is formed, so that the electron blocking layer 112 is between the active layer 110 and the second semiconductor layer 114, and wherein the electron blocking layer 112 The material may be _{AlyGa1 -yN} and 0.15<y<0.4. As mentioned above, the lattice constant of the active layer 110 is similar to that of the second semiconductor layer 114 through the addition of the electron blocking layer 112, which reduces the stress between the epitaxial stacks and makes the quality of the epitaxy better, thereby reducing the smoothness of the light-emitting diode stack. to the voltage result.

In the third LED stack 300 in FIG. 4 , after the formation of the second LED stack 200 in FIG. 3 , the light emitting stack is etched until a part of the first semiconductor layer 106 is exposed. Then, a semiconductor contact layer 118 is formed on the exposed part of the first semiconductor layer 106 , so that the semiconductor contact layer 118 covers at least a part of the first semiconductor layer 106 . Then two electrode layers (not shown in the figure) are respectively formed on the transparent conductive oxide layer 120 and the semiconductor contact layer 118 of the third LED stack 300 in FIG. 4 .

The above-mentioned embodiments are only illustrative to illustrate the principles and effects of the present invention, and are not intended to limit the present invention. Anyone with ordinary knowledge in the technical field of the present invention can modify and change the above-mentioned embodiments without violating the technical principle and spirit of the present invention. Therefore, the protection scope of the present invention is as listed in the claims.

Claims (19)

1. a kind of light emitting diode, comprising：

First semiconductor layer；

Active layer, positioned at first semiconductor layer；

Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second Layer, wherein the material of second sublevel includes Al_xGa_1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points The pore space structure of cloth, the pore space structure of those irregular distributions include multiple hexagonal holes, and wherein second semiconductor layer includes Electric conductivity is p-type；And

Semiconductor contact layer, positioned at second semiconductor layer.

2. light emitting diode as claimed in claim 1, wherein first sublevel have the first impurity concentration, second sublevel tool There is the second impurity concentration, which has identical electric conductivity with second sublevel, and second impurity concentration is more than First impurity concentration.

3. light emitting diode as claimed in claim 2, wherein second semiconductor layer also include third time layer, positioned at this first Between sublevel and second sublevel, wherein the third time layer has the electric conductivity identical with second sublevel；And the wherein the 3rd Sublevel has the 3rd impurity concentration, and the 3rd impurity concentration between first impurity concentration and second impurity concentration it Between.

4. light emitting diode as claimed in claim 3, the wherein thickness of the third time layer be more than first sublevel and this Quadratic-layer, and the third time layer does not contain aluminium component and first sublevel contains aluminium component.

5. light emitting diode as claimed in claim 2, also comprising electronic barrier layer, between the active layer and second semiconductor Between layer, wherein the material of the electronic barrier layer includes Al_zGa_1-zN(0.15<z<0.4), and the electronic barrier layer impurity it is dense Degree is higher than second impurity concentration.

6. light emitting diode as claimed in claim 1, the wherein at least one hexagonal hole is extended in second semiconductor layer Portion.

7. a kind of production method of light emitting diode, comprising：

One substrate is provided；

One first semiconductor layer is formed on the substrate；

An active layer is formed in first semiconductor layer；And

It is epitaxially formed and includes Al_xGa_1-xN(0<x<1) one second semiconductor layer is on the active layer, wherein second semiconductor The surface of layer includes the pore space structure of multiple irregular distributions；The step of wherein forming second semiconductor layer is also comprising shape at the same time Into the pore space structure of the irregular distribution；The pore space structure of those irregular distributions includes multiple hexagonal holes.

8. the production method of light emitting diode as claimed in claim 7, wherein the step of forming second semiconductor layer is also wrapped Containing being passed through the organic metal gas containing aluminium into an organometallic vapor deposition reactor with a predetermined amount of flow.

9. the production method of light emitting diode as claimed in claim 8, wherein, the predetermined amount of flow is between 30~300sccm.

10. the pressure of the production method of light emitting diode as claimed in claim 8, wherein the organometallic vapor deposition reactor Power is between 300~500torr.

11. the temperature of the production method of light emitting diode as claimed in claim 8, wherein the organometallic vapor deposition reactor Degree is between 900~1100 DEG C.

12. the production method of light emitting diode as claimed in claim 7, the wherein at least one hexagonal hole extend to this second Inside semiconductor layer.

13. a kind of light emitting diode, comprising：

First semiconductor layer；

Active layer, positioned at first semiconductor layer；

Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second Layer, wherein the material of second sublevel includes Al_xGa_1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points The pore space structure of cloth；And

Semiconductor contact layer, positioned at second semiconductor layer, the wherein pore space structure of those irregular distributions includes multiple Hexagonal hole, and at least one hexagonal hole is extended to inside second semiconductor layer.

14. light emitting diode as claimed in claim 13, wherein second semiconductor layer are p-type comprising electric conductivity.

15. light emitting diode as claimed in claim 13, wherein first sublevel have the first impurity concentration, second sublevel With the second impurity concentration, which has identical electric conductivity with second sublevel, and second impurity concentration is big In first impurity concentration.

16. light emitting diode as claimed in claim 15, wherein second semiconductor layer also include third time layer, positioned at this Between one sublevel and second sublevel, wherein the third time layer has the electric conductivity identical with second sublevel；And wherein this Three sublevels have the 3rd impurity concentration, and the 3rd impurity concentration is between first impurity concentration and second impurity concentration Between.

17. light emitting diode as claimed in claim 16, the wherein thickness of the third time layer are more than first sublevel and should Second sublevel, and the third time layer does not contain aluminium component and first sublevel contains aluminium component.

18. light emitting diode as claimed in claim 15, also comprising electronic barrier layer, the second half led with this between the active layer Between body layer, wherein the material of the electronic barrier layer includes Al_zGa_1-zN(0.15<z<0.4), and the electronic barrier layer impurity Concentration is higher than second impurity concentration.

19. a kind of light emitting diode, comprising：

First semiconductor layer；

Active layer, positioned at first semiconductor layer；

Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second Layer, wherein the material of second sublevel includes Al_xGa_1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points The pore space structure of cloth, wherein first sublevel have the first impurity concentration, which has the second impurity concentration, this first Sublevel has identical electric conductivity with second sublevel, and second impurity concentration is more than first impurity concentration, wherein should Second semiconductor layer is p-type comprising electric conductivity；And

Semiconductor contact layer, positioned at second semiconductor layer.