CN103984169A - Liquid crystal display device - Google Patents
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Abstract
Description
技术领域technical field
本发明系关于一种具有较高穿透率的液晶显示装置。The invention relates to a liquid crystal display device with higher transmittance.
背景技术Background technique
随着科技的进步,显示装置已经广泛的被运用在各种领域,尤其是液晶显示装置,因具有体型轻薄、低功率消耗及无辐射等优越特性,已经渐渐地取代传统阴极射线管显示装置,而应用至许多种类之电子产品中,例如行动电话、可携式多媒体装置、笔记型电脑、液晶电视及液晶荧幕等等。With the advancement of technology, display devices have been widely used in various fields, especially liquid crystal display devices, which have gradually replaced traditional cathode ray tube display devices due to their superior characteristics such as light and thin body, low power consumption and no radiation. It is applied to many types of electronic products, such as mobile phones, portable multimedia devices, notebook computers, LCD TVs and LCD screens, etc.
以液晶显示装置为例,液晶显示装置主要包含一液晶显示面板(LCD Panel)以及一背光模块(Backlight Module)。其中,液晶显示面板具有一薄膜晶体管基板、一彩色滤光基板以及一夹设于两基板间的液晶层,且两基板与液晶层可形成复数个阵列设置的像素。背光模块可将一光源的光线均匀地分布到液晶显示面板,并经由各像素显示色彩而形成一影像。Taking a liquid crystal display device as an example, the liquid crystal display device mainly includes a liquid crystal display panel (LCD Panel) and a backlight module (Backlight Module). Wherein, the liquid crystal display panel has a thin film transistor substrate, a color filter substrate and a liquid crystal layer interposed between the two substrates, and the two substrates and the liquid crystal layer can form a plurality of pixels arranged in an array. The backlight module can evenly distribute light from a light source to the liquid crystal display panel, and display colors through each pixel to form an image.
其中,各像素分别具有一元件区及一透光区,元件区系设置例如薄膜晶体管等元件的区域,而透光区系为光线可穿透的区域,且液晶显示面板就是透过透光区来显示影像画面。然而,于基板上设置薄膜晶体管等元件的制造工艺中,需于元件区与透光区分别沉积不同的薄膜层,例如于两区域中分别沉积缓冲层、介电层、绝缘层或平坦化层等多层的薄膜,但是,当背光源所提供的光线通过透光区内的多层薄膜层时,光线被吸收或被反射的比率高,造成液晶显示面板及液晶显示装置的穿透率(Transmittance)降低。Wherein, each pixel has an element area and a light-transmitting area, the element area is the area where elements such as thin film transistors are arranged, and the light-transmitting area is the area through which light can pass through, and the liquid crystal display panel is the area through which light passes through the light-transmitting area. to display the image screen. However, in the manufacturing process of disposing components such as thin film transistors on the substrate, different thin film layers need to be deposited in the component area and the light-transmitting area, such as buffer layers, dielectric layers, insulating layers, or planarization layers in the two areas. However, when the light provided by the backlight passes through the multi-layer film layer in the light-transmitting area, the light is absorbed or reflected at a high rate, resulting in the transmittance of the liquid crystal display panel and the liquid crystal display device ( Transmittance) is reduced.
因此,如何提供一种液晶显示装置,可具有较高的穿透率,已成为重要课题之一。Therefore, how to provide a liquid crystal display device with higher transmittance has become one of the important issues.
发明内容Contents of the invention
有鉴于上述课题,本发明之目的为提供一种具有较高穿透率之液晶显示装置。In view of the above problems, the object of the present invention is to provide a liquid crystal display device with higher transmittance.
为达上述目的,依据本发明之一种液晶显示装置包括一液晶显示面板以及一背光模块。液晶显示面板具有至少一元件区及一透光区,并包含一薄膜晶体管基板、一对向基板及一液晶层,薄膜晶体管基板具有一基板、一薄膜晶体管、一第一绝缘层、一第二绝缘层及一平坦化层,薄膜晶体管设置于基板上,并位于元件区,第一绝缘层设置于基板之上。第二绝缘层设置于第一绝缘层之上,第一绝缘层及第二绝缘层分别位于元件区,并由元件区分别延伸至透光区的边缘,平坦化层设置于基板之上,并位于元件区及透光区。对向基板与薄膜晶体管基板相对设置,液晶层设置于薄膜晶体管基板与对向基板之间。To achieve the above purpose, a liquid crystal display device according to the present invention includes a liquid crystal display panel and a backlight module. The liquid crystal display panel has at least one element area and a light-transmitting area, and includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer, and the thin film transistor substrate has a substrate, a thin film transistor, a first insulating layer, a second The insulation layer and a planarization layer, the thin film transistor is arranged on the substrate and located in the device area, and the first insulation layer is arranged on the substrate. The second insulating layer is arranged on the first insulating layer, the first insulating layer and the second insulating layer are respectively located in the element area, and respectively extend from the element area to the edge of the light-transmitting area, the planarization layer is arranged on the substrate, and Located in the component area and the light transmission area. The opposite substrate is arranged opposite to the thin film transistor substrate, and the liquid crystal layer is arranged between the thin film transistor substrate and the opposite substrate.
承上所述,因依据本发明之一种液晶显示装置中,薄膜晶体管基板之第一绝缘层及第二绝缘层系分别由元件区延伸至透光区的边缘,换言之,透光区内并未设置第一绝缘层及第二绝缘层。藉此,与现有技术相较,薄膜晶体管基板之透光区内因具有较少的薄膜层,故当背光源所提供的光线通过薄膜晶体管基板之透光区时,光线被吸收或反射的比率较少,因此,可使液晶显示装置具有较高的穿透率。Based on the above, in a liquid crystal display device according to the present invention, the first insulating layer and the second insulating layer of the thin film transistor substrate respectively extend from the element area to the edge of the light-transmitting area. The first insulating layer and the second insulating layer are not provided. Thus, compared with the prior art, there are fewer thin film layers in the light-transmitting area of the thin-film transistor substrate, so when the light provided by the backlight passes through the light-transmitting area of the thin-film transistor substrate, the ratio of light absorbed or reflected Therefore, the liquid crystal display device can have a higher transmittance.
附图说明Description of drawings
图1为本发明较佳实施例之一种液晶显示面板的示意图。FIG. 1 is a schematic diagram of a liquid crystal display panel according to a preferred embodiment of the present invention.
图2为本发明较佳实施例另一实施态样之液晶显示面板的示意图。FIG. 2 is a schematic diagram of a liquid crystal display panel in another implementation mode of the preferred embodiment of the present invention.
图3为本发明较佳实施例之一种液晶显示装置的示意图。FIG. 3 is a schematic diagram of a liquid crystal display device according to a preferred embodiment of the present invention.
1、1a:薄膜晶体管基板1, 1a: thin film transistor substrate
11:基板11: Substrate
12:缓冲层12: buffer layer
121:第一缓冲层121: The first buffer layer
122:第二缓冲层122: Second buffer layer
123:第三缓冲层123: The third buffer layer
13:第一绝缘层13: The first insulating layer
14:第二绝缘层14: Second insulating layer
15:平坦化层15: Planarization layer
16:保护层16: protective layer
17:共同电极层17: common electrode layer
18:钝化层18: Passivation layer
19:像素电极层19: Pixel electrode layer
2:对向基板2: Facing the substrate
3:液晶层3: Liquid crystal layer
4:液晶显示装置4: Liquid crystal display device
5:背光模块5: Backlight module
A:元件区A: component area
B:透光区B: Translucent area
C:通道层C: channel layer
D:漏极D: Drain
G:栅极G: grid
O:通孔O: through hole
P1、P2:液晶显示面板P1, P2: LCD panel
S:源极S: source
T:薄膜晶体管T: thin film transistor
具体实施方式Detailed ways
以下将参照相关图式,说明依本发明较佳实施例之液晶显示装置,其中相同的元件将以相同的参照符号加以说明。A liquid crystal display device according to a preferred embodiment of the present invention will be described below with reference to related drawings, wherein the same elements will be described with the same reference symbols.
为了方便说明,本发明图示中所显示各元件之高度及宽度的尺寸关系(比例)仅为示意,并不代表实际的尺寸关系。For the convenience of description, the dimensional relationship (proportion) of the height and width of each element shown in the drawings of the present invention is only for illustration, and does not represent the actual dimensional relationship.
请参照图1所示,其为本发明较佳实施例之一种液晶显示面板P1的示意图。Please refer to FIG. 1 , which is a schematic diagram of a liquid crystal display panel P1 according to a preferred embodiment of the present invention.
液晶显示面板P1为一主动矩阵式(active matrix)液晶显示面板,并具有一薄膜晶体管基板1、一对向基板2以及一夹设于两基板间的液晶层3。对向基板2与薄膜晶体管基板1相对设置,而液晶层3设置于薄膜晶体管基板1与对向基板2之间。于此,对向基板2可具有一滤光层(图未显示),以成为一彩色滤光基板。对向基板2为一可透光之材质,例如是玻璃、石英或类似物。此外,薄膜晶体管基板1、对向基板2与液晶层3可形成复数个阵列设置的像素,且各像素分别具有一元件区及一透光区。于此,图1系标示液晶显示面板P1中,薄膜晶体管基板1上的一个元件区A及一个透光区B的示意图。The liquid crystal display panel P1 is an active matrix liquid crystal display panel, and has a thin film transistor substrate 1 , a counter substrate 2 and a liquid crystal layer 3 sandwiched between the two substrates. The opposite substrate 2 is disposed opposite to the TFT substrate 1 , and the liquid crystal layer 3 is disposed between the TFT substrate 1 and the opposite substrate 2 . Here, the opposite substrate 2 may have a filter layer (not shown in the figure), so as to become a color filter substrate. The opposite substrate 2 is made of a transparent material, such as glass, quartz or the like. In addition, the thin film transistor substrate 1 , the opposite substrate 2 and the liquid crystal layer 3 can form a plurality of pixels arranged in an array, and each pixel has an element area and a light transmission area respectively. Herein, FIG. 1 is a schematic diagram of an element region A and a light-transmitting region B on a TFT substrate 1 in a liquid crystal display panel P1 .
薄膜晶体管基板1包括一基板11、一缓冲层12、一薄膜晶体管T、一第一绝缘层13、一第二绝缘层14以及一平坦化(planarization)层15。The thin film transistor substrate 1 includes a substrate 11 , a buffer layer 12 , a thin film transistor T, a first insulating layer 13 , a second insulating layer 14 and a planarization layer 15 .
基板11为一可透光之材质,在实施上,例如可为玻璃、石英或类似物、塑胶、橡胶、玻璃纤维或其他高分子材料,较佳的可为一硼酸盐无碱玻璃基板。在实际运用时,薄膜晶体管基板1之基板11与对向基板2系可选用相同或不同之材质,例如基板11使用硼酸盐无碱玻璃基板,而对向基板2使用钾玻璃基板。另外,液晶显示面板P1更可包括一黑色矩阵层(图未显示),于垂直基板11的方向上,黑色矩阵层可遮住元件区A,使光线无法穿过元件区A,不被黑色矩阵层遮住的区域即为透光区B。其中,黑色矩阵层可设置于薄膜晶体管基板1上或对向基板2上。当黑色矩阵层设置于薄膜晶体管基板1时,即可成为一BOA(BM on array)基板。The substrate 11 is a light-transmitting material. In practice, it can be, for example, glass, quartz or the like, plastic, rubber, glass fiber or other polymer materials, preferably a borate non-alkali glass substrate. In practice, the substrate 11 of the thin film transistor substrate 1 and the counter substrate 2 can be made of the same or different materials, for example, the substrate 11 is made of borate alkali-free glass substrate, while the counter substrate 2 is made of potassium glass substrate. In addition, the liquid crystal display panel P1 may further include a black matrix layer (not shown in the figure). In the direction perpendicular to the substrate 11, the black matrix layer can cover the element area A, so that the light cannot pass through the element area A and is not blocked by the black matrix. The area covered by the layer is the light-transmitting area B. Wherein, the black matrix layer can be disposed on the TFT substrate 1 or the opposite substrate 2 . When the black matrix layer is disposed on the TFT substrate 1, it can become a BOA (BM on array) substrate.
缓冲层12设置于基板11上,并位于元件区A。缓冲层12可包含一层或多层结构,其材质可分别包含氮化硅、氧化硅、氮氧化硅、碳化硅、氧化铝、或氧化铪。于此,缓冲层12的材料系以氧化硅为例。其中,若为多层结构时,不同层的缓冲层之材质可为相同或不相同。The buffer layer 12 is disposed on the substrate 11 and located in the device area A. The buffer layer 12 may include one or more layers, and its material may include silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or hafnium oxide. Herein, the material of the buffer layer 12 is silicon oxide as an example. Wherein, in the case of a multi-layer structure, the materials of the buffer layers of different layers may be the same or different.
薄膜晶体管T设置于缓冲层12上,并位于元件区A。薄膜晶体管T可为top gate(上栅极)型的薄膜晶体管T,或为bottom gate(下栅极)型的薄膜晶体管。在本实施例中,系以top gate的薄膜晶体管T为例。其中,薄膜晶体管T具有一栅极G、一通道层C、一源极S及一漏极D。栅极G与通道层C对应设置,并位于通道层C之上,而缓冲层12位于基板11与通道层C之间。另外,于其它的实施例中,若为bottom gate的薄膜晶体管(图未显示),则通道层系位于栅极之上。其中,栅极G之材质系为金属(例如为铝、铜、银、钼、或钛)或其合金所构成的单层或多层结构。部分用以传输驱动讯号之导线,可以使用与栅极G同层且同一制造工艺之结构,彼此电性相连,例如扫描线(scan line)。The thin film transistor T is disposed on the buffer layer 12 and located in the device area A. The thin film transistor T may be a top gate (upper gate) type thin film transistor T, or a bottom gate (lower gate) type thin film transistor. In this embodiment, the thin film transistor T of the top gate is taken as an example. Wherein, the thin film transistor T has a gate G, a channel layer C, a source S and a drain D. As shown in FIG. The gate G is arranged correspondingly to the channel layer C and located on the channel layer C, and the buffer layer 12 is located between the substrate 11 and the channel layer C. In addition, in other embodiments, if it is a thin film transistor with a bottom gate (not shown in the figure), the channel layer is located above the gate. Wherein, the material of the gate G is a single-layer or multi-layer structure composed of metal (for example, aluminum, copper, silver, molybdenum, or titanium) or an alloy thereof. Part of the wires used to transmit the driving signal can be electrically connected to each other by using the structure of the same layer and the same manufacturing process as the gate G, such as a scan line.
通道层C相对栅极G位置设置于缓冲层12上。在实施上,通道层C系为一半导体层(例如硅半导体、镓半导体、锗半导体或其组合,或其它),且其材料例如但不限于包含一氧化物半导体。前述之氧化物半导体包括氧化物,且氧化物包括铟、镓、锌及锡其中之一,例如为氧化铟镓锌(Indium Gallium Zinc Oxide,IGZO)。另外,源极S与漏极D分别设置于通道层C上,且源极S和漏极D分别与通道层C接触,于薄膜晶体管T之通道层C未导通时,两者系电性分离。其中,源极S与漏极D之材质可为金属(例如铝、铜、银、钼、或钛)或其合金所构成的单层或多层结构。此外,部分用以传输驱动讯号之导线,可以使用与源极S与漏极D同层且同一制造工艺之结构,例如数据线(data line)。The channel layer C is disposed on the buffer layer 12 relative to the position of the gate G. In practice, the channel layer C is a semiconductor layer (such as silicon semiconductor, gallium semiconductor, germanium semiconductor or a combination thereof, or others), and its material includes, but is not limited to, an oxide semiconductor. The aforementioned oxide semiconductor includes oxide, and the oxide includes one of indium, gallium, zinc and tin, such as Indium Gallium Zinc Oxide (IGZO). In addition, the source S and the drain D are respectively arranged on the channel layer C, and the source S and the drain D are respectively in contact with the channel layer C. When the channel layer C of the thin film transistor T is not conducted, the two are electrically connected. separate. Wherein, the material of the source S and the drain D can be a single-layer or multi-layer structure composed of metals (such as aluminum, copper, silver, molybdenum, or titanium) or their alloys. In addition, part of the wires used to transmit the driving signal can use the structure of the same layer and the same manufacturing process as the source S and the drain D, such as data lines.
第一绝缘层13设置于缓冲层12之上,并位于通道层C之上,且第一绝缘层13位于栅极G与通道层C之间。第一绝缘层13可为一层或多层结构,其材质可包含氮化硅、氧化硅、氮氧化硅、碳化硅、氧化铝、或氧化铪,或其组合,于此,并不加以限定。其中,栅极G设置于第一绝缘层13上,而第二绝缘层14完全覆盖栅极G。另外,第一绝缘层13系覆盖通道层C。The first insulating layer 13 is disposed on the buffer layer 12 and on the channel layer C, and the first insulating layer 13 is located between the gate G and the channel layer C. The first insulating layer 13 can be a one-layer or multi-layer structure, and its material can include silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, or hafnium oxide, or a combination thereof, which is not limited herein. . Wherein, the gate G is disposed on the first insulating layer 13 , and the second insulating layer 14 covers the gate G completely. In addition, the first insulating layer 13 covers the channel layer C. Referring to FIG.
第二绝缘层14设置于第一绝缘层13之上。其中,第二绝缘层14可为一层或多层的结构,且可为有机材质例如为有机硅氧化合物,或无机材质例如为氮化硅、氧化硅、氮氧化硅、碳化硅、氧化铝、氧化铪、或上述材质之多层结构,并不加以限定。于此,第二绝缘层14系完全覆盖栅极G及第一绝缘层13。The second insulating layer 14 is disposed on the first insulating layer 13 . Wherein, the second insulating layer 14 can be a one-layer or multi-layer structure, and can be an organic material such as an organic silicon oxide compound, or an inorganic material such as silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide , hafnium oxide, or a multilayer structure of the above materials are not limited. Here, the second insulating layer 14 completely covers the gate G and the first insulating layer 13 .
缓冲层12、第一绝缘层13及第二绝缘层14系由元件区A分别延伸至透光区B的边缘。本发明所指的「边缘」并不一定刚好是元件区A与透光区B之交接面,只要是邻近于元件区A与透光区B之交接面之区域者均可称为「边缘」。另外,由元件区A延伸至透光区B的边缘,系表示于制造工艺中,只让缓冲层12、第一绝缘层13及第二绝缘层14形成于元件区A内,而不形成于透光区B内。于实施上,可例如于基板11的透光区B上分别沉积缓冲层12、第一绝缘层13及第二绝缘层14后,再利用例如蚀刻制造工艺于预先定义的透光区域上将缓冲层12、第一绝缘层13及第二绝缘层14全部蚀刻掉,直到露出基板11为止,使缓冲层12、第一绝缘层13及第二绝缘层14只存在于元件区A内。The buffer layer 12 , the first insulating layer 13 and the second insulating layer 14 extend from the device area A to the edge of the light-transmitting area B respectively. The "edge" referred to in the present invention is not necessarily exactly the interface between the device area A and the light-transmitting area B, as long as it is adjacent to the interface between the element area A and the light-transmitting area B, it can be called "edge". . In addition, the edge extending from the element region A to the light-transmitting region B means that in the manufacturing process, only the buffer layer 12, the first insulating layer 13 and the second insulating layer 14 are formed in the element region A, and not formed in the In the light-transmitting area B. In practice, for example, the buffer layer 12, the first insulating layer 13 and the second insulating layer 14 can be respectively deposited on the light-transmitting region B of the substrate 11, and then the buffer layer 12, the first insulating layer 13, and the second insulating layer 14 can be deposited on the predefined light-transmitting region using, for example, an etching manufacturing process. The layer 12, the first insulating layer 13 and the second insulating layer 14 are all etched away until the substrate 11 is exposed, so that the buffer layer 12, the first insulating layer 13 and the second insulating layer 14 only exist in the element region A.
平坦化层15设置于基板11之上,并位于元件区A及透光区B。于此,由于缓冲层12、第一绝缘层13及第二绝缘层14只由元件区A分别延伸至透光区B的边缘,因此,如图1所示,于元件区A及透光区B上形成平坦化层15时,可使平坦化层15直接填入透光区B内被蚀刻处,使平坦化层15可直接接触基板11。另外,于元件区A中,平坦化层15系覆盖第一绝缘层13、第二绝缘层14、薄膜晶体管T及缓冲层12,以达到平坦化的作用。平坦化层15的材质可例如包含有机或无机绝缘材料,并例如为聚萘二甲酸乙二醇酯(polyethylene naphthalate,PEN)、压克力(poly-methylmethacrylate,PMMA)、或聚酰亚胺(polyimide,PI),或其它,于此,并不加以限定。The planarization layer 15 is disposed on the substrate 11 and located in the device area A and the light-transmitting area B. Here, since the buffer layer 12, the first insulating layer 13 and the second insulating layer 14 only respectively extend from the element region A to the edge of the light-transmitting region B, as shown in FIG. When the planarization layer 15 is formed on B, the planarization layer 15 can be directly filled into the etched part in the light-transmitting region B, so that the planarization layer 15 can directly contact the substrate 11 . In addition, in the device region A, the planarization layer 15 covers the first insulating layer 13 , the second insulating layer 14 , the thin film transistor T and the buffer layer 12 to achieve planarization. The material of the planarization layer 15 may include organic or inorganic insulating materials, such as polyethylene naphthalate (polyethylene naphthalate, PEN), acrylic (poly-methylmethacrylate, PMMA), or polyimide ( polyimide, PI), or others, are not limited here.
此外,薄膜晶体管基板1更包括一共同电极层17、一钝化层18及一像素电极层19,共同电极层17设置于平坦化层15上,钝化层18设置于共同电极层17上,并覆盖部分共同电极层17。像素电极层19设置于钝化层18上,并覆盖部分钝化层18。于此,共同电极层17、钝化层18及像素电极层19系依序形成于平坦化层15之上,并位于元件区A及透光区B。另外,像素电极19层系透过一通孔O与漏极D电性连接。其中,共同电极层17或像素电极层19的材质可例如为铟锡氧化物(ITO)、铟锌氧化物(IZO)、铝锌氧化物(AZO)、镉锡氧化物(CTO)、氧化锡(SnO2)、或氧化锌(ZnO)等透明导电材料,于此并不限定。另外,钝化层18的材料可为无机材质,例如可为氮化硅、氧化硅、氮氧化硅、碳化硅、氧化铝、氧化铪、或上述材质之多层结构。In addition, the TFT substrate 1 further includes a common electrode layer 17, a passivation layer 18 and a pixel electrode layer 19, the common electrode layer 17 is disposed on the planarization layer 15, the passivation layer 18 is disposed on the common electrode layer 17, And cover part of the common electrode layer 17 . The pixel electrode layer 19 is disposed on the passivation layer 18 and covers part of the passivation layer 18 . Here, the common electrode layer 17 , the passivation layer 18 and the pixel electrode layer 19 are sequentially formed on the planarization layer 15 , and are located in the device region A and the light-transmitting region B. In addition, the pixel electrode 19 is electrically connected to the drain D through a through hole O. Wherein, the material of the common electrode layer 17 or the pixel electrode layer 19 can be, for example, indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), cadmium tin oxide (CTO), tin oxide (SnO2), or zinc oxide (ZnO) and other transparent conductive materials are not limited here. In addition, the material of the passivation layer 18 can be an inorganic material, such as silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, aluminum oxide, hafnium oxide, or a multilayer structure of the above materials.
承上,由于薄膜晶体管基板1中,缓冲层12、第一绝缘层13及第二绝缘层14分别由元件区A延伸至透光区B的边缘。藉此,使得透光区B内具有较少的薄膜层,故背光源所提供的光线通过薄膜晶体管基板1之透光区B时,光线被吸收或反射的比率较少,因此,可使液晶显示面板P1具有较高的穿透率。于本实施例之液晶显示面板P1的穿透率实验中,与现有的液晶显示面板的透光区具有缓冲层及复数绝缘层的结构相较,液晶显示面板P1的穿透率可提高约10%。As mentioned above, in the thin film transistor substrate 1 , the buffer layer 12 , the first insulating layer 13 and the second insulating layer 14 respectively extend from the device area A to the edge of the light-transmitting area B. Thereby, there are fewer thin film layers in the light-transmitting region B, so when the light provided by the backlight passes through the light-transmitting region B of the thin-film transistor substrate 1, the rate of light being absorbed or reflected is less, therefore, the liquid crystal can be made The display panel P1 has a relatively high transmittance. In the transmittance experiment of the liquid crystal display panel P1 in this embodiment, compared with the structure of the existing liquid crystal display panel with a buffer layer and multiple insulating layers in the light-transmitting region, the transmittance of the liquid crystal display panel P1 can be increased by about 10%.
另请参照图2所示,为本发明较佳实施例另一实施态样的液晶显示面板P2的示意图。Please also refer to FIG. 2 , which is a schematic diagram of a liquid crystal display panel P2 according to another embodiment of the preferred embodiment of the present invention.
与图1之液晶显示面板P1主要的不同在于,液晶显示面板P2之薄膜晶体管基板1a更可具有一保护层16,保护层16设置于透光区B内,并位于基板11与平坦化层15之间,其中,保护层16与第一绝缘层13、第二绝缘层14、缓冲层12及基板11直接接触。换言之,本实施例之缓冲层12、第一绝缘层13及第二绝缘层14一样分别由元件区A延伸至透光区B的边缘,但透光区B之平坦化层15并不填入被蚀刻的区域而接触基板11,而是藉由保护层16填入透光区B中没有缓冲层12、第一绝缘层13及第二绝缘层14的区域,再形成平坦化层15,使保护层16位于基板11与平坦化层15之间,避免形成平坦化层15的制造工艺中,元件区A与透光区B的交接处不够平整而影响后续的制造工艺。其中,保护层16可为一光吸收率较低的材料,并可为一介电材料,其材质例如但不限于为二氧化硅。于本实施态样之液晶显示面板P2的穿透率实验中,与现有的液晶显示面板的透光区具有缓冲层及复数绝缘层的结构相较,液晶显示面板P2的穿透率可提高约6%左右。The main difference from the liquid crystal display panel P1 in FIG. 1 is that the thin film transistor substrate 1a of the liquid crystal display panel P2 can further have a protective layer 16, and the protective layer 16 is arranged in the light-transmitting region B, and is located between the substrate 11 and the planarization layer 15. Among them, the protective layer 16 is in direct contact with the first insulating layer 13 , the second insulating layer 14 , the buffer layer 12 and the substrate 11 . In other words, the buffer layer 12, the first insulating layer 13 and the second insulating layer 14 of this embodiment also extend from the device region A to the edge of the light-transmitting region B, but the planarization layer 15 of the light-transmitting region B is not filled The etched area is in contact with the substrate 11, but the area without the buffer layer 12, the first insulating layer 13, and the second insulating layer 14 in the light-transmitting area B is filled with the protective layer 16, and then the planarization layer 15 is formed, so that The protective layer 16 is located between the substrate 11 and the planarization layer 15 , so as to prevent the junction of the device region A and the light-transmitting region B from being flat enough to affect the subsequent manufacturing process during the manufacturing process of forming the planarization layer 15 . Wherein, the protective layer 16 can be a material with a low light absorption rate, and can be a dielectric material, such as but not limited to silicon dioxide. In the transmittance experiment of the liquid crystal display panel P2 of this embodiment, compared with the structure of the existing liquid crystal display panel with a buffer layer and multiple insulating layers in the light-transmitting region, the transmittance of the liquid crystal display panel P2 can be improved About 6%.
接着,请参照图3所示,其为本发明较佳实施例之一种液晶显示装置4的示意图。Next, please refer to FIG. 3 , which is a schematic diagram of a liquid crystal display device 4 according to a preferred embodiment of the present invention.
液晶显示装置4包括一液晶显示面板P1以及一背光模块5。背光模块5设置于液晶显示面板P1之薄膜晶体管基板1相对于对向基板2之另一侧,并发出光线,使光线自薄膜晶体管基板1通过液晶层3,再由对向基板2射出。对本领域的技术人员,背光模块5系为一现有技艺,于此不再赘述。此外,也可将液晶显示面板P1更换成上述之液晶显示面板P2,以成为另一实施例之液晶显示装置。其中,液晶显示面板P1及液晶显示面板P2已于上述中详述,于此不再赘述。The liquid crystal display device 4 includes a liquid crystal display panel P1 and a backlight module 5 . The backlight module 5 is disposed on the other side of the TFT substrate 1 of the liquid crystal display panel P1 relative to the opposite substrate 2 , and emits light, so that the light passes from the TFT substrate 1 through the liquid crystal layer 3 and then exits the opposite substrate 2 . For those skilled in the art, the backlight module 5 is a prior art and will not be repeated here. In addition, the liquid crystal display panel P1 can also be replaced with the above-mentioned liquid crystal display panel P2 to form a liquid crystal display device in another embodiment. Wherein, the liquid crystal display panel P1 and the liquid crystal display panel P2 have been described in detail above, and will not be repeated here.
综上所述,因依据本发明之一种液晶显示装置中,薄膜晶体管基板之第一绝缘层及第二绝缘层系分别由元件区延伸至透光区的边缘,换言之,透光区内并未设置第一绝缘层及第二绝缘层。藉此,与现有技术相较,薄膜晶体管基板之透光区内因具有较少的薄膜层,故当背光源所提供的光线通过薄膜晶体管基板之透光区时,光线被吸收或反射的比率较少,因此,可使液晶显示装置具有较高的穿透率。In summary, in a liquid crystal display device according to the present invention, the first insulating layer and the second insulating layer of the thin film transistor substrate respectively extend from the element area to the edge of the light-transmitting area. The first insulating layer and the second insulating layer are not provided. In this way, compared with the prior art, there are fewer thin film layers in the light-transmitting area of the thin-film transistor substrate, so when the light provided by the backlight passes through the light-transmitting area of the thin-film transistor substrate, the ratio of light absorbed or reflected Therefore, the liquid crystal display device can have a higher transmittance.
以上所述仅为举例性,而非为限制性者。任何未脱离本发明之精神与范畴,而对其进行之等效修改或变更,均应包含于本发明权利要求范围中。The above descriptions are illustrative only, not restrictive. Any equivalent modification or change made without departing from the spirit and scope of the present invention shall be included in the scope of the claims of the present invention.
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