CN103973152B - A kind of pulse width modulation control method and device - Google Patents

Abstract

The invention discloses a pulse width modulation control method, which includes: acquiring the pulse width of a three-phase switch tube in a switching period; acquiring the first action time of a straight-through state ST in the switching period; according to the pulse width and the first An action time, obtaining the second action time of the non-through zero state in the switching period; synthesizing a three-phase pulse width modulation according to the switching period, the pulse width, the first action time and the second action time signal, wherein the through state ST and the non-through zero state are respectively located at the peak and valley positions of the carrier. Correspondingly, the invention also discloses a PWM control device. By adopting the invention, the peak voltage on the direct current bus can be directly measured, and then the bus voltage can be directly controlled.

Description

A pulse width modulation control method and device

technical field

The invention relates to the field of control technology, in particular to a pulse width modulation control method and device.

Background technique

Inverter (Inverter) is a device or device that converts DC power (battery, storage battery) into AC power (generally 220V, 50Hz sine wave), including voltage source inverters, current source inverters and Z sources. Inverter (Z-source inverter, referred to as ZSI). Usually, the control method of the inverter adopts the pulse width modulation (Pulse Width Modulation, PWM) control method. In the traditional PWM control method, the state of the switch tube includes 8 non-through states, of which 6 effective states V1 (001 ), V2(010), V3(011), V4(100), V5(101), V6(110) and 2 zero states V0(000), V7(111), 1 means on, 0 means off . In the voltage source inverter and the current source inverter, the state of the three switching tubes of the lower bridge arm is opposite to that of the three switching tubes of the upper bridge arm, and one switching cycle consists of two valid states and two zero states Synthesis; in the Z-source inverter, a switching cycle includes not only 2 valid states and 2 zero states, but also a special through state ST, that is, the upper and lower switching tubes of the same bridge arm are turned on at the same time.

As shown in Figure 1, Figure 1 is a circuit schematic diagram of a Z-source inverter provided in the prior art. In Figure 1, the inductor L1, inductor L2, capacitor C1, and capacitor C2 form a Z-source network, and the switch T1 ~ switching tube T6 form an inverter bridge, wherein T1, T3, T5 are called upper bridge arms, and T2, T4, T6 are called lower bridge arms. When the working state of the Z source inverter is the straight-through state ST, the diode D is cut off, and the DC bus is short-circuited due to the direct connection of the upper and lower switching tubes, and the DC bus voltage V _PN = 0 at this time; when the working state of the Z source inverter In the non-through state, the diode D conducts, and at this time the DC bus voltage V _PN =V _DC (V _DC is called the bus voltage peak value), and the AC output is obtained after being inverted by the inverter bridge. However, in the existing pulse width modulation control method of the Z-source inverter, the through state ST is inserted between the zero vectors V0 (000) and V7 (111) at the peak B and valley A of the carrier wave respectively, as shown in Figure 2 As shown, FIG. 2 is a schematic diagram of a state vector provided in the prior art, and the state change in a switching cycle in the figure is (assuming that the effective states of the switching tubes in the upper bridge arm are 100 and 110 in a certain switching cycle) : Straight-through state ST->zero state 000->valid state 100->valid state 110->zero state 111->straight-through state ST->zero state 111->valid state 110->valid state 100->zero state 000- > Thru state ST. It can be seen that in one switching cycle, the through state ST occurs twice, and the DC bus voltage V _PN has a pulsating waveform, and the carrier frequency in the PWM control method is very high, so it is difficult to sample the DC bus voltage V _PN . In the prior art, the capacitor voltage closed-loop control method is generally used to obtain the DC bus voltage, that is, the voltage V _C on the control capacitor C1 or C2 is kept constant, so as to obtain the peak value of the bus voltage V _DC =V _in /(1-2d ₀ ), where , d ₀ is the direct duty cycle. However, this method has the following disadvantages: the relationship between the capacitor voltage V _C and the bus voltage peak value V _DC is not linear. Although the capacitor voltage V _C can be controlled to remain constant, V _DC will change with the direct duty cycle, and the bus voltage peak value V _DC is easy to fluctuate or deviate from the expected value, and the switch tube may be damaged when the bus voltage peak value V _DC is too high.

Contents of the invention

Embodiments of the present invention provide a pulse width modulation control method and device, which can directly measure the peak voltage on a DC bus, thereby directly controlling the bus voltage.

An embodiment of the present invention provides a pulse width modulation control method, including:

Obtain the pulse widths of the three-phase switching tubes in the switching period T _s , expressed as T _as , T _bs , T _cs respectively;

Acquiring the first action time T _sh of the through state ST in the switching period;

According to the pulse width and the first action time, obtain the second action time T ₀ of the non-through zero state in the switching cycle;

A three-phase pulse width modulation signal is synthesized according to the switching period, the pulse width, the first action time and the second action time, wherein the straight-through state ST and the non-through-zero state are respectively located at the carrier Peak and valley positions, the pulse widths of the three-phase pulse width modulation signals are represented as T _ga , T _gb , and T _gc , respectively;

Taking the first sector as an example, the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ ( 111), correspondingly, the control method of each other sector is the same.

Wherein, according to the pulse width and the first action time, obtaining the second action time T ₀ of the non-through zero state in the switching cycle includes:

Comparing the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes to obtain the maximum value T _max , the minimum value T _min and the middle value T _mid , that is, T _min ≤ T _mid ≤ T _max ;

Determine the offset T _f according to the first action time T _sh and the minimum value T _min , T _f =T _sh -T _min ;

According to the switching period T _s , the maximum value T _max and the offset T _f , the second action time T ₀ is calculated as: T ₀ =T _s −(T _max +T _f ).

Wherein, the synthesizing a three-phase pulse width modulation signal according to the switching period, the pulse width, the first action time and the second action time includes:

Comparing the magnitude of the second action time T ₀ with zero;

If T ₀ ≥ 0, synthesize a three-phase pulse width modulation signal according to the offset T _f and the pulse widths T _as , T _bs , and T _cs of the three-phase switching transistors, wherein the three-phase pulse width modulation signal The pulse widths T _ga , T _gb , and T _gc are:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

If T ₀ <0, a three-phase pulse width modulation signal is synthesized according to the switching period T _s , the first action time T _sh and the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes, wherein the The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\end{array}\right.$

Wherein, said acquisition of the pulse width of the three-phase switching tube in the switching cycle T _s includes:

According to the voltages V _a , V _b , V _c of the three-phase voltages of A, B, and C, the expected voltage V _DC on the DC bus and the switching period T _s , the pulse widths T _as , T _bs , and _Tcs are:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\end{array}\right.$

Among them, also include:

The DC bus voltage is sampled during the action time of the non-through zero state to obtain the DC bus peak voltage.

Correspondingly, the present invention also provides a pulse width modulation control device, including:

The first acquisition module is used to acquire the pulse widths of the three-phase switching tubes in the switching period T _s , represented as T _as , T _bs , and T _cs respectively;

The second obtaining module is used to obtain the first action time T _sh of the through state ST in the switching period;

The third acquisition module is used to acquire the second action time T ₀ of the non-through zero state in the switching cycle according to the pulse width and the first action time;

A synthesizing module, configured to synthesize a three-phase pulse width modulation signal according to the switching period, the pulse width, the first action time and the second action time, wherein the straight-through state ST and the non-through zero The states are respectively located at the peak and valley positions of the carrier wave, and the pulse widths of the three-phase pulse width modulation signals are represented as T _ga , T _gb , and T _gc ;

Taking the first sector as an example, the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ ( 111), correspondingly, the control method of each other sector is the same.

Wherein, the third acquisition module of the root includes:

The comparison unit is used to compare the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes to obtain the maximum value T _max , the minimum value T _min and the middle value T _mid , that is, T _min ≤ T _mid ≤ T _max ;

A selection unit, configured to determine an offset T _f according to the first action time T _sh and the minimum value T _min , T _f =T _sh -T _min ;

A calculation unit, configured to calculate the second action time T ₀ according to the switching period T _s , the maximum value T _max and the offset T _f : T ₀ =T _s -(T _max +T _f ).

Wherein, the synthesis module includes:

a judging unit, configured to compare the second action time _T0 with zero;

The first synthesizing unit is configured to synthesize a three-phase pulse width modulation signal according to the offset T _f and the pulse widths T _as , T _bs , and T _cs of the three-phase switching transistors if T ₀ ≥ 0, wherein the The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signals are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

The second synthesis unit is used to synthesize the three-phase pulse width according to the switching period T _s , the first action time T _sh and the pulse widths T _as , T _bs , and T _cs of the three-phase switching tube if T ₀ <0 modulation signal, wherein the pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\end{array}\right.$

Wherein, the first obtaining module is used to obtain the three-phase switch voltage V _a , V _b , V _c of the three-phase voltage A, B, C, the expected voltage V _DC on the DC bus, and the switching period T _s . The pulse widths T _as , T _bs , and T _cs of the tube are:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\end{array}\right.$

Among them, also include:

The sampling module is configured to sample the DC bus voltage during the action time of the non-through zero state to obtain the DC bus peak voltage.

Implementing the embodiment of the present invention, by removing one of the non-straight-through zero states, the entire straight-through state ST is inserted into the action position of the non-straight-through zero state, and at the same time, the action time of the non-straight-through zero state is loaded to the action of another non-straight-through zero state In terms of time, the through state ST only appears once in a switching cycle, and there is only one non-through zero state. One of the non-through zero state and the through state ST is located at the peak, and the other is located at the valley, so that the DC bus voltage can be sampled conveniently during the action time of the through state ST, and the peak voltage on the DC bus in the Z source inverter can be directly measured, and then The bus voltage can be directly controlled.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work.

Fig. 1 is the circuit schematic diagram of a kind of Z source inverter provided in the prior art;

Fig. 2 is a schematic diagram of a state vector provided in the prior art;

Fig. 3 is a schematic flowchart of a pulse width modulation control method provided by an embodiment of the present invention;

Fig. 4 is a schematic diagram of a state vector provided by an embodiment of the present invention;

Fig. 5 is a schematic structural diagram of a pulse width modulation control device according to an embodiment of the present invention;

Fig. 6 is a schematic structural diagram of a third acquisition module in Fig. 5;

FIG. 7 is a schematic structural diagram of a synthesis module in FIG. 5 .

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

The present invention provides a pulse width modulation control method and device, inserting the through state ST and the non-through zero state respectively into the peak and valley positions of the carrier wave, so that the DC bus voltage can be sampled during the action time of the non-through zero state, The peak voltage of the DC bus can be directly measured, so that the voltage control of the bus voltage can be directly performed. Each of them will be described in detail below.

Referring to FIG. 3 , FIG. 3 is a schematic flowchart of a pulse width modulation control method provided by an embodiment of the present invention. In the embodiment of the present invention, the control method includes the following steps.

S101: Obtain the pulse widths of the three-phase switching transistors within the switching period T _s , which are denoted as T _as , T _bs , and T _cs respectively.

_Specifically , _{the pulse widths T as} , T _bs and T _cs are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\end{array}\right.$

Wherein, the expected voltage V _DC on the DC bus is the expected peak voltage of the DC bus.

S102: Obtain the first action time T _sh of the through state ST in the switching cycle.

When the inverter bridge is in the straight-through state ST, the switches in the upper and lower bridge arms of the inverter bridge are turned on at the same time, which is equivalent to a short circuit of the DC bus. At this time, the input power charges the capacitor of the Z source network, and the voltage at the AC output terminal is 0. . During the through state ST, the capacitive energy storage of the Z source network increases the voltage peak value of the DC bus in the non-through state. Specifically, the first action time T _sh of the through state ST can be set according to actual needs, and the embodiment of the present invention does not limit the value of the first action time T _sh .

S103: According to the pulse width and the first action time, obtain a second action time T ₀ of the non-through zero state in the switching period.

The non-straight-through states of the Z-source inverter include 6 valid states V1 (001), V2 (010), V3 (011), V4 (100), V5 (101), V6 (110) and 2 zero states V ₀ (000), V ₇ (111), in the traditional PWM control method, a switching cycle includes 2 active states, 2 non-straight-through zero states and a straight-through state ST. Among them, the non-straight-through zero state is inserted into the peak and valley of the carrier wave respectively, and the straight-through state ST is inserted into the non-straight-through zero state at the peak and valley positions respectively (as shown in Figure 2). In Figure 2, the effective state is V4 ( 100) and V6 (110), the state change of the three-phase switching tube in one switching cycle is: straight-through state ST->zero state 000->valid state 100->valid state 110->zero state 111->through-state ST -> Zero state 111 -> Valid state 110 -> Valid state 100 -> Zero state 000 -> Straight through state ST. It can be seen that in one switching cycle, the through state ST occurs twice, and because the carrier frequency is very high, it is difficult to directly sample the DC bus voltage.

In the PWM control method of the embodiment of the present invention, one of the non-straight-through zero states is removed, and the entire straight-through state ST is inserted into the active position of the non-straight-through zero state. The action time of the zero state. For example: after the situation in Fig. 2 adopts the method of the present invention, the switching state of the three-phase switching tube in the switching cycle changes to: zero state 000->effective state 100->effective state 110->straight-through state ST->effective state 110- >Valid state 100->Zero state 000 (as shown in FIG. 4 , which is a schematic diagram of a state vector provided by an embodiment of the present invention). It can be seen that the through state ST only appears at the trough position of the carrier, and the non-through zero state only appears at the peak position of the carrier. Similarly, the through state ST may be located at a peak position, and the non-through zero state may be located at a valley position, which is not limited in the present invention. In a word, in the PWM control method provided by the present invention, the through state ST only appears once in one switching cycle, and there is only one non-through zero state at the peak B or valley A position of the carrier, and there is only one non-through zero state at the valley A or peak B of the carrier position, the non-straight-through zero state and the straight-through state ST occupy the peak and valley positions of the carrier wave respectively, that is, one is located at the peak and the other is located at the valley.

Specifically, the method of obtaining the action time of the non-through zero state is as follows: ①Comparing the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes within the switching period T _s to obtain the maximum value T _max and the minimum value T _min and the intermediate value T _mid satisfy T _min ≤ T _mid ≤ T _max , for example: in the first sector, T _min =T _cs , T _mid =T _bs , and T _max =T _as . ② Determine the offset T _f according to the first action time T _sh and the minimum value T _min , T _f =T _sh -T _min . ③ According to the switching period T _s , the maximum value T _max and the offset T _f , the second action time T ₀ is calculated as: T ₀ =T _s -(T _max +T _f ). Therefore, the second action time T ₀ of the non-through zero state in the switching period T _s can finally be calculated as: T ₀ =T _s -T _max -T _sh +T _min .

S104: Synthesize a three-phase pulse width modulation signal according to the switching period, the pulse width, the first action time, and the second action time, wherein the through state ST and the non-through zero state are located at The peak and trough positions of the carrier wave.

Adding the same offset T _f to the pulse width of the three-phase switching tube will not change the action time of the active state, therefore, it will not affect the AC output. For the convenience of description, the embodiment of the present invention takes the first sector as an example, that is, the effective state is V ₄ (100), V ₆ (110), and before the offset T _f is added, the effective state V ₄ (100) The action time T ₁ ' is: T ₁ '=T _max -T _mid , and the action time T ₂ ' of the active state V ₆ (110) is: T ₂ '=T _mid -T _min . The action time T ₁ of the effective state V ₄ (100) after adding the offset T _f is: T ₁ =(T _max +T _f )-(T _mid +T _f )=T _max -T _mid , the effective state V ₆ The action time T ₂ of (110) is: T ₂ =(T _mid +T _f )-(T _min +T _f )=T _mid -T _min . It can be seen that the action time of the effective state V ₄ (100) and the effective state V ₆ (110) remains unchanged after adding the offset T _f .

Therefore, after adding the same offset T _f to the pulse width of the three-phase switching tube, the pulse widths T _ga , T _gb , and T _gc of the three-phase PWM signal are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

Wherein, different offsets T _f correspond to different PWM control methods, therefore, the value of the offset T _f is very important. Among the existing regular sampling methods, there are In the existing space vector fast algorithm,

In the embodiment of the present invention, the offset T _f is determined according to the first action time T _sh and the minimum value T _min , and the offset T _f = T _sh - T _min is selected. Selecting this value can ensure non- The through-zero state and the through-state ST are respectively located at the peak B and valley point A of the carrier, that is, the non-through-zero state and the through-state ST are separated by the active state, and the through-state ST only appears once in one switching cycle, and one switching cycle There is also only one non-straight-through zero state in , that is, one of V0 (000) and V7 (111). Further, a three-phase pulse width modulation signal can be synthesized according to the switching period T _s , the pulse widths T _ga , T _gb , T _gc , the first action time T _sh and the second action time T ₀ , wherein the through state ST and the non-through zero state are respectively located at the peak and valley positions of the carrier wave, as shown in FIG. 4 .

Comparing the second action time T ₀ of the non-straight-through zero state with the size of zero, if T ₀ ≥ 0, then according to the offset T _f and the pulse width T _as , T _bs , T _cs of the three-phase switch tube The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal obtained are:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

which is

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.$

Correspondingly, if T ₀ <0, it means that it is not enough to replace all the zero state time by the through state, then according to the principle of overmodulation according to the switching period T _s , the first action time T _sh and the pulse of the three-phase switching tube The widths T _as , T _bs , and T _cs synthesize three-phase pulse width modulation signals, and the pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signals are obtained as follows:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\end{array}\right.$

Taking the first sector as an example, the sequence of switching state changes in the switching period Ts can be obtained as follows: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ (111), correspondingly, the control method of each other sector is the same.

As a possible implementation, the method also includes:

S105: Sampling the DC bus voltage at the action moment of the non-through zero state to obtain the DC bus peak voltage.

Since the through state ST and the non-through zero state are respectively located at the peak and valley positions of the carrier, that is, the through state ST and the non-through zero state are separated by an effective state, and the through state only appears once in a switching cycle, see Figure 4 , FIG. 4 is a schematic diagram of a state vector provided by an embodiment of the present invention. It can be seen from the figure that the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100 ), V ₀ (000). Since the through-duty cycle in practical applications is limited (generally less than 30%, that is, the action time of the through-state ST is relatively short), therefore, the through-state ST only concentrates on one of the peak B or valley A of the carrier, assuming that in In the valley A of the carrier wave, the through state ST is concentrated in a position less than 30% centered on the valley A. The other 70% of the positions correspond to the non-through state, so there is enough time to sample and obtain the peak voltage of the bus. Preferably, a digital signal processor (DSP, Digital Signal Processor) can conveniently set an interrupt at the peak B or valley A of the triangular wave, so that when sampling the DC bus at this point, the peak voltage of the bus can be directly obtained.

Implementing the embodiment of the present invention, by removing one of the non-straight-through zero states, the entire straight-through state ST is inserted into the action position of the non-straight-through zero state, and at the same time, the action time of the non-straight-through zero state is loaded to the action of another non-straight-through zero state In terms of time, the through state ST only appears once in a switching cycle, and there is only one non-through zero state. One of the non-through zero state and the through state ST is located at the peak, and the other is located at the valley, so that the DC bus voltage can be sampled conveniently during the action time of the through state ST, and the peak voltage on the DC bus in the Z source inverter can be directly measured, and then The bus voltage can be directly controlled.

Referring to FIG. 5 , it is a schematic structural diagram of a pulse width modulation control device according to an embodiment of the present invention. In this embodiment of the present invention, the PWM control device includes: a first acquisition module 10 , a second acquisition module 20 , and a third acquisition module 30 and synthesis module 40.

The first acquiring module 10 is used to acquire the pulse widths of the three-phase switching transistors in the switching period T _s , denoted as T _as , T _bs , and T _cs respectively.

_Specifically , _{the pulse widths T as} , T _bs and T _cs are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; C</span>}}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\end{array}\right.$

Wherein, the expected voltage V _DC on the DC bus is the expected peak voltage of the DC bus.

The second acquiring module is configured to acquire the first action time T _sh of the through state ST in the switching period.

When the inverter bridge is in the straight-through state ST, the switches in the upper and lower bridge arms of the inverter bridge are turned on at the same time, which is equivalent to a short circuit of the DC bus. At this time, the input power charges the capacitor of the Z source network, and the voltage at the AC output terminal is 0. . During the through state ST, the capacitive energy storage of the Z source network increases the voltage peak value of the DC bus in the non-through state. Specifically, the first action time T _sh of the through state ST can be set according to actual needs, and the embodiment of the present invention does not limit the value of the first action time T _sh .

The third acquisition module 30 is configured to acquire a second action time T ₀ of the non-through zero state in the switching cycle according to the pulse width and the first action time.

The non-straight-through states of the Z-source inverter include 6 valid states V1 (001), V2 (010), V3 (011), V4 (100), V5 (101), V6 (110) and 2 zero states V ₀ (000), V ₇ (111), in the traditional PWM control method, a switching cycle includes 2 active states, 2 non-straight-through zero states and a straight-through state ST. Among them, the non-straight-through zero state is inserted into the peak and valley of the carrier wave respectively, and the straight-through state ST is inserted into the non-straight-through zero state at the peak and valley positions respectively (as shown in Figure 2). In Figure 2, the effective state is V4 ( 100) and V6 (110), the state change of the three-phase switching tube in one switching cycle is: straight-through state ST->zero state 000->valid state 100->valid state 110->zero state 111->through-state ST -> Zero state 111 -> Valid state 110 -> Valid state 100 -> Zero state 000 -> Straight through state ST. It can be seen that in one switching cycle, the through state ST occurs twice, and because the carrier frequency is very high, it is difficult to directly sample the DC bus voltage.

In the PWM control method of the embodiment of the present invention, one of the non-straight-through zero states is removed, and the entire straight-through state ST is inserted into the active position of the non-straight-through zero state. The action time of the zero state. For example: after the situation in Fig. 2 adopts the method of the present invention, the switching state of the three-phase switching tube in the switching cycle changes to: zero state 000->effective state 100->effective state 110->straight-through state ST->effective state 110- >Valid state 100->Zero state 000 (as shown in FIG. 4 , which is a schematic diagram of a state vector provided by an embodiment of the present invention). It can be seen that the through state ST only appears at the trough position of the carrier, and the non-through zero state only appears at the peak position of the carrier. Similarly, the through state ST may be located at a peak position, and the non-through zero state may be located at a valley position, which is not limited in the present invention. In a word, in the PWM control method provided by the present invention, the through state ST only appears once in one switching cycle, and there is only one non-through zero state at the peak B or valley A position of the carrier, and there is only one non-through zero state at the valley A or peak B of the carrier position, the non-straight-through zero state and the straight-through state ST occupy the peak and valley positions of the carrier wave respectively, that is, one is located at the peak and the other is located at the valley.

Preferably, the third acquisition module 30 further includes: a comparison unit 301 , a selection unit 302 and a calculation module 303 , as shown in FIG. 6 , which is a schematic structural diagram of a third acquisition module in FIG. 5 . The comparison unit 301 is used to compare the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes to obtain the maximum value T _max , the minimum value T _min and the middle value T _mid , that is, T _min ≤ T _mid ≤ T _max . For example: in the first sector, there are T _min =T _cs , T _mid =T _bs , T _max =T _as . The selection unit 302 is configured to determine an offset T _f according to the first action time T _sh and the minimum value T _min , where T _f =T _sh −T _min . Calculation module 303, configured to calculate the second action time T ₀ according to the switching period T _s , the maximum value T _max and the offset T _f as: T ₀ =T _s -(T _max + T _f ). Therefore, the second action time T ₀ of the non-through zero state in the switching period T _s can finally be calculated as: T ₀ =T _s -T _max -T _sh +T _min .

Synthesis module 40, configured to synthesize a three-phase pulse width modulation signal according to the switching period, the pulse width, the first action time and the second action time, wherein the straight-through state ST and the non-through The zero states are located at the peak and trough positions of the carrier wave, respectively.

Adding the same offset T _f to the pulse width of the three-phase switching tube will not change the action time of the active state, therefore, it will not affect the AC output. For the convenience of description, the embodiment of the present invention takes the first sector as an example, that is, the effective state is V ₄ (100), V ₆ (110), and before the offset T _f is added, the effective state V ₄ (100) The action time T ₁ ' is: T ₁ '=T _max -T _mid , and the action time T ₂ ' of the active state V ₆ (110) is: T ₂ '=T _mid -T _min . The action time T ₁ of the effective state V ₄ (100) after adding the offset T _f is: T ₁ =(T _max +T _f )-(T _mid +T _f )=T _max -T _mid , the effective state V ₆ The action time T ₂ of (110) is: T ₂ =(T _mid +T _f )-(T _min +T _f )=T _mid -T _min . It can be seen that the action time of the effective state V ₄ (100) and the effective state V ₆ (110) remains unchanged after adding the offset T _f .

Therefore, after adding the same offset T _f to the pulse width of the three-phase switching tube, the pulse widths T _ga , T _gb , and T _gc of the three-phase PWM signal are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

Wherein, different offsets T _f correspond to different PWM control methods, therefore, the value of the offset T _f is very important. Among the existing regular sampling methods, there are In the existing space vector fast algorithm,

In the embodiment of the present invention, the offset T _f is determined according to the first action time T _sh and the minimum value T _min , and the offset T _f = T _sh - T _min is selected. Selecting this value can ensure non- The through-zero state and the through-state ST are respectively located at the peak B and valley point A of the carrier, that is, the non-through-zero state and the through-state ST are separated by the active state, and the through-state ST only appears once in one switching cycle, and one switching cycle There is also only one non-straight-through zero state in , that is, one of V0 (000) and V7 (111). Further, a three-phase pulse width modulation signal can be synthesized according to the switching period T _s , the pulse widths T _ga , T _gb , T _gc , the first action time T _sh and the second action time T ₀ , wherein the through state ST and the non-through zero state are respectively located at the peak and valley positions of the carrier wave, as shown in FIG. 4 .

As a possible implementation manner, the synthesis module 40 further includes: a judging unit 401 , a first synthesis unit 402 and a second synthesis unit 402 , see FIG. 7 , which is a schematic structural diagram of a synthesis module in FIG. 5 . Wherein, the judging unit 401 is configured to compare the second action time T ₀ with zero. The first synthesis unit 402 is configured to synthesize a three-phase pulse width modulation signal according to the offset T _f and the pulse widths T _as , T _bs , and T _cs of the three-phase switching transistors if T ₀ ≥ 0, wherein, The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}\end{array}\right.$

which is

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; no</span>}}\end{array}\right.$

The second synthesizing unit 402 is used for if T ₀ <0, indicating that it is not enough to replace all the zero state time by the through state, then according to the principle of overmodulation according to the switching period T _s , the first action time T _sh and the three The pulse widths T _as , T _bs , and T _cs of the phase switching tubes synthesize a three-phase pulse width modulation signal, wherein the pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are respectively:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; h</span>}}}{{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; min</span>}}<span\; class="notranslate">\; )</span>\end{array}\right.$

Taking the first sector as an example, the sequence of switching state changes in the switching period Ts can be obtained as follows: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ (111), correspondingly, the control method of each other sector is the same.

As a possible implementation manner, the device further includes a sampling module 50 configured to sample the DC bus voltage at the moment when the non-through zero state is active, to obtain the DC bus peak voltage.

Since the through state ST and the non-through zero state are respectively located at the peak and valley positions of the carrier, that is, the through state ST and the non-through zero state are separated by an effective state, and the through state only appears once in a switching cycle, see Figure 4 , FIG. 4 is a schematic diagram of a state vector provided by an embodiment of the present invention. It can be seen from the figure that the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100 ), V ₀ (000). Since the through-duty cycle in practical applications is limited (generally less than 30%, that is, the action time of the through-state ST is relatively short), therefore, the through-state ST only concentrates on one of the peak B or valley A of the carrier, assuming that in In the valley A of the carrier wave, the through state ST is concentrated in a position less than 30% centered on the valley A. The other 70% of the positions correspond to the non-through state, so there is enough time to sample and obtain the peak voltage of the bus. Preferably, a digital signal processor (DSP, Digital Signal Processor) can conveniently set an interrupt at the peak B or valley A of the triangular wave, so that when sampling the DC bus at this point, the peak voltage of the bus can be directly obtained.

Implementing the embodiment of the present invention, by removing one of the non-straight-through zero states, the entire straight-through state ST is inserted into the action position of the non-straight-through zero state, and at the same time, the action time of the non-straight-through zero state is loaded to the action of another non-straight-through zero state In terms of time, the through state ST only appears once in a switching cycle, and there is only one non-through zero state. One of the non-through zero state and the through state ST is located at the peak, and the other is located at the valley, so that the DC bus voltage can be sampled conveniently during the action time of the through state ST, and the peak voltage on the DC bus in the Z source inverter can be directly measured, and then The bus voltage can be directly controlled.

Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented through computer programs to instruct related hardware, and the programs can be stored in a computer-readable storage medium. During execution, it may include the processes of the embodiments of the above-mentioned methods. Wherein, the storage medium may be a magnetic disk, an optical disk, a read-only memory (Read-Only Memory, ROM) or a random access memory (Random Access Memory, RAM) and the like.

What is disclosed above is only a preferred embodiment of the present invention, and of course it cannot limit the scope of rights of the present invention. Those of ordinary skill in the art can understand all or part of the process of realizing the above embodiments, and according to the rights of the present invention The equivalent changes required still belong to the scope covered by the invention.

Claims (10)

1. A pulse width modulation control method, characterized in that, comprising: Obtain the pulse widths of the three-phase switching tubes in the switching period T _s , expressed as T _as , T _bs , T _cs respectively; Acquiring the first action time T _sh of the through state ST in the switching cycle; According to the pulse width and the first action time, obtain the second action time T ₀ of the non-through zero state in the switching period; A three-phase pulse width modulation signal is synthesized according to the switching period, the pulse width, the first action time and the second action time, wherein the straight-through state ST and the non-through-zero state are respectively located at the carrier Peak and valley positions, the pulse widths of the three-phase pulse width modulation signals are represented as T _ga , T _gb , and T _gc , respectively; Taking the first sector as an example, the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ (111 ). 2. The method according to claim 1, characterized in that, according to the pulse width and the first action time, obtaining the second action time T ₀ of the non-through zero state in the switching period comprises: Comparing the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes to obtain the maximum value T _max , the minimum value T _min and the middle value T _mid , that is, T _min ≤ T _mid ≤ T _max ; Determine the offset T _f according to the first action time T _sh and the minimum value T _min , T _f =T _sh -T _min ; According to the switching period T _s , the maximum value T _max and the offset T _f , the second action time T ₀ is calculated as: T ₀ =T _s −(T _max +T _f ). 3. The method according to claim 2, wherein said synthesizing a three-phase pulse width modulation signal according to said switching cycle, said pulse width, said first action time and said second action time comprises : Comparing the magnitude of the second action time T ₀ with zero; If T ₀ ≥ 0, synthesize a three-phase pulse width modulation signal according to the offset T _f and the pulse widths T _as , T _bs , and T _cs of the three-phase switching transistors, wherein the three-phase pulse width modulation signal The pulse widths T _ga , T _gb , and T _gc are: If T ₀ <0, a three-phase pulse width modulation signal is synthesized according to the switching period T _s , the first action time T _sh and the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes, wherein the The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are respectively: 4. method as claimed in claim 3, is characterized in that, described obtaining the pulse width of three-phase switching tube in switching cycle T _s , comprises: According to the voltages V _a , V _b , V _c of the three-phase voltages of A, B, and C, the expected voltage V _DC on the DC bus and the switching period T _s , the pulse widths T _as , T _bs , and _Tcs are: 5. The method according to any one of claims 1-4, further comprising: The DC bus voltage is sampled during the action time of the non-through zero state to obtain the DC bus peak voltage. 6. A pulse width modulation control device, characterized in that, comprising: The first acquisition module is used to acquire the pulse widths of the three-phase switching tubes in the switching period T _s , represented as T _as , T _bs , and T _cs respectively; The second obtaining module is used to obtain the first action time T _sh of the through state ST in the switching cycle; The third acquisition module is used to acquire the second action time T ₀ of the non-through zero state in the switching cycle according to the pulse width and the first action time; A synthesizing module, configured to synthesize a three-phase pulse width modulation signal according to the switching period, the pulse width, the first action time and the second action time, wherein the straight-through state ST and the non-through zero The states are respectively located at the peak and valley positions of the carrier wave, and the pulse widths of the three-phase pulse width modulation signals are represented as T _ga , T _gb , and T _gc ; Taking the first sector as an example, the switching state change sequence in the switching period Ts is: V ₀ (000), V ₄ (100), V ₆ (110), through state ST, V ₆ (110), V ₄ (100), V ₀ (000), or: V ₇ (111), V ₆ (110), V ₄ (100), through state ST, V ₄ (100), V ₆ (110), V ₇ ( 111). 7. The device according to claim 6, wherein the third acquiring module comprises: The comparison unit is used to compare the pulse widths T _as , T _bs , and T _cs of the three-phase switching tubes to obtain the maximum value T _max , the minimum value T _min and the middle value T _mid , that is, T _min ≤ T _mid ≤ T _max ; A selection unit, configured to determine an offset T _f according to the first action time T _sh and the minimum value T _min , T _f =T _sh -T _min ; A calculation unit, configured to calculate the second action time T ₀ according to the switching period T _s , the maximum value T _max and the offset T _f : T ₀ =T _s -(T _max +T _f ). 8. The device according to claim 7, wherein the synthesis module comprises: a judging unit, configured to compare the second action time _T0 with zero; The first synthesizing unit is configured to synthesize a three-phase pulse width modulation signal according to the offset T _f and the pulse widths T _as , T _bs , and T _cs of the three-phase switching transistors if T ₀ ≥ 0, wherein the The pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signals are respectively: The second synthesis unit is used to synthesize the three-phase pulse width according to the switching period T _s , the first action time T _sh and the pulse widths T _as , T _bs , and T _cs of the three-phase switching tube if T ₀ <0 modulation signal, wherein the pulse widths T _ga , T _gb , and T _gc of the three-phase pulse width modulation signal are: 9. The device according to claim 8, wherein the first acquisition module is used for voltages V _a , V _b , V _c of the three-phase voltages of A, B, and C, and the expected voltage V on the DC bus. _DC and switching period T _s , the pulse widths T _as , T _bs , and T _cs of the three-phase switching tube obtained are respectively: 10. The device according to any one of claims 6-9, further comprising: The sampling module is configured to sample the DC bus voltage during the action time of the non-through zero state to obtain the DC bus peak voltage.