CN103944376B - Isolated equalizing circuit based on bus type equalising network - Google Patents

Abstract

The invention discloses an isolated equalization circuit based on a bus-type equalization network. One end of a first inductance is connected to the positive pole of an input power supply, the other end of the first inductance is connected to the drain of a first power switch, and one end of the second inductance is connected to an input The negative pole of the power supply, the other end of the second inductance is connected to the source of the first power switch, one end of the third inductance is connected to the source of the second power switch, the other end of the third inductance is connected to one end of the second capacitor, and the fourth One end of the inductance is connected to the drain of the second power switch, the other end of the fourth inductance is connected to the other end of the second capacitor, one end of the first a capacitor is connected to the drain of the first power switch, and the other end of the first a capacitor is connected to the second Two power switch sources, one end of the first b capacitor is connected to the first power switch source, and the other end of the first b capacitor is connected to the second power switch drain.

Description

Isolated Equalization Circuit Based on Bus Equalization Network

technical field

The invention relates to the field of automatic control, in particular to an isolated equalization circuit based on a bus equalization network.

Background technique

The equalization circuit is mainly divided into dissipative and non-dissipative. The dissipative type consumes all the excess energy on the resistor, which has low efficiency. The non-dissipative type transfers excess energy through the circuit and has high efficiency. Buck-boost is a typical cascaded equalization circuit, and its network structure is shown in Figure 8. The structure of the cascaded equalization network based on buck-boost is relatively simple, but it has an obvious Disadvantage: Energy can only be transferred level by level. For example, as a strategy for B1 to transfer energy to B3, the controller must decompose the strategy into: first B1 transfers energy to B2, then B2 transfers energy to B3; the gradual transfer of energy reduces the equilibrium speed of the entire equilibrium network, Due to the loss of equalization energy delivered by each stage, the equalization efficiency is low.

Contents of the invention

The present invention aims at at least solving the technical problems existing in the prior art, and particularly innovatively proposes an isolated equalization circuit based on a bus equalization network.

In order to achieve the above object of the present invention, the present invention provides an isolated equalization circuit based on a bus-type equalization network, the key of which is to include a first inductance, a fourth inductance, a first a capacitor, a first b capacitor, a second a capacitor, a first power switch, and a second power switch;

One end of the first inductor is connected to the positive pole of the power supply, the other end of the first inductor is connected to the drain of the first power switch, the source of the first power switch is connected to the negative pole of the power supply, and the source of the first power switch is also connected to the first b One end of the capacitor, the other end of the first b capacitor is connected to one end of the fourth inductance, the other end of the fourth inductance is connected to one end of the second capacitor, the other end of the second capacitor is connected to the other end of the first a capacitor, and the second capacitor The other end is also connected to the source of the second power switch, and the drain of the second power switch is connected to the other end of the first b capacitor.

The beneficial effects of the above technical solution are: the balancing solution does not use a transformer, but uses a capacitor for circuit isolation, and its volume is smaller than that of the transformer; the balancing circuit is completely symmetrical, and the energy bidirectional flow analysis is consistent.

The isolated equalization circuit based on the bus type equalization network preferably further includes: a first diode and a second diode; the anode of the first diode is connected to the source of the first power switch, and the The cathode of the first diode is connected to the drain of the first power switch, the anode of the second diode is connected to the source of the second power switch, and the cathode of the second diode is connected to the drain of the second diode.

The beneficial effect of the above technical solution is: the first diode and the second diode can increase the switching speed of the corresponding power switch.

The isolated equalization circuit based on the bus equalization network preferably further includes: a second inductor,

One end of the second inductor is connected to the negative pole of the power supply, and the other end of the second inductor is connected to the source of the first power switch.

The beneficial effects of the above technical solution are: when the equalization circuit is used in a bus-type equalization network, each equalization circuit can work independently with little mutual interference.

The isolated equalization circuit based on the bus equalization network preferably further includes: a third inductor,

One end of the third inductor is connected to the source of the second power switch, and the other end of the third inductor is connected to the other end of the third capacitor.

The beneficial effects of the above technical solution are: when the equalization circuit is used in a bus-type equalization network, each equalization circuit can work independently with little mutual interference.

In summary, owing to adopting above-mentioned technical scheme, the beneficial effect of the present invention is:

1 This equalization scheme does not use a transformer, but uses a capacitor for circuit isolation, and its volume is smaller than that of the transformer;

2. The equalization circuit is completely symmetrical, and the two-way energy flow analysis is consistent;

3. The equalization circuit is used in a bus-type equalization network, and each equalization circuit can work independently with little mutual interference.

Additional aspects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Description of drawings

The above and/or additional aspects and advantages of the present invention will become apparent and comprehensible from the description of the embodiments in conjunction with the following drawings, wherein:

Fig. 1 is the connection schematic diagram of the isolated equalization circuit based on the bus type equalization network of the present invention;

Fig. 2 is the first stage of work of the isolated equalization circuit based on the bus type equalization network of the present invention;

Fig. 3 is the second stage of work of the isolated equalization circuit based on the bus type equalization network of the present invention;

Fig. 4 is the equivalent circuit of the isolated type equalization circuit based on the bus type equalization network of the present invention;

Fig. 5 is the simplified equivalent circuit diagram of the isolated equalization circuit based on the bus type equalization network of the present invention;

Fig. 6 is the two loops of the isolated type equalization circuit based on the bus type equalization network of the present invention;

Fig. 7 is the current flow direction of A/B two points when the equivalent cuk of the isolated equalization circuit based on the bus equalization network of the present invention works;

8 is a schematic diagram of charge and discharge of the isolated equalization circuit based on the bus equalization network of the present invention;

9 is a schematic circuit diagram of the application of the isolated equalization circuit based on the bus equalization network in the bus structure according to the present invention;

Fig. 10 is a schematic diagram of connection of an isolated equalization circuit based on a bus equalization network in the present invention;

Fig. 11 is a schematic diagram of connection of an isolated equalization circuit based on a bus equalization network in the present invention;

Fig. 12 is a schematic diagram of connection of an isolated equalization circuit based on a bus equalization network in the present invention;

FIG. 13 is a schematic diagram of connection of an isolated equalization circuit based on a bus equalization network according to the present invention.

detailed description

Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

In describing the present invention, it should be understood that the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", The orientation or positional relationship indicated by "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than Nothing indicating or implying that a referenced device or element must have a particular orientation, be constructed, and operate in a particular orientation should therefore not be construed as limiting the invention.

In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be mechanical connection or electrical connection, or two The internal communication of each element may be directly connected or indirectly connected through an intermediary. Those skilled in the art can understand the specific meanings of the above terms according to specific situations.

As shown in Figure 1, the present invention provides an isolated equalization circuit based on a bus-type equalization network, the key of which is to include a first inductance, a fourth inductance, a first capacitor a, a first capacitor b, a second capacitor, a first power switch, a second power switch;

One end of the first inductor is connected to the positive pole of the power supply, the other end of the first inductor is connected to the drain of the first power switch, the source of the first power switch is connected to the negative pole of the power supply, and the source of the first power switch is also connected to the first b One end of the capacitor, the other end of the first b capacitor is connected to one end of the fourth inductance, the other end of the fourth inductance is connected to one end of the second capacitor, the other end of the second capacitor is connected to the other end of the first a capacitor, and the second capacitor The other end is also connected to the source of the second power switch, and the drain of the second power switch is connected to the other end of the first b capacitor.

The beneficial effects of the above technical solution are: the balancing solution does not use a transformer, but uses a capacitor for circuit isolation, and its volume is smaller than that of the transformer; the balancing circuit is completely symmetrical, and the energy bidirectional flow analysis is consistent.

The isolated equalization circuit based on the bus type equalization network preferably further includes: a first diode and a second diode; the anode of the first diode is connected to the source of the first power switch, and the The cathode of the first diode is connected to the drain of the first power switch, the anode of the second diode is connected to the source of the second power switch, the cathode of the second diode is connected to the drain of the second diode, and the diode The connection with the power switch can also be transformed;

For example: the anode of the first diode is connected to the drain of the first power switch, the cathode of the first diode is connected to the source of the first power switch, and the anode of the second diode is connected to the drain of the second power switch, The cathode of the second diode is connected to the source of the second diode.

The beneficial effect of the above technical solution is: the first diode and the second diode can increase the switching speed of the corresponding power switch.

The isolated equalization circuit based on the bus equalization network preferably further includes: a second inductor,

One end of the second inductor is connected to the negative pole of the power supply, and the other end of the second inductor is connected to the source of the first power switch.

The beneficial effects of the above technical solution are: when the equalization circuit is used in a bus-type equalization network, each equalization circuit can work independently with little mutual interference.

The isolated equalization circuit based on the bus equalization network preferably further includes: a third inductor,

One end of the third inductor is connected to the source of the second power switch, and the other end of the third inductor is connected to the other end of the third capacitor.

The beneficial effects of the above technical solution are: when the equalization circuit is used in a bus-type equalization network, each equalization circuit can work independently with little mutual interference.

This solution uses the isolated cuk circuit for battery balancing, and it needs to work in continuous mode, that is, all the inductors in the isolated cuk circuit always have current flowing when they are in a balanced state.

The circuit is divided into two stages when it works, and Figure 2 is the first stage;

This stage is divided into two loops, the thick solid line loop and the dotted line loop. Q1 is in the open state. At this time, the voltage across Q1 is 0, and the current flowing through Q2 is 0.

Figure 3 is the second stage of cuk work;

At this stage, Q1 is cut off, and the voltage across Q1 is: u _Q1 =V _C1a +V _C1b ; the current flowing through Q2 is: i _Q2 =i ₁ +i ₂ , where u _Q1 is the voltage across Q1 of the first power switch , V _C1a is the voltage value of the first capacitor, V _C1b is the voltage value of the second capacitor, i ₁ is the current flowing through L1 and L2, and i ₂ is the current flowing through L3 and L4.

With a periodic unit pulse function,

Among them, g ₁ (t), g ₂ (t) respectively represent the unit pulse function of the first stage and the second stage of cuk work, t is a time variable, T is a switching cycle, t ₁ is the switch Q1 conduction in a cycle Time or turn-off moment, the voltage across Q1 and the current flowing through Q2 can be expressed as:

U _Q1 = u _Q1 g ₂

I _Q2 = i _Q2 g ₂

Replace Q1 and Q2 with periodic voltage source and current source respectively, and its equivalent circuit diagram is shown in Figure 4.

According to the working mode of the cuk circuit, the equivalent circuit diagram can be simplified again. Since in the whole process, the currents of the inductors L1 and L2 are consistent, they can be combined into one inductor, and the currents of the inductors L3 and L4 are consistent, so they can be combined into one inductor and flow through the capacitor. The currents of C1a and C1b are also consistent, and can also be combined into one capacitor to obtain a more simplified model, and the circuit analysis of each stage will not change.

In Figure 5, an uncertain load is introduced while simplifying, and the load current in the following process has nothing to do with the output voltage.

According to Figure 6, the voltage equations of the two loops can be obtained

Where L is the inductance value, L _p is the equivalent inductance of L1 and L2, i _g is the current flowing through L _p , L _O1 is the equivalent inductance of L3 and L4, i _o1 is the current flowing through L _O1 , di _g , di _o1 represent i _g , the differential of i _o1 respectively, dt is the differential of time, V _g input side voltage.

Among them, U _Q1 = V _C1 g ₂ (2)

Bring (2) into (1)

A: According to Kirchhoff's current law dV _c1 represents the differential of V _c1 , and dt represents the differential of time, where I _Q1 = (i _g +i _o1 )g ₂ , then we can get

B: According to Kirchhoff's current law dV _c2 means V _c2 differential, I _s means load current,

but

Taking i _g , i _o1 , V _C1 , V _C2 as state variables, we can get

x represents the state space.

Using the average value method, since g2 is only effective in the _second stage, the ratio of its effective time to the total time is 1-D, where D is the duty cycle of the switch, then the formula (6) can be changed into:

Since the circuit can be controlled by the controller, the duty cycle of the variable is D, formula (7) can be transformed into:

In the bus-type equalization network, the battery is connected to the energy transmission bus through the equalization circuit, which can realize the two-way transmission of energy on the bus and the battery, and the transfer of excess energy only needs to go through the equalization circuit twice, which improves the equalization efficiency and equalization speed. In addition, the bus-type equalization network makes the expansion of the battery pack convenient, which is quite effective in meeting the actual needs of the battery pack.

Fig. 7 is the current flow direction of A/B two points when the equivalent cuk of the isolated equalization circuit based on the bus equalization network of the present invention works;

8 is a schematic diagram of charge and discharge of the isolated equalization circuit based on the bus equalization network of the present invention;

9 is a schematic circuit diagram of the application of the isolated equalization circuit based on the bus equalization network in the bus structure according to the present invention;

10 is a schematic diagram of the connection of an isolated equalization circuit based on a bus-type equalization network according to a specific embodiment of the present invention;

11 is a schematic diagram of the connection of an isolated equalization circuit based on a bus equalization network according to a specific embodiment of the present invention;

12 is a schematic diagram of the connection of an isolated equalization circuit based on a bus-type equalization network according to a specific embodiment of the present invention;

FIG. 13 is a schematic diagram of connection of an isolated equalization circuit based on a bus equalization network according to a specific embodiment of the present invention.

The beneficial effects of the present invention are:

1 This equalization scheme does not use a transformer, but uses a capacitor for circuit isolation, and its volume is smaller than that of the transformer;

2. The equalization circuit is completely symmetrical, and the two-way energy flow analysis is consistent;

3. The equalization circuit is used in a bus-type equalization network, and each equalization circuit can work independently with little mutual interference.

In the description of this specification, descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific examples", or "some examples" mean that specific features described in connection with the embodiment or example , structure, material or characteristic is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Although the embodiments of the present invention have been shown and described, those skilled in the art can understand that various changes, modifications, substitutions and modifications can be made to these embodiments without departing from the principle and spirit of the present invention. The scope of the invention is defined by the claims and their equivalents.

Claims (1)

1. a kind of isolated equalizing circuit based on bus type equalising network, it is characterised in that including the first inductance, the second electricity Sense, the 3rd inductance, the 4th inductance, the first a electric capacity, the first b electric capacity, the second electric capacity, the first power switch, the second power switch, First diode and the second diode；

First isolated equalizing circuit one end connects the first discharge and recharge power supply, the first isolated equalizing circuit other end connection energy Bus, second isolated equalizing circuit one end connects the second discharge and recharge power supply, the second isolated equalizing circuit other end connection energy Bus is measured, n-th isolated equalizing circuit one end connects the n-th discharge and recharge power supply, the n-th isolated equalizing circuit other end connection energy Bus, wherein in parallel between the first isolated equalizing circuit, the second isolated equalizing circuit, the n-th isolated equalizing circuit；

Described first inductance one end connects discharge and recharge positive source, and the first inductance other end connects the leakage of the first power switch Pole, the first power switch source electrode connects second inductance one end, and the second inductance other end connects discharge and recharge power cathode, The first power switch drain electrode is also connected with the first a electric capacity one end, and the first power switch source electrode is also connected with the first b electric capacity one End, the first b electric capacity other end connects the 4th inductance one end and the drain electrode of the second power switch, and the 4th inductance other end connects Second electric capacity one end is connect, the second electric capacity other end connects the 3rd inductance one end, and the 3rd inductance other end connects the first a The electric capacity other end and the second power switch source electrode；

First diode cathode connects the first power switch source electrode, and first diode cathode connects the first power switch Drain electrode, second diode cathode connects the second power switch source electrode, and second diode cathode connects the second diode Drain electrode；

The isolated equalizing circuit progress based on bus type equalising network is battery balanced, it need to be made to be operated in continuous mode, All inductance have electric current to flow through all the time in poised state；

The circuit is divided into two stages when working：First stage is divided into two loops, and the first power switch is in opening state, this When the first power switch two ends voltage be 0, flow through the second power switch electric current be 0；

Second stage, the first power switch ends, and the voltage at the first power switch two ends is：u_Q1=V_C1a+V_C1b；Flow through the second work( Rate switching current is：i_Q2=i₁+i₂, wherein u_Q1For the magnitude of voltage at the first power switch two ends, V_C1aFor the voltage of the first a electric capacity Value, V_C1bFor the magnitude of voltage of the first b electric capacity, V_C2For the magnitude of voltage of the second electric capacity, i₁To flow through the electricity of the first inductance and the second inductance Stream, i₂To flow through the electric current of the 3rd inductance and the 4th inductance；

Provided with periodicity unit impulse function,

Wherein g₁(t), g₂(t) first stage of circuit work and the unit impulse function of second stage are represented respectively, when t is Between variable, T is switch periods, t₁For the first power switch ON time or turn-off time in a cycle, then the first work( The voltage of rate switch ends and flow through the electric current of the second power switch and be expressed as：

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According to the mode of operation of the circuit, again by the circuit reduction, because in overall process, the first inductance and the second inductance are electric Stream is consistent, is merged into an inductance, and the 3rd inductance and the 4th inductive current are consistent, are merged into an inductance, flow through the first a electric capacity It is also consistent with the electric current of the first b electric capacity, an electric capacity is merged into, a uncertain load is introduced while simplifying, is obtained The voltage equation in two loops

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Wherein L is inductance value, L_pFor the equivalent inductance of the first inductance and the second inductance, i_gTo flow through L_pElectric current, L_O1For the 3rd electricity Sense and the equivalent inductance of the 4th inductance, i_o1To flow through L_O1Electric current, di_g、di_o1I is represented respectively_g, i_o1Differential, dt is the time Differential, V_gInput side voltage；

Wherein, U_Q1=V_C1g₂；

By U_Q1=V_C1g₂Bring intoObtain

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Had by Kirchhoff's current law (KCL)dV_c1Represent V_c1Differential, dt represent the differential of time, wherein I_Q1 =(i_g+i_o1)g₂, then

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Had by Kirchhoff's current law (KCL)dV_c2Represent V_c2Differential, I_sRepresent load current,

Then

Take i_g,i_o1,V_C1,V_C2For state variable, obtain

X represents state space；

Using mean value method, due to g₂Only in second stage effectively, the ratio that its effective time accounts for total time is 1-D, and wherein D is The dutycycle of switch, then above formula be changed into：

<mrow> <mover> <mi>x</mi> <mo>&amp;CenterDot;</mo> </mover> <mo>=</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <msub> <mover> <mi>i</mi> <mo>&amp;CenterDot;</mo> </mover> <mi>g</mi> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>i</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>V</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>V</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>C</mi> <mn>2</mn> </mrow> </msub> </mtd> </mtr> </mtable> </mfenced> <mo>=</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mrow> <mo>-</mo> <mfrac> <mrow> <mn>1</mn> <mo>-</mo> <mi>D</mi> </mrow> <msub> <mi>L</mi> <mi>p</mi> </msub> </mfrac> </mrow> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mfrac> <mi>D</mi> <msub> <mi>L</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mfrac> </mtd> <mtd> <mrow> <mo>-</mo> <mfrac> <mn>1</mn> <msub> <mi>L</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mfrac> </mrow> </mtd> </mtr> <mtr> <mtd> <mfrac> <mrow> <mn>1</mn> <mo>-</mo> <mi>D</mi> </mrow> <msub> <mi>C</mi> <mn>1</mn> </msub> </mfrac> </mtd> <mtd> <mrow> <mo>-</mo> <mfrac> <mi>D</mi> <msub> <mi>C</mi> <mn>1</mn> </msub> </mfrac> </mrow> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mfrac> <mn>1</mn> <msub> <mi>C</mi> <mn>2</mn> </msub> </mfrac> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> </mtable> </mfenced> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <msub> <mi>i</mi> <mi>g</mi> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>i</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>2</mn> </mrow> </msub> </mtd> </mtr> </mtable> </mfenced> <mo>+</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mfrac> <msub> <mi>V</mi> <mi>g</mi> </msub> <msub> <mi>L</mi> <mi>p</mi> </msub> </mfrac> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mo>-</mo> <mfrac> <msub> <mi>I</mi> <mi>s</mi> </msub> <msub> <mi>C</mi> <mn>2</mn> </msub> </mfrac> </mtd> </mtr> </mtable> </mfenced> </mrow>

Because the circuit can be controlled the dutycycle of variable to be D by controller, above formula is turned to：

<mrow> <mover> <mi>x</mi> <mo>&amp;CenterDot;</mo> </mover> <mo>=</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <msub> <mover> <mi>i</mi> <mo>&amp;CenterDot;</mo> </mover> <mi>g</mi> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>i</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>V</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mover> <mi>V</mi> <mo>&amp;CenterDot;</mo> </mover> <mrow> <mi>C</mi> <mn>2</mn> </mrow> </msub> </mtd> </mtr> </mtable> </mfenced> <mo>=</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mrow> <mo>-</mo> <mfrac> <mn>1</mn> <msub> <mi>L</mi> <mi>p</mi> </msub> </mfrac> </mrow> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mrow> <mo>-</mo> <mfrac> <mn>1</mn> <msub> <mi>L</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mfrac> </mrow> </mtd> </mtr> <mtr> <mtd> <mfrac> <mn>1</mn> <msub> <mi>C</mi> <mn>1</mn> </msub> </mfrac> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> <mtd> <mfrac> <mn>1</mn> <msub> <mi>C</mi> <mn>2</mn> </msub> </mfrac> </mtd> <mtd> <mn>0</mn> </mtd> <mtd> <mn>0</mn> </mtd> </mtr> </mtable> </mfenced> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <msub> <mi>i</mi> <mi>g</mi> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>i</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> </mtd> </mtr> <mtr> <mtd> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>2</mn> </mrow> </msub> </mtd> </mtr> </mtable> </mfenced> <mo>+</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mfrac> <msub> <mi>V</mi> <mi>g</mi> </msub> <msub> <mi>L</mi> <mi>p</mi> </msub> </mfrac> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> </mtr> <mtr> <mtd> <mo>-</mo> <mfrac> <msub> <mi>I</mi> <mi>s</mi> </msub> <msub> <mi>C</mi> <mn>2</mn> </msub> </mfrac> </mtd> </mtr> </mtable> </mfenced> <mo>+</mo> <mfenced open = "[" close = "]"> <mtable> <mtr> <mtd> <mfrac> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> <msub> <mi>L</mi> <mi>p</mi> </msub> </mfrac> </mtd> </mtr> <mtr> <mtd> <mfrac> <msub> <mi>V</mi> <mrow> <mi>C</mi> <mn>1</mn> </mrow> </msub> <msub> <mi>L</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mfrac> </mtd> </mtr> <mtr> <mtd> <mo>-</mo> <mfrac> <mrow> <msub> <mi>i</mi> <mi>g</mi> </msub> <mo>+</mo> <msub> <mi>i</mi> <mrow> <mi>o</mi> <mn>1</mn> </mrow> </msub> </mrow> <msub> <mi>C</mi> <mn>1</mn> </msub> </mfrac> </mtd> </mtr> <mtr> <mtd> <mn>0</mn> </mtd> </mtr> </mtable> </mfenced> <mi>D</mi> <mo>;</mo> </mrow>

In bus type equalising network, battery is connected by equalizing circuit with energy transfer bus, realizes energy in bus and electricity Bi-directional on pond.