CN103943511A - Low-power-consumption thin back gate graphene field effect transistor manufacturing method - Google Patents
Low-power-consumption thin back gate graphene field effect transistor manufacturing method Download PDFInfo
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- CN103943511A CN103943511A CN201410156613.4A CN201410156613A CN103943511A CN 103943511 A CN103943511 A CN 103943511A CN 201410156613 A CN201410156613 A CN 201410156613A CN 103943511 A CN103943511 A CN 103943511A
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- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 34
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 33
- 230000005669 field effect Effects 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title description 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims abstract description 14
- 238000011161 development Methods 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000000956 alloy Substances 0.000 claims abstract description 4
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 4
- 238000001020 plasma etching Methods 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 5
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 claims description 4
- 230000007797 corrosion Effects 0.000 claims description 3
- 238000005260 corrosion Methods 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 2
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 2
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 2
- 238000012546 transfer Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000000206 photolithography Methods 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 8
- 238000012545 processing Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000005355 Hall effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 150000001721 carbon Chemical group 0.000 description 1
- 230000002925 chemical effect Effects 0.000 description 1
- 230000005492 condensed matter physics Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/8303—Diamond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
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- Thin Film Transistor (AREA)
- Carbon And Carbon Compounds (AREA)
Abstract
本发明公开一种低功耗薄背栅石墨烯场效应晶体管的制备方法，在n型Si衬底的表面热生长SiO2介质层，对SiO2介质层进行光刻，显影后用反应离子刻蚀SiO2介质层，形成沟槽，转移石墨烯到刻蚀后的SiO2介质层上，形成石墨烯沟道，在石墨烯沟道表面依次溅射5nm厚的TiW合金和100nm厚的Au，再进行光刻，显影后，腐蚀TiW/Au形成线型Au连线和Au电极片，构成源极电极和漏极电极，有效地实现了低功耗、高性能的目的。
The invention discloses a method for preparing a low-power thin back-gate graphene field effect transistor. A SiO 2 dielectric layer is thermally grown on the surface of an n-type Si substrate, and the SiO 2 dielectric layer is photoetched, and after developing, it is etched with a reactive ion. Etch the SiO2 dielectric layer to form a groove, transfer graphene to the etched SiO2 dielectric layer to form a graphene channel, and sputter 5nm-thick TiW alloy and 100nm-thick Au on the surface of the graphene channel in sequence, After photolithography and development, the TiW/Au is etched to form linear Au wiring and Au electrode sheets to form source electrodes and drain electrodes, effectively achieving the purpose of low power consumption and high performance.
Description
Technical field
The invention belongs to nano-electron components and parts technical field, relate to the preparation method of the thin back of the body grid of a kind of low-power consumption graphene field effect transistor.
Background technology
Field-effect transistor (FET) is most important device in the very lagre scale integrated circuit (VLSIC) such as microprocessor and semiconductor memory.FET by gate source voltage (
v gs) control the conductivity of raceway groove, thereby reach control output current (
i ds) big or small object.FET is as the device of high-speed response, must want fast to the gate source voltage response speed changing, and therefore need to possess less grid and conducting channel has high carrier mobility.
Within 2004, Condensed Matter Physics scholar finds a kind of Graphene that at room temperature only has several atomic layers thick, and this material is with sp by carbon atom
2hybridized orbit forms the flat film that hexangle type is honeycomb lattice, and its thickness only has 0.34nm, and structure is highly stable.Graphene not only has very outstanding mechanical property and thermal stability, also has excellent electric property, and its carrier mobility can be up to 2 * 10
5cm
2/ Vs, is 10 times of left and right of current silicon materials carrier mobility, and has the physical propertys such as normal temperature quantum hall effect, this new material is paid close attention in field of electronic devices, at present, successfully produces graphene field effect transistor.
The development key of Digital Logical Circuits is to produce that size is less, power consumption is lower, respond metal-oxide semiconductor fieldeffect transistor (MOSFET) faster.According to Moore's Law, the transistor density of every 18 ~ 24 months integrated circuits doubles, operating frequency doubles, yet power consumption also improves more than one times, and this becomes the bottleneck of Moore's Law maximum, the nano-electron components and parts that therefore design and manufacture super low-power consumption are current problem demanding prompt solutions.And common back of the body grid graphene field effect transistor is all with the thick SiO of 300nm at present
2as gate dielectric layer, its input voltage is larger, and power consumption is also larger.
In Micrometer-Nanometer Processing Technology, reactive ion etching (RIE) is to utilize the physical effect of Ions Bombardment and the chemical effect of active particle that under high-frequency electric field, gas glow discharge produces to combine to realize a kind of technology of processing object.It has higher etch rate, the selectivity of good directivity, and the figure of energy etching fine structure, is the Perfected process of processing microelectronic component.
Summary of the invention
The object of the invention is in order to overcome the defect that at present common back of the body grid graphene field effect transistor input voltage is large, power consumption is larger, utilize reactive ion etching technology to prepare thin back of the body grid graphene field effect transistor, do not reduce the situation decline low input of its performance, reducing power consumption.
Technical scheme of the present invention is to adopt following steps: (1) is at the surface heat growth SiO of N-shaped Si substrate
2dielectric layer; (2) to SiO
2dielectric layer carries out photoetching, after developing, uses reactive ion etching SiO
2dielectric layer, forms groove; (3) shift Graphene to the SiO after etching
2on dielectric layer, form Graphene raceway groove; (4) at the thick TiW alloy of Graphene channel surface successively sputter 5 nm and the thick Au of 100 nm, carry out again photoetching, after development, corrosion TiW/Au forms line style Au line and Au electrode slice, form source electrode and drain electrode, preparing grid oxygen is the thin back of the body grid graphene field effect transistor that 10 nm are thick.
The present invention adopts traditional SiO
2as the back of the body gate medium, by reactive ion etching technology by the thick SiO of traditional 300nm
2etch into 10nm, prepare thin grid graphene field effect transistor, its gate control voltage scope is by be reduced to-4V ~ 4V of-150 ~ 150 V, and the parameters such as its carrier concentration, conductivity, on-off ratio do not reduce, reduced widely the power consumption of device, and its performance performance is excellent, has effectively realized low-power consumption, high performance object.The present invention can promote the development of low-power consumption micro-nano electronic device.
Accompanying drawing explanation
Fig. 1 is at the thick SiO of n-Si primary surface heat growth 300 nm
2schematic diagram;
Fig. 2 is reactive ion etching technology etching SiO
2form groove schematic diagram;
Fig. 3 is the structural representation shifting after Graphene;
Fig. 4 is the structural representation after sputtering electrode;
Fig. 5 is the transfer characteristic curve of the thick FET of 300nm;
Fig. 6 is the transfer characteristic curve of the thin grid FET of the prepared 10nm of the present invention;
In figure: 1-N-shaped Si substrate; 2-SiO
2dielectric layer; 3-groove; 4-Graphene raceway groove; 5-source electrode; 6-drain electrode; The width of b-groove.
Embodiment
When the grid oxygen of field-effect transistor is 300 nm, the required grid voltage scope of its transfer characteristic is in-150 ~ 150 V left and right, and span is very large, is not suitable for the power consumption of general micro-nano electronic device.For the transducer based on graphene field effect transistor, wish that input voltage is controlled within the scope of 5 V, is conducive to the application of portable graphene device like this.In order to guarantee the performance of graphene field effect transistor, when reducing grid voltage, can provide enough current drives, be necessary to reduce the thickness of grid oxygen, therefore adopt reactive ion etching technology to obtain thin grid oxygen.
Referring to Fig. 1, the surface heat that is the N-shaped Si substrate 1 of 1 ~ 10 Ω cm in the resistivity thick SiO of 300 nm that grows
2dielectric layer 2.Referring to Fig. 2, with No. 1 mask plate to SiO
2dielectric layer 2 carries out photoetching, after development, with reactive ion etching technology etching SiO
2dielectric layer 2, forms groove 3, and the width b of groove is 3 ~ 8 μ m.Referring to Fig. 3, shift Graphene to the SiO after etching
2on dielectric layer 2, form Graphene raceway groove 4.Referring to Fig. 4, the TiW alloy that sputter 5 nm are thick successively on Graphene raceway groove 4 surfaces and the thick Au of 100 nm, with No. 2 mask plates, carry out photoetching, after development, in corrosion of metals liquid, corrode TiW/Au and form line style Au line and Au electrode slice, formed source electrode 5 and drain electrode 6, can prepare grid oxygen is the thin back of the body grid graphene field effect transistor that 10 nm are thick.
In the process of reactive ion etching groove 3, groove 3 degree of depth are relevant with the duration of etching, in the course of processing, the process conditions of reactive ion etching are: pressure: 1300 Torr, power: 500 W, fluoroform: 18 sccm, sulphur hexafluoride: 3.5 sccm, helium: 95 sccm, duration are 1 min.Because the width of groove 3 only has 3 ~ 8 μ m, and the hot spot that film thickness instrument penetrates is larger, the SiO of groove 3 bottoms
2thickness is difficult for directly recording by film thickness instrument.Therefore at SiO
2primary surface is selected an alignment mark, the SiO at alignment mark place
2siO with channel bottom
2be to machine under identical process conditions, can be used for indirectly determining groove 3 bottom SiO
2thickness, the SiO that film thickness instrument records
2thickness is 10 nm.
With the semi-automatic probe station of Cascade, test the transfer characteristic curve of prepared thin back of the body grid graphene field effect transistor, as shown in Figure 6, its grid voltage modification scope is-4V ~ 4V.By traditional handicraft, preparing grid oxygen is the graphene field effect transistor that 300nm is thick, with the semi-automatic probe station of Cascade, tests its transfer characteristic curve as a comparison, and as shown in Figure 5, its grid voltage modification scope is-100V ~ 100V.
Claims (3)
1. a preparation method for the thin back of the body grid of low-power consumption graphene field effect transistor, is characterized in that adopting following steps:
(1) at the surface heat growth SiO of N-shaped Si substrate
2dielectric layer;
(2) to SiO
2dielectric layer carries out photoetching, after developing, uses reactive ion etching SiO
2dielectric layer, forms groove;
(3) shift Graphene to the SiO after etching
2on dielectric layer, form Graphene raceway groove;
(4) at the thick TiW alloy of Graphene channel surface successively sputter 5 nm and the thick Au of 100 nm, carry out again photoetching, after development, corrosion TiW/Au forms line style Au line and Au electrode slice, form source electrode and drain electrode, preparing grid oxygen is the thin back of the body grid graphene field effect transistor that 10 nm are thick.
2. preparation method according to claim 1, is characterized in that: in step (1), the resistivity of N-shaped Si substrate is 1 ~ 10 Ω cm, surface heat growth SiO
2the thickness of dielectric layer is 300 nm; In step (2), the width of groove is 3 ~ 8 μ m.
3. preparation method according to claim 1, it is characterized in that: in step (2), the pressure of reactive ion etching is that 1300 Torr, power are that 500 W, fluoroform are that 18 sccm, sulphur hexafluoride are that 3.5 sccm, helium are that 95 sccm, duration are 1 min.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410156613.4A CN103943511A (en) | 2014-04-18 | 2014-04-18 | Low-power-consumption thin back gate graphene field effect transistor manufacturing method |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104310305A (en) * | 2014-10-28 | 2015-01-28 | 江苏大学 | Preparation method of large-scale array graphene nanoelectronic resonator based on femtosecond laser |
| CN105304703A (en) * | 2015-11-19 | 2016-02-03 | 浙江大学 | Contact-potential barrier field effect transistor based on graphene/silicon and preparation method thereof |
| CN107256887A (en) * | 2017-06-23 | 2017-10-17 | 上海集成电路研发中心有限公司 | A kind of graphene FinFET transistors and its manufacture method |
| CN112701156A (en) * | 2020-12-28 | 2021-04-23 | 光华临港工程应用技术研发(上海)有限公司 | Back gate transistor and preparation method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777583A (en) * | 2010-02-05 | 2010-07-14 | 电子科技大学 | Graphene field effect transistor |
| US20120326126A1 (en) * | 2011-06-23 | 2012-12-27 | International Business Machines Corporation | Graphene or Carbon Nanotube Devices with Localized Bottom Gates and Gate Dielectric |
-
2014
- 2014-04-18 CN CN201410156613.4A patent/CN103943511A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777583A (en) * | 2010-02-05 | 2010-07-14 | 电子科技大学 | Graphene field effect transistor |
| US20120326126A1 (en) * | 2011-06-23 | 2012-12-27 | International Business Machines Corporation | Graphene or Carbon Nanotube Devices with Localized Bottom Gates and Gate Dielectric |
Non-Patent Citations (1)
| Title |
|---|
| 张进: "背栅石墨烯场效应晶体管的制备及性能可靠性研究", 《万方学位论文数据库》, 8 October 2013 (2013-10-08), pages 12 - 23 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104310305A (en) * | 2014-10-28 | 2015-01-28 | 江苏大学 | Preparation method of large-scale array graphene nanoelectronic resonator based on femtosecond laser |
| CN105304703A (en) * | 2015-11-19 | 2016-02-03 | 浙江大学 | Contact-potential barrier field effect transistor based on graphene/silicon and preparation method thereof |
| CN107256887A (en) * | 2017-06-23 | 2017-10-17 | 上海集成电路研发中心有限公司 | A kind of graphene FinFET transistors and its manufacture method |
| CN112701156A (en) * | 2020-12-28 | 2021-04-23 | 光华临港工程应用技术研发(上海)有限公司 | Back gate transistor and preparation method thereof |
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Application publication date: 20140723 |