CN103928003B - Grid driving circuit, restoration method thereof, display panel and display device - Google Patents

Abstract

The invention discloses a gate driving circuit and its repairing method, a display panel and a display device, so as to provide the repairing ability of the gate driving circuit. The gate drive circuit includes: M-level driving sub-circuits, each level of driving sub-circuits includes a shift register circuit and a scanning control circuit; repairing circuit, the repairing circuit at least includes an M-level repairing sub-circuit corresponding to the M-level driving sub-circuit; The N-level repair sub-circuit is used for forward scanning. When the N+1-th level scanning control circuit is working abnormally, it provides the scanning signal for the N+1-th level shift-register circuit according to the output signal of the N-level shift-register circuit. ; And, for reverse scanning, when the N-1st level scan control circuit is working abnormally, the output signal of the N-th level shift-register circuit provides a scan signal for the N-1st level shift-register circuit; wherein, N=2, 3, 4..., M-2, M-1, M is a positive integer equal to or greater than 4.

Description

A gate drive circuit and repair method thereof, display panel and display device

technical field

The present invention relates to the field of display technology, in particular to a gate drive circuit and a repair method thereof, a display panel and a display device.

Background technique

Liquid crystal displays (liquid crystal displays, LCDs) or organic light-emitting diodes (Organic Light-Emitting Diodes, OLEDs) have the advantages of low radiation, small size, and low energy consumption, and have gradually replaced traditional cathode ray tube displays (Cathode ray tubes) in some applications. Ray Tube display, CRT), and thus are widely used in information products such as notebook computers, personal digital assistants (Personal Digital Assistant, PDA), flat-screen TVs, or mobile phones. The traditional method of liquid crystal display is to use an external driver chip to drive the chips on the panel to display images, but in order to reduce the number of components and reduce manufacturing costs, it has gradually developed in recent years to make the driver circuit structure directly on the display panel. A technology in which a gate driver circuit (Gate Driver) is integrated on an array substrate (Gate On Array, GOA).

Compared with traditional Chip On Flex/Film (COF) and directly bonded on glass (Chip On Glass, COG) processes, GOA technology can not only save costs, but also achieve a symmetrical and beautiful design on both sides of the panel. The main feature of this technology is that it relies on the continuous triggering of the GOA unit to realize its shift register function, which saves the bonding area of the Gate IC (Gate IC) and the Fan-out wiring space, and realizes the design of a narrow border; At the same time, since the Bonding process in the Gate direction can be omitted, it is also beneficial to increase production capacity and yield.

However, in the GOA technology, the continuous and continuous triggering of the GOA unit structure has its own defects, such as forward scanning: once a certain row, it is assumed that when the GOA unit of the nth row is abnormal, due to the n+ The GOA unit in row 1 needs to start working after receiving the trigger signal from the GOA unit in row n. At this time, the GOA unit in row n works abnormally and cannot perform normal output. Therefore, the GOA unit in row n+1 The unit cannot work normally, and the GOA unit behind the n+1th row cannot work normally, and the display panel cannot display normally. Another example is reverse scanning: once a certain row, it is assumed that when the GOA unit of row n is abnormal, the GOA unit of row n-1 needs to start working after receiving the trigger signal of the GOA unit of row n , and at this time, the GOA unit in the nth row works abnormally and cannot output normally. Therefore, the GOA unit in the n-1th row cannot work normally, and the GOA units in the n-1th row to the 1st row also cannot work normally. work, the display panel does not display properly.

Contents of the invention

Embodiments of the present invention provide a gate driving circuit and its repairing method, a display panel and a display device, so as to improve the repairing capability of the gate driving circuit of an array substrate.

Embodiments of the present invention adopt the following technical solutions:

The present invention provides a gate drive circuit, comprising:

M-level driving sub-circuits, the driving sub-circuits at each level include a shift register circuit and a scanning control circuit;

A repairing circuit, the repairing circuit at least includes an M-level repairing sub-circuit corresponding to the M-level driving sub-circuit;

The shift register circuit is used to provide a gate drive signal to the array substrate;

The scan control circuit is used to provide a forward scan signal to the shift register circuit at the same level to realize forward scan; or provide a reverse scan signal to the shift register circuit at the same level to realize reverse scan;

The repair sub-circuit of the Nth stage is used for forward scanning. When the scanning control circuit of the N+1st stage is abnormal, the output signal of the shift register circuit of the Nth stage is determined by the N+1st stage. The shift register circuit provides scanning signals; and, for reverse scanning, when the scanning control circuit at the N-1 stage is abnormal, the output signal of the shift register circuit at the N-stage is N-1 The shift register circuit of the stage provides scanning signals;

Wherein, N=2, 3, 4..., M-2, M-1, M is a positive integer equal to or greater than 4.

The beneficial effects of the embodiments of the present invention are as follows: by reasonably wiring the repair sub-circuit of the gate drive circuit of the array substrate, when the scanning control circuit of the positive and negative scanning gate drive circuit is abnormal, it can be repaired according to the corresponding repair sub-circuit Repairing the gate drive circuit improves the repair capability of the array substrate gate drive circuit and ensures the yield rate of liquid crystal display production.

An embodiment of the present invention provides a display panel, including the gate driving circuit provided in the above embodiment.

The beneficial effects of the embodiments of the present invention are as follows: the gate drive circuit of the array substrate of the display panel has a plurality of repair sub-circuits, and when the gate drive circuit is abnormal, the repair sub-circuit can repair the gate drive circuit, improving the performance of the gate drive circuit of the array substrate. The repair ability of the drive circuit ensures the yield rate of liquid crystal display production.

An embodiment of the present invention provides a display device, including the display panel provided in the above embodiment.

In an embodiment of the present invention, a method for repairing a gate drive circuit is used to repair the gate drive circuit provided in the above embodiment, including:

When scanning in the forward direction, when the scanning control circuit described in the N+1 stage is abnormal, the lead wire of the output terminal of the repair sub-circuit described in the N stage is connected to the drive signal input terminal of the shift register circuit in the N+1 stage. The intersection is electrically connected to provide the drive signal output by the shift register circuit at the Nth stage to the scanning signal input end of the shift register circuit at the N+1 stage;

During reverse scanning, when the scanning control circuit described in the N-1 stage is abnormal, the lead wire of the output end of the repair sub-circuit described in the N-th stage is connected to the scanning signal input end of the shift register circuit in the N-1 stage. The intersection is electrically connected, and provides a scanning signal to the scanning signal input end of the shift register circuit of the N-1th stage according to the driving signal output by the shift register circuit of the Nth stage;

Wherein, N=2, 3, 4..., M-2, M-1; M is a positive integer equal to or greater than 4.

The beneficial effects of the embodiments of the present invention are as follows: by reasonably wiring the repair circuit of the gate drive circuit of the array substrate, when the scanning control circuit of the gate drive circuit is abnormal, the repair sub-circuit used for repair can be The lead wires are electrically connected with the corresponding wires of the gate drive circuit, so as to provide scanning signals for the shift register circuit corresponding to the abnormal scanning control circuit, thereby ensuring the yield rate of liquid crystal display production.

Description of drawings

FIG. 1 is a schematic structural diagram of a first gate drive circuit provided by an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of a second gate drive circuit provided by an embodiment of the present invention;

3 is a schematic structural diagram of a third gate drive circuit provided by an embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a fourth gate drive circuit provided by an embodiment of the present invention;

FIG. 5 is a schematic diagram of repairing the gate drive circuit shown in FIG. 1 provided by an embodiment of the present invention;

FIG. 6 is a schematic diagram of repairing the gate drive circuit shown in FIG. 3 provided by an embodiment of the present invention;

FIG. 7 is a forward scanning gate drive circuit obtained according to the gate drive circuit shown in FIG. 1 according to an embodiment of the present invention;

FIG. 8 is a reverse scanning gate driving circuit obtained according to the gate driving circuit shown in FIG. 3 according to an embodiment of the present invention.

detailed description

The embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention. And in the case of no conflict, the embodiments in this description and the features in the embodiments can be combined with each other.

Referring to FIG. 1, an embodiment of the present invention provides a gate drive circuit, including:

M-level driving sub-circuits, each level of driving sub-circuits includes a shift register circuit, such as shift register circuit S/R (1) to shift register circuit S/R (M), shift register circuit S/R (1 ) to S/R(M) are used to provide gate drive signals to the array substrate; each stage of driving sub-circuits includes a scanning control circuit, such as scanning control circuit TB (1) scanning control circuit to TB (M), scanning control circuit TB(1) to TB(M) are used to provide a forward scan signal to the shift register circuit of the same level to realize forward scan; or provide a reverse scan signal to the shift register circuit of the same level to realize reverse scan.

The gate drive circuit also includes a repair circuit, which includes a plurality of repair sub-circuits, such as the first initial repair sub-circuit Rp A, the second initial repair sub-circuit Rp B, the repair sub-circuit Rp (1) to the repair sub-circuit Rp (M); the repairing sub-circuits Rp(1) to Rp(M) correspond one-to-one to the M-level driving sub-circuits.

The Nth stage repair sub-circuit is used for forward scanning, when the N+1th stage scan control circuit TB(N+1) works abnormally, according to the output signal of the Nth stage shift register circuit S/R(N) is The N+1th stage shift register circuit S/R(N+1) provides scanning signals; and, when used for reverse scanning, when the N-1th stage scanning control circuit TB(N-1) works abnormally, according to the The output signal of the N-stage shift register circuit S/R(N) provides a scanning signal for the N-1-th stage shift register circuit S/R(N-1); wherein, N=2, 3, 4... .., M-2, M-1, M is a positive integer equal to or greater than 4.

It should be understood that the clock signal lines CLK1 and CLK2 are necessary for the normal operation of the gate drive circuit, and are respectively electrically connected to each stage of the shift register circuit; the high-level signal line VGH and the low-level signal line VGL are gate drive circuits. Necessary for the normal operation of the drive circuit, it is electrically connected with each stage of shift register circuit respectively.

The gate driving circuit also includes a control signal line CONL, which is electrically connected to each repairing sub-circuit respectively, and provides a high-level signal or a low-level signal when any scanning control circuit of any stage is abnormal.

The connection structure of the gate drive circuit is as follows:

Each level of scan control circuit includes a first trigger signal input end, a second trigger signal input end and a scan signal output end; each level of shift register circuit includes a scan signal input end, a drive signal output end and a trigger signal output end, each The primary repair subcircuit includes an input terminal, an output terminal and a control terminal.

The first trigger signal input end of the N-th stage scanning control circuit is electrically connected to the trigger signal output end of the N-1st stage shift register circuit, and the second trigger signal input end of the Nth-stage scanning control circuit is connected to the N+1th stage The trigger signal output end of the shift register circuit is electrically connected, and the scan signal output end of the Nth stage scan control circuit is electrically connected with the scan signal input end of the Nth stage shift register circuit.

The lead wires of the output terminals of the N-th stage repair sub-circuit are respectively crossed and insulated from the scan signal input ends of the N+1-th stage shift register circuit and the scan signal input ends of the N-1-th stage shift-register circuit, as shown in FIG. 1 intersection 101 as shown;

The control terminal of the repairing subcircuit of the Nth stage is electrically connected to the control signal line CONL, and the input terminal of the repairing subcircuit of the Nth stage is electrically connected to the driving signal output terminal of the shift register circuit of the Nth stage.

In this embodiment, by reasonably wiring the N-th level repair sub-circuit to the M-1-th level repair sub-circuit of the gate drive circuit of the array substrate, when the third-level drive sub-circuit of the gate drive circuit to When the scanning control circuit in the drive sub-circuit of the M-2th stage is abnormal, the gate drive circuit can be repaired according to the repair circuit corresponding to the drive sub-circuit of the abnormal level, which improves the repair ability of the gate drive circuit of the array substrate and ensures The yield rate of liquid crystal display production.

Preferably, the first trigger signal input end of the first-stage scan control circuit is electrically connected to the initial trigger signal line STV, and the second trigger signal input end of the first-stage scan control circuit is connected to the trigger signal output of the second-stage shift register circuit. The terminals are electrically connected, and the scanning signal output terminal of the first-level scanning control circuit is electrically connected to the scanning signal input terminal of the first-level shift register circuit;

The input end of the first stage repair subcircuit is electrically connected to the drive signal output end of the first stage shift register circuit, the control end of the first stage repair subcircuit is electrically connected to the control signal line CONL, and the output of the first stage repair subcircuit The lead wires at the terminal and the scanning signal input terminal of the second-stage shift register circuit cross and are insulated from each other. By reasonably wiring the first-level repair sub-circuit of the gate drive circuit of the array substrate, for the forward-scanning gate drive circuit, when the second-level scan control circuit of the gate drive circuit is abnormal, it can be based on the first The level 1 repair sub-circuit Rp(1) repairs the gate drive circuit, improves the repair capability of the array substrate gate drive circuit, and ensures the yield rate of liquid crystal display production.

Preferably, the first initial repair subcircuit Rp A includes an input terminal, an output terminal and a control terminal;

The input end of the first initial repair sub-circuit Rp A is electrically connected to the initial trigger signal line STV, the control end of the first initial repair sub-circuit Rp A is electrically connected to the control signal line CONL, and the output end of the first initial repair sub-circuit Rp A The lead wires intersect with the scan signal input end of the first-stage shift register circuit S/R(1) and are insulated from each other. By reasonably wiring the first initial repair sub-circuit Rp A circuit of the gate drive circuit of the array substrate, for the gate drive circuit of forward scanning, when the first-level scan control circuit TB(1) of the gate drive circuit When an abnormality occurs, the gate drive circuit can be repaired according to the first initial repair sub-circuit Rp A, which improves the repair capability of the array substrate gate drive circuit and ensures the yield rate of liquid crystal display production.

Preferably, the first trigger signal input terminal of the M-th scan control circuit TB(M) is electrically connected to the initial trigger signal line STV, and the second trigger signal input terminal of the M-th scan control circuit TB(M) is connected to the M-th The trigger signal output terminal of the first-stage shift register circuit S/R (M-1) is electrically connected, and the scan signal output end of the M-stage scan control circuit TB (M) is connected to the M-1 stage shift register circuit S/R (M) the scan signal input terminal is electrically connected;

The input end of the Mth level repairing sub-circuit Rp(M) is electrically connected to the drive signal output end of the Mth level shift register circuit S/R(M), and the control terminal of the Mth level repairing subcircuit Rp(M) is connected to the control The signal line CONL is electrically connected, and the leads of the output end of the repair sub-circuit Rp(M) of the Mth stage intersect with the scan signal input end of the shift register circuit S/R(M-1) of the M-1st stage and are insulated from each other. By reasonably wiring the Mth-level repair sub-circuit Rp(M) of the gate drive circuit of the array substrate, for the reverse-scanned gate drive circuit, when the M-1th level of the gate drive circuit scans the control circuit TB When an abnormality occurs in (M-1), the gate drive circuit can be repaired according to the M-level repair sub-circuit Rp(M), which improves the repair capability of the array substrate gate drive circuit and ensures the yield rate of liquid crystal display production.

Preferably, the input terminal of the second initial repair sub-circuit Rp B is electrically connected to the initial trigger signal line STV, the control terminal of the second initial repair sub-circuit Rp B is electrically connected to the control signal line CONL, and the second initial repair sub-circuit Rp B The lead wires of the output end of the M-th stage shift register circuit S/R(M) intersect with the scan signal input end and are insulated from each other.

In this embodiment, by reasonably wiring the second initial repair sub-circuit RpB circuit of the gate drive circuit of the array substrate, for the reverse scanning gate drive circuit, when the Mth-level scan control circuit of the gate drive circuit TB(M) can be repaired when abnormality occurs, and the M-th level scanning control circuit TB(M) can be repaired according to the second initial repair sub-circuit Rp B, which improves the repair ability of the gate drive circuit of the array substrate and ensures the stability of the liquid crystal display. Production yield.

Each repair sub-circuit can be a TFT switch, the gate electrode of the TFT switch is electrically connected to the control terminal of the repair sub-circuit to which the TFT switch belongs, the source electrode of the TFT switch is electrically connected to the input end of the repair sub-circuit to which the TFT switch belongs, and the TFT switch The drain electrode is electrically connected to the output end of the repair sub-circuit to which the TFT switch belongs.

It should be noted that the TFT switch can be an N-type TFT or a P-type TFT. Correspondingly, when repairing, the control signal line CONL provides a high-level signal or a low-level signal to control the turn-on or turn-off of the TFT switch.

In addition, the control signal line CONL is a signal line provided separately, and when the scanning control circuit of the gate driving circuit is not abnormal, no signal may be input to the control signal line CONL.

The beneficial effects of the embodiments of the present invention are as follows: by reasonably wiring the repair sub-circuit of the gate drive circuit of the array substrate, when the scanning control circuit of the positive and negative scanning gate drive circuit is abnormal, it can be repaired according to the corresponding repair sub-circuit Repairing the gate drive circuit improves the repair capability of the array substrate gate drive circuit and ensures the yield rate of liquid crystal display production.

Referring to FIG. 2, an embodiment of the present invention provides another gate drive circuit, which is different from the gate drive circuit shown in FIG. 1 in that the control signal line CONL is replaced by a high-level signal line VGH, and the gate drive circuit When the scanning control circuit is abnormal, the high-level signal line VGH provides a high-level signal to the control terminal of the repair sub-circuit connected to it. For example, an N-type TFT is used as the repairing sub-circuit, and a high-level signal is provided from the high-level signal line VGH to the control terminal of the TFT connected thereto to turn on the TFT.

Of course, the control signal line CONL can also be replaced by the low-level signal line VGL, and the P-type TFT is used as the repair sub-circuit, and the low-level signal line VGL is used to provide a low-level signal to the control terminal of the TFT connected to it, so that the The TFT is turned on, and this structure is just a simple modification of the gate drive circuit shown in FIG. 2 , which will not be repeated here.

Referring to FIG. 3 , an embodiment of the present invention provides another gate drive circuit, which has a similar structure to the gate drive circuit shown in FIG. 1 or FIG. 2 , except that the gate drive circuit provided by this embodiment The control terminal of each repair sub-circuit is electrically connected to the drive signal output end of the shift register circuit of the corresponding stage, and the input end of each repair sub-circuit is electrically connected to the control signal line or the high-level signal line VGH.

When the scanning control circuit of the gate drive circuit is abnormal, the control signal line CONL or the high-level signal line VGH provides a high-level signal to the input terminal of the repair sub-circuit connected to it, and is connected to the control terminal of the repair sub-circuit. The connected shift register circuit provides a drive signal to provide a scan signal to the shift register circuit electrically connected to the output terminal of the repair subcircuit.

Preferably, the repairing sub-circuit includes a TFT switch, and the TFT switch is an N-type TFT.

The beneficial effects of the embodiments of the present invention are as follows: when a scan control circuit at a certain level is working abnormally, the repair sub-circuit connected to the scan control circuit provides a scan signal for the mobile register circuit at this level, thereby improving the repair capability of the gate drive circuit of the array substrate , to ensure the yield rate of liquid crystal display production.

An embodiment of the present invention provides a method for repairing a gate drive circuit, including:

If the N+1th stage scanning control circuit TB(N+1) is abnormal and affects the forward scanning of the gate drive circuit, the lead wire of the output terminal of the Nth stage repairing sub-circuit Rp(N) is connected to the N+th stage The scanning signal input terminals of the first-stage shift register circuit S/R(N+1) are electrically connected at the intersection, so that the drive signal output by the N-stage shift register circuit S/R(N) is the N+1-th stage The scan signal input end of the shift register circuit S/R(N+1) provides a scan signal.

If the scanning control circuit TB(N-1) of the N-1th stage is abnormal and thus affects the reverse scanning of the gate drive circuit, the lead wire of the output end of the repairing sub-circuit Rp(N) of the N-th stage is connected to the N-th stage The scanning signal input terminals of the first-stage shift register circuit S/R(N-1) are electrically connected at the intersection, so that the drive signal output by the N-stage shift register circuit S/R(N) is N-1th stage The scan signal input end of the shift register circuit S/R(N-1) provides a scan signal.

Preferably, it also includes: during forward scanning, when the second-level scanning control circuit works abnormally, the lead wire of the output end of the first-level repair sub-circuit Rp (1) is connected to the second-level shift register circuit S/R (2) The scan signal input terminals of the first stage shift register circuit S/R (1) are electrically connected at the intersection, so that the drive signal output by the first stage shift register circuit S/R (1) provides the scan signal input end of the second stage shift register circuit S/R (2) scan signal.

Preferably, it also includes: during forward scanning, when the first-stage scanning control circuit works abnormally, the lead wire of the output terminal of the first initial repair sub-circuit Rp A is connected to the scanning of the first-stage shift register circuit S/R (1) The signal input ends are electrically connected at the intersections, so as to provide scan signals for the scan signal input ends of the eleventh-stage shift register circuit S/R(1) according to the initial trigger signal.

Preferably, it also includes: during reverse scanning, when the M-1th level scan control circuit TB(M-1) works abnormally, make the lead wire of the output terminal of the M-th level repair sub-circuit Rp(M) and the M-1th level The scanning signal input end of the shift register circuit S/R(M-1) is electrically connected at the intersection, so that the M-1th stage is shifted according to the driving signal output by the M-stage shift register circuit S/R(M). The scan signal input end of the register circuit S/R(MN-1) provides a scan signal.

Preferably, it also includes: during reverse scanning, when the Mth-stage scanning control circuit TB (M) works abnormally, the lead wire of the output terminal of the second initial repair sub-circuit Rp B is connected to the M-th stage shift register circuit S/R ( The scanning signal input terminals of M) are electrically connected at the intersections, so as to provide scanning signals for the scanning signal input terminals of the Mth stage shift register circuit S/R(M) according to the initial trigger signal.

It should be noted that the forward scan and reverse scan are not repaired at the same time, that is, the lead wires of the output terminals of each repair sub-circuit cannot be electrically connected to the scan signal input terminals of the two shift register circuits at the same time.

Specifically, according to the corresponding relationship between the repairing sub-circuit and the abnormal scanning control circuit, the output end of the repairing sub-circuit can be electrically connected to the wires intersecting with it by laser welding.

Referring to FIG. 5, it shows a schematic diagram of the repaired gate drive circuit shown in FIG. 1. When the gate drive circuit is used for forward scanning, the first-stage scanning control circuit TB(1) and the When the scanning control circuit TB(N+1) is abnormal, the lead wire of the output end of the first initial repair sub-circuit is electrically connected to the scanning signal output end of the first-stage shift register circuit S/R(1) through laser welding technology, Form a welding point 500; make the lead wire of the output end of the Nth level repair sub-circuit electrically connected with the scanning signal output end of the N+1st level shift register circuit S/R(N+1) by laser welding technology, forming a welding point 501 ; Cut off the ends of the first-level scanning control circuit TB(1) and the N+1-th level scanning control circuit TB(N+1) that are working abnormally, such as: the first trigger signal input terminal, the second trigger signal input terminal and Scan signal output. The control signal line CONL provides a high-level signal or a low-level signal for the control terminals of each repairing sub-circuit. Of course, when the TFT switch of the repairing sub-circuit is N-type, the high-level signal can also be provided by the high-level signal line VGH instead of the control signal line; or when the TFT switch of the repairing sub-circuit is P-type, the low-level The signal line VGL supplies a low-level signal instead of the control signal line CONL.

Referring to Fig. 6, it shows a schematic diagram of repairing the gate drive circuit shown in Fig. 3, which is similar to the above-mentioned repairing process, except that the TFT switch of each repairing sub-circuit can only select an N-type TFT switch, and the control The signal line CONL provides a high-level signal. Of course, when the TFT switch of the repairing sub-circuit is N-type, the high-level signal line VGH can also be used to provide the high-level signal instead of the low control signal line.

The beneficial effects of the embodiments of the present invention are as follows: when a scan control circuit at a certain level is working abnormally, the repair sub-circuit connected to the scan control circuit provides a scan signal for the mobile register circuit at this level, thereby improving the repair capability of the gate drive circuit of the array substrate , to ensure the yield rate of liquid crystal display production.

It should be noted that the above-mentioned embodiments of the present invention can also have various modifications, some examples are as follows:

For example, referring to the gate drive circuit obtained on the basis of FIG. 1 shown in FIG. 7, the gate drive circuit is used for forward scanning. The reference numerals in FIG. 7 are the same as those in FIG. The drive circuit is different in that the repair circuit does not include the Mth stage repair sub-circuit and the second initial repair sub-circuit. The gate drive circuit shown in Figure 7 can adopt the same repair method as that of the gate drive circuit shown in Figure 1 when scanning forward, and the repaired gate drive circuit shown in Figure 5 resemblance. For another example, refer to the gate drive circuit shown in FIG. 8 based on FIG. 3, the gate drive circuit is only used for reverse scanning, and the reference numerals in FIG. 8 are the same as those in FIG. The gate drive circuit is different in that the repair circuit does not include the first-level repair sub-circuit and the first initial repair sub-circuit. The gate drive circuit shown in Figure 8 can use the same repair method as the gate drive circuit shown in Figure 3 when it scans in reverse, and the repaired gate drive circuit shown in Figure 6 resemblance. According to the present invention, those skilled in the art should understand that the gate drive circuits shown in FIG. 1 to FIG. within the scope of invention protection.

An embodiment of the present invention provides a display panel, including the gate driving circuit provided in the above embodiments.

The beneficial effects of the embodiments of the present invention are as follows: by reasonably wiring the repair circuit of the gate drive circuit of the array substrate, it can play a repair role when the scanning control circuit of the gate drive circuit is abnormal, and improve the efficiency of the array substrate. The repair ability of the gate drive circuit ensures the yield rate of liquid crystal display production.

An embodiment of the present invention provides a display device, including the display panel provided in the above embodiments.

The beneficial effects of the embodiments of the present invention are as follows: by reasonably wiring the repair circuit of the gate drive circuit of the array substrate, it can play a repair role when the scanning control circuit of the gate drive circuit is abnormal, and improve the efficiency of the array substrate. The repair ability of the gate drive circuit ensures the yield rate of liquid crystal display production.

Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these repairs and modifications of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these changes and modifications.

Claims (18)

1. A gate drive circuit, characterized in that, comprising: M-level driving sub-circuits, the driving sub-circuits at each level include a shift register circuit and a scanning control circuit; A repairing circuit, the repairing circuit at least includes an M-level repairing sub-circuit corresponding to the M-level driving sub-circuit; The shift register circuit is used to provide a gate drive signal to the array substrate; The scan control circuit is used to provide a forward scan signal to the shift register circuit at the same level to realize forward scan; or provide a reverse scan signal to the shift register circuit at the same level to realize reverse scan; The repair sub-circuit of the Nth stage is used for forward scanning. When the scanning control circuit of the N+1st stage is abnormal, the output signal of the shift register circuit of the Nth stage is determined by the N+1st stage. The shift register circuit provides scanning signals; and, for reverse scanning, when the scanning control circuit at the N-1 stage is abnormal, the output signal of the shift register circuit at the N-stage is N-1 The shift register circuit of the stage provides scanning signals; Wherein, N=2, 3, 4..., M-2, M-1, M is a positive integer equal to or greater than 4. 2. The gate drive circuit according to claim 1, further comprising: The control signal line is used to provide a high-level signal/low-level signal to the repairing sub-circuit when the scanning control circuit at any stage is abnormal. 3. The gate drive circuit according to claim 2, wherein the scan control circuit comprises a first trigger signal input terminal, a second trigger signal input terminal and a scan signal output terminal, and the shift register circuit comprises A scan signal input terminal, a drive signal output terminal and a trigger signal output terminal, the repair sub-circuit includes an input terminal, an output terminal and a control terminal; The first trigger signal input terminal of the scanning control circuit of the Nth stage is electrically connected to the trigger signal output terminal of the shift register circuit of the N-1th stage, and the second trigger signal input terminal of the scanning control circuit of the Nth stage It is electrically connected to the trigger signal output end of the shift register circuit in the N+1th stage, and the scan signal output end of the scan control circuit in the Nth stage is electrically connected to the scan signal input end of the shift register circuit in the Nth stage ; The input end of the repairing subcircuit in the Nth stage is electrically connected to the drive signal output end/the control signal line of the shift register circuit in the Nth stage, and the control end of the repairing subcircuit in the Nth stage is connected to the control The signal line/the driving signal output end of the shift register circuit in the Nth stage is electrically connected, and the lead wires of the output end of the repair subcircuit in the Nth stage are respectively connected to the scanning signal input end of the shift register circuit in the N+1st stage Intersect with the scan signal input end of the N-1th stage shift register circuit and insulate from each other. 4. The gate drive circuit according to claim 3, characterized in that: The first trigger signal input end of the scan control circuit in the first stage is electrically connected to the initial trigger signal line, and the second trigger signal input end of the scan control circuit in the first stage is connected to the trigger of the shift register circuit in the second stage. The signal output terminal is electrically connected, and the scanning signal output terminal of the scanning control circuit described in the first stage is electrically connected to the scanning signal input terminal of the shift register circuit described in the first stage; The input end of the repairing subcircuit in the first stage is electrically connected to the drive signal output end/the control signal line of the shift register circuit in the first stage, and the control end of the repairing subcircuit in the first stage is connected to the control Signal line/the drive signal output end of the shift register circuit in the first stage is electrically connected, and the leads of the output end of the repair sub-circuit in the first stage cross the scanning signal input end of the shift register circuit in the second stage and are connected to each other insulation. 5. The gate drive circuit according to claim 4, wherein the repair circuit further comprises a first initial repair subcircuit, and the first initial repair subcircuit includes an input terminal, an output terminal and a control terminal; The input terminal of the first initial repair subcircuit is electrically connected to the initial trigger signal line/the control signal line, and the control terminal of the first initial repair subcircuit is connected to the control signal line/the initial trigger signal The lead wires of the output end of the first initial repair sub-circuit intersect with the scan signal input end of the first-stage shift register circuit and are insulated from each other. 6. The gate drive circuit according to claim 5, characterized in that: The first trigger signal input terminal of the scanning control circuit in the Mth stage is electrically connected to the initial trigger signal line, and the second trigger signal input terminal of the scanning control circuit in the Mth stage is connected to the shift register circuit in the M-1st stage. The trigger signal output terminal of the trigger signal is electrically connected, and the scanning signal output terminal of the scanning control circuit described in the Mth stage is electrically connected with the scanning signal input terminal of the shift register circuit described in the Mth stage; The input end of the repairing subcircuit in the Mth stage is electrically connected to the drive signal output end/the control signal line of the shift register circuit in the Mth stage, and the control end of the repairing subcircuit in the Mth stage is connected to the control Signal line/the drive signal output end of the shift register circuit in the Mth stage is electrically connected, and the lead wire of the output end of the repair sub-circuit in the Mth stage is crossed with the scanning signal input end of the shift register circuit in the M-1st stage and insulated from each other. 7. The gate drive circuit according to claim 6, wherein the repair circuit further comprises a second initial repair subcircuit, and the second initial repair subcircuit includes an input terminal, an output terminal and a control terminal; The input terminal of the second initial repair subcircuit is electrically connected to the initial trigger signal line/the control signal line, and the control terminal of the second initial repair subcircuit is connected to the control signal line/the initial trigger signal line The leads of the output end of the second initial repair sub-circuit cross and are insulated from each other with the scan signal input end of the shift register circuit of the Mth stage. 8. The gate drive circuit according to any one of claims 3 to 7, wherein each repairing sub-circuit of the repairing circuit comprises a TFT switch, and the gate electrode of the TFT switch is connected to the corresponding repairing sub-circuit The control end of the circuit is electrically connected, the source electrode of the TFT switch is electrically connected to the input end of the repair sub-circuit to which it belongs, and the drain electrode of the TFT switch is electrically connected to the output end of the repair sub-circuit to which it belongs. 9. The gate driving circuit according to claim 8, wherein the TFT switch is an N-type TFT, and the control signal line provides a high-level signal. 10. The gate drive circuit according to claim 8, wherein the TFT switch is a P-type TFT, and when the control terminals of each of the repair sub-circuits are electrically connected to the control signal line, the control signal line provides a low-level signal. 11. A display panel, comprising the gate driving circuit according to any one of claims 1 to 10. 12. A display device, comprising the display panel according to claim 11. 13. A method for repairing a gate drive circuit, for repairing the gate drive circuit according to claim 7, characterized in that it comprises: When scanning in the forward direction, when the scanning control circuit described in the N+1 stage is abnormal, the lead wire of the output terminal of the repair sub-circuit described in the N stage is connected to the drive signal input terminal of the shift register circuit in the N+1 stage. The intersection is electrically connected to provide the drive signal output by the shift register circuit at the Nth stage to the scanning signal input end of the shift register circuit at the N+1 stage; During reverse scanning, when the scanning control circuit described in the N-1 stage is abnormal, the lead wire of the output end of the repair sub-circuit described in the N-th stage is connected to the scanning signal input end of the shift register circuit in the N-1 stage. The intersection is electrically connected, and provides a scanning signal to the scanning signal input end of the shift register circuit of the N-1th stage according to the driving signal output by the shift register circuit of the Nth stage; Wherein, N=2, 3, 4..., M-2, M-1; M is a positive integer equal to or greater than 4. 14. The method of claim 13, further comprising: When scanning in the forward direction, when the scanning control circuit described in the second stage is abnormal, the lead wire of the output terminal of the repair sub-circuit described in the first stage is electrically connected to the scanning signal input end of the shift register circuit described in the second stage at the intersection , providing a scanning signal to the scanning signal input terminal of the shift register circuit in the second stage according to the driving signal output by the shift register circuit in the first stage. 15. The method of claim 13, further comprising: When scanning in the forward direction, when the scanning control circuit described in the first stage is working abnormally, the lead wire of the output end of the first initial repair sub-circuit is electrically connected to the scanning signal input end of the shift register circuit in the first stage at the intersection, according to The initial trigger signal provides a scan signal to the scan signal input terminal of the shift register circuit in the first stage. 16. The method of claim 13, further comprising: During reverse scanning, when the scanning control circuit described in the M-1 stage is abnormal, the lead wire of the output terminal of the repair sub-circuit described in the M-stage is connected to the scanning signal input terminal of the shift register circuit described in the M-1 stage. The intersection is electrically connected to provide a scanning signal to the scanning signal input end of the shift register circuit of the M-1th stage according to the driving signal output by the shift register circuit of the Mth stage. 17. The method of claim 13, further comprising: During reverse scanning, when the scanning control circuit of the Mth stage is abnormal, the lead wire of the output end of the second initial repair sub-circuit is electrically connected to the scanning signal input end of the shift register circuit of the Mth stage at the intersection, according to The initial trigger signal provides a scanning signal to the scanning signal input end of the shift register circuit of the Mth stage. 18. The method of any one of claims 13 to 17, further comprising: cutting off the first trigger signal input terminal, the second trigger signal input terminal and the scan signal output terminal of the scan control circuit that is working abnormally; When the control terminal of each repairing sub-circuit is electrically connected to the control signal line, the control signal line provides a high-level signal or a low-level signal for the control terminal of each repairing sub-circuit; or, each of the The control terminals of the repairing subcircuits are electrically connected to the drive signal output terminals of the corresponding shift register circuits, and when the input terminals of each of the repairing subcircuits are electrically connected to the control signal lines, the control signal lines are The control terminal of each repairing sub-circuit provides a high-level signal.