CN103864008B - Silicon chip is adopted to control the processing method of thin film deposition pattern as mask - Google Patents

Abstract

The invention is a process method for controlling the deposition morphology of a thin film using a silicon wafer as a mask, including process steps: 1) etching the silicon wafer through according to the required pattern to make a silicon wafer mask; The substrate of the thin film is fixed to the silicon mask, which includes controlling the distance between the substrate and the silicon mask, and the pattern alignment between the substrate and the silicon mask; 3) Depositing the thin film layer; 4) The substrate is separated from the silicon mask, and the silicon mask is cleaned for reuse. Advantages: By changing the distance between the silicon wafer and the substrate to be deposited and using silicon wafers with different thicknesses and different through-hole shapes, the distribution of the particles of the deposited material during the deposition process can be changed, thereby changing the final The cross-sectional morphology of the obtained film pattern. The process is simple and cost-effective, and can be reused. When the further grown film upper layer material and the film lower layer material need better lattice matching, this method shows outstanding advantages.

Description

Process method of using silicon wafer as a mask to control thin film deposition morphology

technical field

The invention proposes a process method of using a silicon wafer as a mask plate to control the deposition morphology of a thin film, which belongs to the technical field of microelectronics and microelectromechanical systems (MEMS).

Background technique

The thin film manufacturing process is one of the most common processes in the field of microelectronics and integrated circuit manufacturing. Mask etching is usually used to realize the patterning of thin film materials. The traditional thin film manufacturing process usually implements the patterning of thin film materials by stacking multilayer materials from bottom to top, namely: growth of thin film materials, growth of mask materials, patterning of mask materials, patterning of thin film materials, removal of mask and other multi-step process steps. The patterning of thin film materials mainly adopts two methods of dry etching or wet etching, both of which can obtain high-precision graphics with clear and steep edges. This traditional thin-film manufacturing process is also widely used in the field of micro-electromechanical systems due to its advantages such as good pattern accuracy and easy mass production. However, the traditional thin-film manufacturing process that grows thin-film materials with clear and steep graphic edges has been unable to meet the production and manufacture of some MEMS devices, such as thin-film resonators and other devices that require gradual changes in the graphic edges as thin-film materials for electrodes. This is due to the fact that after the patterning of the traditional thin film material, the edge of the pattern is steep, which leads to the inability to cover well on the edge when other materials continue to grow upward, which affects the quality of the upper film and the quality of the subsequent process. These problems will seriously affect the yield of the device. , reliability, and device performance.

The invention provides a very convenient solution for the patterning of thin film materials that require slowly changing edges. The process is simple and reusable, and it is a process method suitable for patterning thin film materials in large-scale batch production. This method shows outstanding advantages when the material on the upper layer of the further grown film needs better lattice matching with the material on the lower layer of the film.

Contents of the invention

The process method of using silicon wafer as a mask to control the morphology of thin film deposition proposed by the present invention aims to solve the above-mentioned existing technical problems by using silicon wafer as a mask for thin film deposition to replace the traditional bottom-up thin film The manufacturing process can not only simplify the process steps, but also solve the problem that the upper film cannot be well covered due to the gradual change of the edge of the film deposited by the method.

The technical solution of the present invention: using a silicon wafer as a mask to control the process method of thin film deposition morphology, at least including the preparation and use of the silicon wafer mask and the cleaning and reuse of the silicon wafer mask, which is characterized in that it includes the following Process steps:

1) Etch through the silicon wafer according to the required pattern, and make a silicon wafer mask;

2) Fix the substrate to be deposited with the silicon mask, including controlling the distance between the substrate and the silicon mask, and the pattern alignment between the substrate and the silicon mask;

3) deposit thin film layer;

4) The substrate is separated from the silicon mask, and the silicon mask is cleaned for reuse.

The present invention has the following advantages:

1) The silicon wafer mask prepared by this process can simplify the multi-step thin film process in the traditional thin film manufacturing process, and replace the multi-step process steps by one film deposition;

2) The edge of the film prepared by this process is slow-deformed. In the growth process of multi-layer film materials, the film coverage effect can be effectively optimized, and the quality of the film and the quality of the subsequent process can be improved;

3) The silicon wafer mask can control the morphology of its through holes by dry etching, or control the angle by anisotropic wet etching. According to different through-hole morphology, during the film deposition process, some particles of the film material are blocked by the sidewall of the silicon wafer, so as to effectively control the deposited film morphology;

4) When the substrate to be deposited and the silicon mask are fixed, the edge expansion size and edge slope of the film can be controlled by changing the distance between the substrate and the silicon mask;

5) When depositing a thin film, different deposition methods will affect the particle distribution of the thin film material. The morphology of the deposited thin film can be controlled by controlling the particle distribution of the thin film material. For example, changing the deposition angle of the thin film can make the appearance of the thin film appear angular shift;

6) After using the silicon wafer mask, use the corresponding thin film etching solution to clean or dry etching method to clean. After cleaning, the silicon wafer can be reused, and the use cost is low.

Description of drawings

Accompanying drawing 1 is the schematic diagram of the thin film deposition process using the inverted trapezoidal through-hole silicon wafer.

Accompanying drawing 2 is the schematic diagram of the thin film deposition process that adopts vertical through-hole silicon wafer.

Accompanying drawing 3 is the flow chart of the technological method of preparing inverted trapezoidal through-hole silicon chip.

Accompanying drawing 4 is the technological process flowchart of preparing vertical through-hole silicon chip.

detailed description

The process method of using silicon wafer as a mask to control the morphology of thin film deposition includes at least the preparation and use of the silicon wafer mask and the cleaning and reuse of the silicon wafer mask, specifically including the following process steps:

1) Etch through the silicon wafer according to the required pattern, and make a silicon wafer mask;

2) Fix the substrate to be deposited with the silicon mask, including controlling the distance between the substrate and the silicon mask, and the pattern alignment between the substrate and the silicon mask;

3) deposit thin film layer;

4) The substrate is separated from the silicon mask, and the silicon mask is cleaned for reuse.

The silicon wafer is used as a mask material, the thickness of the silicon wafer is selected according to the corresponding process conditions, and the thickness is on the order of hundreds of microns; the layout of the silicon wafer is designed according to the requirements of specific thin film graphics, wherein due to the thin film deposition process The appearance of the expansion size needs to be considered in the layout design, wherein the expansion size is determined based on different silicon through-hole topography and the spacing between the substrate and the silicon mask.

The silicon wafer mask is prepared by etching through the silicon wafer by wet etching or dry etching, and the silicon wafer mask is prepared by controlling the thickness of the silicon wafer and the process in the corresponding etching method. Conditions, form silicon wafers with different thicknesses and different through-hole cross-sections, thereby changing the morphology of the film, including the expanded size of the pattern, the edge slope and the flatness of the middle of the film.

The described fixing of the substrate of the thin film to be deposited and the silicon wafer mask is to fix between the substrate of the thin film to be deposited and the silicon wafer mask by using a material that can precisely control the thickness and have viscosity, as in Use photoresist to spin coat the required thickness on the substrate to be deposited film and perform photolithography, remove the photoresist on the substrate to be deposited film area and remove the residual glue after photolithography with oxygen plasma, and place the silicon wafer on the substrate Chip alignment and bonding, in which the distance between the substrate and the silicon mask plays the most important role in the pattern expansion size and film morphology.

The described deposition film layer is by physical vapor deposition (PVD) or chemical vapor deposition (CVD) method, including sputtering, evaporation, CVD mode, by controlling the distance between the deposition source and the substrate and the film deposition method, changing The shape of thin film graphics and improve the accuracy of graphics.

The deposition source is the deposition source of physical vapor deposition and chemical vapor deposition in the semiconductor process, and the composition material of the deposition source is gold, platinum, titanium, nickel, copper, aluminum, chromium used in the semiconductor process Metal materials such as silicon dioxide, silicon nitride and other dielectric thin films.

The deposited thin film layer is a metal material or a dielectric thin film material corresponding to the deposition source.

The separation of the substrate and the silicon mask is based on the material used for fixing. For example, when photoresist is used as the fixing material for the substrate and the silicon mask, acetone soaking can be used to make the substrate separate from the silicon mask. its separation.

The cleaning of the silicon wafer mask is performed by dry etching or wet etching of the corresponding thin film.

Example

As shown in FIG. 1 , 101 in the figure is a substrate to be deposited with a thin film, and 103 is an inverted trapezoidal through-hole silicon wafer. The substrate and the silicon wafer are fixed through a gap 102 during use. 104 is a thin film material deposition source. During the thin film deposition process, particles of the thin film material are deposited on the substrate through the through hole 107 on the silicon wafer. The particle distribution of the thin film deposition process is mainly affected by the following factors:

1) Due to the diffraction effect of the particles, the thin film will also be deposited around the through hole during the deposition process;

2) The shape of the through hole of the silicon wafer is an inverted trapezoid, and the lower edge of the through hole of the mask plate restricts the trajectory of the particles, so the boundary of the film deposition is formed at the substrate position corresponding to the lower edge of the mask plate;

3) Adjusting the thickness of 102 can change the expansion size of the diffraction effect and the film deposition boundary controlled by the lower edge of the mask, thereby controlling the edge slope of the film.

When using an inverted trapezoidal through-hole silicon wafer to deposit thin films, the trajectory of the particles is limited by the lower boundary, and the size of the outer expansion is small. The empirical value is about ~20um+0.5D ₁₀₂ , where D ₁₀₂ is the thickness of the gap 102; at the same time, due to The film deposition process is almost not limited by the upper edge of the silicon wafer, and the inward shrinkage of the film boundary is very small, which can basically be ignored.

201 in FIG. 2 is the substrate to be deposited film, 203 is a silicon wafer with vertical through holes, and the substrate and the silicon wafer are fixed through the gap 202 during use. 204 is a thin film material deposition source. During the thin film deposition process, particles of the thin film material are deposited on the substrate through the through hole 206 on the silicon wafer. The particle distribution of the thin film during the deposition process is similar to that in Figure 1, the only difference is that the through hole of the silicon wafer is vertical, the boundary of the thin film deposition on the substrate is limited by the upper boundary of the silicon wafer, and the boundary of the deposited thin film shrinks inward more Large, approximately forming a raised film morphology.

When the thin film is deposited on a silicon wafer with vertical through holes, the trajectory of particles is limited by the upper and lower boundaries at the same time, and the expansion size is mainly limited by the lower edge of the silicon wafer. Therefore, it is similar to the thin film deposition process of the inverted trapezoidal through hole silicon wafer. ~20um+0.5D ₂₀₂ , where D ₂₀₂ is the thickness of the gap 202; at the same time, the inward shrinkage size is related to the thickness of the silicon wafer, the distance between the substrate and the silicon wafer, and the working distance between the target and the substrate during film deposition. When the working distance When it is more than 40mm, its empirical value is about one-tenth of the thickness of the silicon wafer plus the distance between the silicon wafer and the substrate.

301 in FIG. 3 is a crystal-oriented silicon wafer, 302 is a mask on the front side of the silicon wafer, and 303 is a masking layer on the back side of the silicon wafer. (a) in Figure 3 is the first step to prepare the wafer and grow the front and back mask materials; (b) in Figure 3 is to pattern the front mask; (c) in Figure 3 is to use KOH or TMAH to The silicon wafer is wet-etched through; (d) in Figure 3 is to remove the mask material.

401 in FIG. 4 is a silicon wafer, 402 is a mask on the front side of the silicon wafer, and 403 is a masking layer on the back side of the silicon wafer. (a) in Figure 4 is the first step to prepare the film and grow the front and back mask materials; (b) in Figure 4 is to pattern the front mask; (c) in Figure 4 is to use dry etching Etching through the silicon wafer, such as inductively coupled plasma etching (ICP) and other methods; Figure 4 (d), remove the mask material.

Claims (5)

1. adopt silicon wafer as the process method of mask plate control film deposition morphology, it is characterized in that the method comprises following process steps: 1) Etch through the silicon wafer according to the required pattern, and make a silicon wafer mask; 2) Fix the substrate to be deposited with the silicon mask, including controlling the distance between the substrate and the silicon mask, and the pattern alignment between the substrate and the silicon mask; 3) deposit thin film layer; 4) The substrate is separated from the silicon wafer mask, and the silicon wafer mask is cleaned for reuse; the silicon wafer mask is made by etching through the silicon wafer through wet etching or dry etching. The silicon wafer mask is prepared by controlling the thickness of the silicon wafer and the process conditions in the corresponding etching method to form silicon wafers with different thicknesses and different through-hole cross-section structures, thereby changing the morphology of the film, including graphics The outer expansion size, edge slope and flatness of the middle of the film. 2. adopting silicon chip according to claim 1 as the processing method of mask plate control thin film deposition appearance, it is characterized in that described control thin film deposition appearance, is the method by physical vapor deposition PVD or chemical vapor deposition CVD , including sputtering and evaporation, by controlling the distance between the deposition source and the substrate and the thin film deposition method, the morphology of the thin film pattern can be changed and the precision of the pattern can be improved. 3. adopt silicon chip according to claim 2 as the processing method of mask plate control thin film deposition morphology, it is characterized in that described deposition source is the deposition source of physical vapor deposition and chemical vapor deposition in semiconductor technology, so The composition materials of the above-mentioned deposition sources are gold, platinum, titanium, nickel, copper, aluminum, chromium metal materials or silicon dioxide and silicon nitride dielectric film materials used in semiconductor technology. 4. The process method of using a silicon wafer as a mask to control the morphology of thin film deposition according to claim 1, characterized in that the deposited thin film layer is a metal material or a dielectric thin film material corresponding to the deposition source. 5. according to claim 1, adopt silicon wafer as the processing method of mask plate to control thin film deposition topography, it is characterized in that described cleaning silicon wafer mask plate is by dry etching or wet method of corresponding thin film Corrosion solution for cleaning.